PicoDVI in CP support 640x480 and 800x480 on Feather DVI, Pico and
Pico W. 1 and 2 bit grayscale are full resolution. 8 and 16 bit
color are half resolution.
Memory layout is modified to give the top most 4k of ram to the
second core. Its MPU is used to prevent flash access after startup.
The port saved word is moved to a watchdog scratch register so that
it doesn't get overwritten by other things in RAM.
Right align status bar and scroll area. This normally gives a few
pixels of padding on the left hand side and improves the odds it is
readable in a case. Fixes#7562
Fixes c stack checking. The length was correct but the top was being
set to the current stack pointer instead of the correct top.
Fixes#7643
This makes Bitmap subscr raise IndexError instead of ValueError
when the index arguments are wrong.
This switches stage2 to C and uses Jinja to change the C code based
on flash settings from https://github.com/adafruit/nvm.toml. It
produces the fastest settings for the given set of external flashes.
Flash size is no longer hard coded so switching flashes with similar
capabilities but different sizes should *just work*.
This PR also places "ITCM" code in RAM to save the XIP cache for
code execution. Further optimization is possible. A blink code.py
still requires a number of flash fetches every blink.
Fixes#4041
Presumably, switching it to generic hurt performance a bit.
I verified that the build-raspberry_pi_pico/boot2_padded_checksummed.S
built file has the same checksum as the old
bs2_default_padded_checksummed.S
Add SMPS mode pin to Raspi Pico pins.c; see section "4.3. Using the ADC" of the Pico datasheet for discussion.
Driving this pin high forces the onboard regulator into a lower noise PWM mode.
The RP2040 is new microcontroller from Raspberry Pi that features
two Cortex M0s and eight PIO state machines that are good for
crunching lots of data. It has 264k RAM and a built in UF2
bootloader too.
Datasheet: https://pico.raspberrypi.org/files/rp2040_datasheet.pdf
