Commit Graph

13 Commits

Author SHA1 Message Date
robert-hh b110266897 samd/moduos: Add uos.urandom() using the phase-jitter rng.
This RNG passes many of the Diehard tests and also the AIS31 test suite.
The RNG is quite slow, delivering 200bytes/s.

Tested on boards with and without a crystal.
2023-02-21 23:17:44 +11:00
robert-hh 76cf98c35b samd/mcu: Implement a hardware seed for the SAMD21 random module.
By using the phase jitter between the DFLL48M clock and the FDPLL96M clock.
Even if both use the same reference source, they have a different jitter.
SysTick is driven by FDPLL96M, the us counter by DFLL48M.  As a random
source, the us counter is read out on every SysTick and the value is used
to accumulate a simple multiply, add and xor register.  According to tests
it creates about 30 bit random bit-flips per second.  That mechanism will
pass quite a few RNG tests, has a suitable frequency distribution and
serves better than just the time after boot to seed the PRNG.
2023-02-21 23:15:29 +11:00
robert-hh e33db80a59 samd/clock_config: Extend the SAMD51 us-counter to 60 bit.
This removes the difference in the time.ticks_us() range between SAMD21 and
SAMD51.

The function mp_hal_ticks_us_64() is added and used for:
- SAMD51's mp_hal_ticks_us and mp_hal_delay_us().
  For SAMD21, keep the previous methods, which are faster.
- mp_hal_ticks_ms() and mp_hal_tick_ms_64(), which saves some bytes
  and removes a potential race condition every 50 days.

Also set the us-counter for SAMD51 to 16 MHz for a faster reading of the
microsecond value.

Note: With SAMD51, mp_hal_ticks_us_64() has a 60 bit range only, which is
still a long time (~36000 years).
2022-10-25 23:26:14 +11:00
robert-hh 32c973d554 samd/machine_timer: Add machine.Timer based on the shared soft-timer. 2022-10-06 22:52:39 +11:00
robert-hh 3625388d8c samd/samd_isr: Change the way a Sercom ISR is registered and called.
Code size diff: +12 Bytes
BSS diff: -12 Bytes
RAM usage: +16 Bytes
Speed increase: a few clock cycles per call
Style improvement: ++
2022-10-06 22:52:10 +11:00
robert-hh 94d27ae28f samd/machine_i2c: Add the machine.I2C class.
Using the common API.  Tested with SAMD21 and SAMD51 boards.
2022-10-06 22:49:06 +11:00
robert-hh aa870708ac samd/machine_spi: Add the machine.SPI class.
Suported by both SAMD21 and SAMD51.  It follows the generic API, except for
the bits=nn option, which is not implemented (yet).
2022-10-06 22:48:44 +11:00
robert-hh b33f204529 samd/machine_uart: Add the machine.UART class.
All board pins that have UART's assigned can be used.  Baud rate range is
75 Baud to ~2 MBaud.

No flow control yet, and only RX is buffered.  TX buffer and flow control
may be added later for SAMD51 with its larger RAM and Flash.
2022-10-06 22:48:12 +11:00
robert-hh 4b6f6ccf88 samd/machine_pin: Add pin.irq() to the machine.Pin class.
Its API conforms to the docs.  There are 16 IRQ channels available, which
will be used as assignable to the GPIO numbers.  In most cases, the irq
channel is GPIO_no % 16.
2022-10-06 22:46:53 +11:00
robert-hh a9eef1b276 samd/samd_isr: Rework the interrupt tables.
Changes are:
- Have two separate tables for SAM21 and SAMD51.
- Use a short table for SAMD21.
- Add a comment to each line telling what it's for, making further use
  easier.
- Add preliminary handlers/entries for PendSV, EIC and Sercom.  These will
  be replaced later when the respecitve modules are added.
2022-10-06 22:46:10 +11:00
robert-hh 98ae312640 samd/samd_isr: Extend systick_ms to 64 bit.
By adding a 32 bit overflow counter.  This allows it to be used for the
time functions.
2022-10-06 22:36:26 +11:00
Damien George 69661f3343 all: Reformat C and Python source code with tools/codeformat.py.
This is run with uncrustify 0.70.1, and black 19.10b0.
2020-02-28 10:33:03 +11:00
Damien George 5f9bd11527 samd: Add new port to Microchip SAMDxx microcontrollers.
Initially supporting SAMD21 and SAMD51.
2019-07-01 17:19:18 +10:00