Commit Graph

24 Commits

Author SHA1 Message Date
Scott Gauche a8d8651873 Canonical C style for half_duplex = true/false 2022-02-08 23:13:22 -05:00
Scott Gauche 89ad767b8f add half_duplex to spi constructs in other ports but raise not implemented errors 2022-02-08 22:25:23 -05:00
Jeff Epler 2bc61b4580 Parenthesize double-division for clarity 2021-03-26 11:01:22 -05:00
Jeff Epler 231cb1ffd9 mimxrt10xx: Use the proper "betweenTransferDelay" (et al) values
Set the betweenTransferDelay to the SCK low-time, to avoid long pauses
between bytes (transfers) while preventing the last SCK cycle in a byte
from being a runt pulse.

Compared to an earlier revision of this change, which just set the delays
all to zero, this doesn't break using an AirLift, which was sensitive
to the runt pulses (the simple loopback-wire test didn't detect the problem)
2021-03-26 10:54:13 -05:00
Jeff Epler 1d48054aea mimxrt10xx: Factor out "transfer_common"
.. and set the "MasterPcsContinuous" flag, which removes some of the
gap between bytes of a single SPI transaction
2021-03-26 10:04:35 -05:00
Jeff Epler 9e110f120a mimxrt10xx: busio: cap SPI baudrate at 30MHz per datasheet 2021-03-26 10:01:53 -05:00
Jeff Epler b440883fe5 mimxrt: SPI: Set the TCR value returned by MasterBaudSetRate
without this, the baud rate could be wrong; in my testing, it was
low by a factor of 2 when requesating baudrate=1_000_000 (1MHz).

When passing the baudrate in to LPSPI_MasterInit, the setting is made
automatically, but LPSPI_MAster_SetBaudRate just returns it via the
out-parameter tcrPrescaleValue.
2021-03-24 13:33:21 -05:00
microDev a52eb88031
run code formatting script 2021-03-15 19:27:36 +05:30
Philip Jander 5bf08c503b adds: maximum retries on SPI busy 2021-02-07 17:06:46 +01:00
Philip Jander ae91b12aea chore: whitespace fixed 2021-02-07 16:59:11 +01:00
Philip Jander 127cc6204a adds: idle loop to wait for SPI not busy (mimxrt10xx) 2021-02-07 16:59:11 +01:00
microDev dc332baa87
update common_hal_reset_pin() 2020-12-28 20:04:00 +05:30
Scott Shawcroft c5fa9730a8
Compiles! 2020-06-24 12:47:59 -07:00
Diego Elio Pettenò dd5d7c86d2 Fix up end of file and trailing whitespace.
This can be enforced by pre-commit, but correct it separately to make it easier to review.
2020-06-03 10:56:35 +01:00
Lucian Copeland a59798ed49 Merge branch 'mimxrt-uart-oneway' into mimxrt-busio-cleanup 2020-05-27 12:31:16 -04:00
Lucian Copeland 1e914ac2b0 Change exception text and type 2020-05-27 11:48:52 -04:00
Lucian Copeland 53fb699436 Add pin resetting across boards, fix array size detection issue 2020-05-27 11:45:15 -04:00
Lucian Copeland 66c09efae2 Add UART one-way instance search, fix bugs in stm32 implementation 2020-05-20 12:48:01 -04:00
arturo182 f92d53eaab mimxrt1010: Increase max SPI speed 2020-05-18 22:07:38 +02:00
Lucian Copeland a1330747e8 text fixes, postpone warning disable 2020-05-05 12:46:30 -04:00
Lucian Copeland bc581fbdfb Add-unidirectional-SPI 2020-05-01 13:15:38 -04:00
arturo182 08f369ea96 mimxrt1011: Only re-init SPI when it's actually needed
If some crazy code (*cough* FourWire) decides to reconfigure the bus
before every transfer, it might get a bit slow...
2020-04-06 22:10:12 +02:00
Dave Marples aadb0bfc1e Fix SPI clock speed on mimxrt10xx family & mimxrt1020 pinmux fixup 2020-02-26 14:28:54 +00:00
arturo182 13e0cba6f1 Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00