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@ -341,7 +341,7 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self,
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return status >= 0; // Status is number of chars read or an error code < 0.
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}
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) {
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) {
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if (len == 0) {
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return true;
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}
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@ -350,7 +350,7 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uin
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status = sercom_dma_transfer(self->spi_desc.dev.prvt, data_out, data_in, len);
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} else {
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struct spi_xfer xfer;
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xfer.txbuf = data_out;
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xfer.txbuf = (uint8_t*) data_out;
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xfer.rxbuf = data_in;
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xfer.size = len;
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status = spi_m_sync_transfer(&self->spi_desc, &xfer);
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@ -12,8 +12,6 @@ LONGINT_IMPL = MPZ
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CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
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CIRCUITPY_NEOPIXEL_WRITE = 0
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CIRCUITPY_DIGITALIO = 0
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CIRCUITPY_MICROCONTROLLER = 0
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CIRCUITPY_ESP_FLASH_MODE=dio
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CIRCUITPY_ESP_FLASH_FREQ=40m
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@ -75,10 +75,14 @@ static bool bus_uses_iomux_pins(spi_host_device_t host, const spi_bus_config_t*
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// End copied code.
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static bool spi_bus_free(spi_host_device_t host_id) {
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static bool _spi_bus_free(spi_host_device_t host_id) {
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return spi_bus_get_attr(host_id) == NULL;
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}
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static void spi_interrupt_handler(void *arg) {
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}
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void common_hal_busio_spi_construct(busio_spi_obj_t *self,
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const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi,
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const mcu_pin_obj_t * miso) {
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@ -90,8 +94,8 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
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bus_config.quadhd_io_num = -1;
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bus_config.max_transfer_sz = 0; // Uses the default
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bus_config.flags = SPICOMMON_BUSFLAG_MASTER | SPICOMMON_BUSFLAG_SCLK |
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mosi != NULL ? SPICOMMON_BUSFLAG_MOSI : 0 |
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miso != NULL ? SPICOMMON_BUSFLAG_MISO : 0;
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(mosi != NULL ? SPICOMMON_BUSFLAG_MOSI : 0) |
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(miso != NULL ? SPICOMMON_BUSFLAG_MISO : 0);
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bus_config.intr_flags = 0;
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// RAM and Flash is often on SPI1 and is unsupported by the IDF so use it as
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@ -99,12 +103,12 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
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spi_host_device_t host_id = SPI1_HOST;
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self->connected_through_gpio = true;
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// Try and save SPI2 for pins that are on the IOMUX
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if (bus_uses_iomux_pins(SPI2_HOST, &bus_config) && spi_bus_free(SPI2_HOST)) {
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if (bus_uses_iomux_pins(SPI2_HOST, &bus_config) && _spi_bus_free(SPI2_HOST)) {
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host_id = SPI2_HOST;
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self->connected_through_gpio = false;
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} else if (spi_bus_free(SPI3_HOST)) {
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} else if (_spi_bus_free(SPI3_HOST)) {
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host_id = SPI3_HOST;
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} else if (spi_bus_free(SPI2_HOST)) {
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} else if (_spi_bus_free(SPI2_HOST)) {
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host_id = SPI2_HOST;
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}
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if (host_id == SPI1_HOST) {
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@ -114,21 +118,21 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
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esp_err_t result = spi_bus_initialize(host_id, &bus_config, 0 /* dma channel */);
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if (result == ESP_ERR_NO_MEM) {
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mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed"));
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} else if (result = ESP_INVALID_ARG) {
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} else if (result == ESP_ERR_INVALID_ARG) {
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mp_raise_ValueError(translate("Invalid pins"));
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}
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spi_bus_lock_dev_config_t config = { .flags = 0 };
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result = spi_bus_lock_register_dev(spi_bus_get_attr(host_id)->lock,
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spi_bus_lock_dev_config_t *config,
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&config,
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&self->lock);
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if (result == ESP_ERR_NO_MEM) {
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mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed"));
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}
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err = esp_intr_alloc(spicommon_irqsource_for_host(host_id),
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bus_config.intr_flags | ESP_INTR_FLAG_INTRDISABLED,
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spi_interrupt_handler, self, &self->intr);
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result = esp_intr_alloc(spicommon_irqsource_for_host(host_id),
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bus_config.intr_flags | ESP_INTR_FLAG_INTRDISABLED,
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spi_interrupt_handler, self, &self->interrupt);
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if (result == ESP_ERR_NO_MEM) {
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mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed"));
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}
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@ -198,18 +202,21 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
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bits == self->bits) {
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return true;
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}
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self->hal_context->mode = polarity << 1 | phase;
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self->hal_context.mode = polarity << 1 | phase;
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self->polarity = polarity;
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self->phase = phase;
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self->bits = bits;
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self->target_frequency = baudrate;
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esp_err_t result = spi_hal_get_clock_conf(self->hal_context,
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esp_err_t result = spi_hal_get_clock_conf(&self->hal_context,
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self->target_frequency,
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128 /* duty_cycle */,
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self->connected_through_gpio,
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0 /* input_delay_ns */,
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&self->real_frequency,
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&self->timing_conf);
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if (result != ESP_OK) {
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return false;
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}
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spi_hal_setup_device(&self->hal_context);
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return true;
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@ -222,9 +229,9 @@ bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
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return false;
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}
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// Wait to grab the lock from another task.
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esp_err_t ret = spi_bus_lock_acquire_start(self->lock, portMAX_DELAY);
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self->has_lock = true;
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return true;
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esp_err_t result = spi_bus_lock_acquire_start(self->lock, portMAX_DELAY);
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self->has_lock = result == ESP_OK;
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return self->has_lock;
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}
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bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) {
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@ -238,62 +245,37 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
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bool common_hal_busio_spi_write(busio_spi_obj_t *self,
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const uint8_t *data, size_t len) {
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if (len == 0) {
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return true;
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}
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// int32_t status;
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if (len >= 16) {
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// status = sercom_dma_write(self->spi_desc.dev.prvt, data, len);
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} else {
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// struct io_descriptor *spi_io;
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// spi_m_sync_get_io_descriptor(&self->spi_desc, &spi_io);
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// status = spi_io->write(spi_io, data, len);
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}
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return false; // Status is number of chars read or an error code < 0.
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return common_hal_busio_spi_transfer(self, data, NULL, len);
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}
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bool common_hal_busio_spi_read(busio_spi_obj_t *self,
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uint8_t *data, size_t len, uint8_t write_value) {
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if (len == 0) {
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return true;
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}
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// int32_t status;
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if (len >= 16) {
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// status = sercom_dma_read(self->spi_desc.dev.prvt, data, len, write_value);
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} else {
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// self->spi_desc.dev.dummy_byte = write_value;
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// struct io_descriptor *spi_io;
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// spi_m_sync_get_io_descriptor(&self->spi_desc, &spi_io);
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// status = spi_io->read(spi_io, data, len);
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}
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return false; // Status is number of chars read or an error code < 0.
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return common_hal_busio_spi_transfer(self, NULL, data, len);
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}
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) {
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) {
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if (len == 0) {
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return true;
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}
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spi_hal_context_t* hal = &self->hal_context;
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hal->tx_bitlen = len * 8;
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hal->rx_bitlen = len * 8;
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hal->send_buffer = data_out;
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hal->tx_bitlen = len * self->bits;
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hal->rx_bitlen = len * self->bits;
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hal->send_buffer = (uint8_t*) data_out;
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hal->rcv_buffer = data_in;
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spi_hal_setup_trans(hal);
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spi_hal_prepare_data(hal);
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spi_hal_user_start(hal);
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if (len >= 16 && false) {
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if (len >= SOC_SPI_MAXIMUM_BUFFER_SIZE && false) {
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// Set up the interrupt and wait on the lock.
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} else {
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while (!spi_hal_usr_is_done(hal)) {
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RUN_BACKGROUND_TASKS();
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RUN_BACKGROUND_TASKS;
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}
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}
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return false;
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return true;
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}
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uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) {
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@ -29,6 +29,9 @@
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#include "common-hal/microcontroller/Pin.h"
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#include "esp-idf/components/driver/include/driver/spi_common_internal.h"
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#include "esp-idf/components/soc/include/hal/spi_hal.h"
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#include "esp-idf/components/soc/include/hal/spi_types.h"
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#include "py/obj.h"
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typedef struct {
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@ -40,8 +43,9 @@ typedef struct {
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spi_bus_lock_dev_handle_t lock;
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spi_hal_context_t hal_context;
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spi_hal_timing_conf_t timing_conf;
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intr_handle_t interrupt;
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uint32_t target_frequency;
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uint32_t real_frequency;
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int32_t real_frequency;
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uint8_t polarity;
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uint8_t phase;
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uint8_t bits;
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@ -1 +1 @@
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Subproject commit 648f959037896cff887a05b67105748790bfe63a
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Subproject commit 160ba4924d8b588e718f76e3a0d0e92c11052fa3
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@ -321,7 +321,7 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self,
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return (status == kStatus_Success);
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}
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) {
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) {
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if (len == 0) {
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return true;
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}
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@ -332,7 +332,7 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uin
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LPSPI_SetDummyData(self->spi, 0xFF);
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lpspi_transfer_t xfer = { 0 };
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xfer.txData = data_out;
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xfer.txData = (uint8_t *)data_out;
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xfer.rxData = data_in;
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xfer.dataSize = len;
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@ -271,13 +271,13 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len,
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return true;
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}
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) {
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) {
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const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3;
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uint8_t *next_chunk_out = data_out;
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const uint8_t *next_chunk_out = data_out;
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uint8_t *next_chunk_in = data_in;
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while (len > 0) {
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uint8_t *chunk_out = next_chunk_out;
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const uint8_t *chunk_out = next_chunk_out;
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size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size);
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if (is_spim3) {
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// If SPIM3, copy into unused RAM block, and do DMA from there.
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@ -380,12 +380,12 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self,
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}
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self,
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uint8_t *data_out, uint8_t *data_in, size_t len) {
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const uint8_t *data_out, uint8_t *data_in, size_t len) {
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if (self->miso == NULL || self->mosi == NULL) {
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mp_raise_ValueError(translate("Missing MISO or MOSI Pin"));
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}
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HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle,
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data_out, data_in, (uint16_t)len,HAL_MAX_DELAY);
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(uint8_t *) data_out, data_in, (uint16_t)len,HAL_MAX_DELAY);
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return result == HAL_OK;
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}
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@ -56,7 +56,7 @@ extern bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *dat
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extern bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value);
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// Reads and write len bytes simultaneously.
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extern bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len);
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extern bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len);
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// Return actual SPI bus frequency.
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uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self);
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