Commit Graph

15 Commits

Author SHA1 Message Date
Scott Shawcroft
0af5dd59f2
Merge pull request #2898 from hierophect/mimxrt-claiming
MIMXRT: Implement pin claiming, pin reset, and pin protections
2020-05-20 11:32:22 -07:00
Lucian Copeland
b310b04007 Remove pin/port distinction 2020-05-19 14:20:07 -04:00
Lucian Copeland
2acd173e14 Implement core requested changes 2020-05-19 13:54:47 -04:00
arturo182
f92d53eaab mimxrt1010: Increase max SPI speed 2020-05-18 22:07:38 +02:00
Lucian Copeland
99538c2414 Implement pin claiming, pin reset, and pin protections 2020-05-15 15:16:51 -04:00
Dave Marples
aadb0bfc1e Fix SPI clock speed on mimxrt10xx family & mimxrt1020 pinmux fixup 2020-02-26 14:28:54 +00:00
Dave Marples
24405cabaf Edits as a result of review 2020-02-19 00:07:01 +00:00
Dave Marples
f0e5341b0f Addition of support for imxt1010, 1050 and 1060 families 2020-02-18 23:16:40 +00:00
Dave Marples
84ad3d8393 Addition of RTS/CTS/RS485 UART functionality 2020-02-18 23:16:40 +00:00
Scott Shawcroft
9d5742ebd1
Fix start on power up by providing Reset_Handler ourselves.
On power up the FlexRAM banks are in an unknown config so we can't
rely on the stack until after we configure FlexRAM.
2020-01-18 11:54:01 -08:00
Scott Shawcroft
7d8dac9211
Refine iMX RT memory layout and add three boards
Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!

The data cache is also now enabled.

Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0

Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-17 17:36:08 -08:00
arturo182
69785cccfe
mimxrt1011: Fix pin definition 2020-01-17 14:45:29 +01:00
arturo182
cc7b57c8d4 mimxrt10xx: Add license for NXP code 2020-01-07 22:07:27 +01:00
arturo182
19803c664f mimxrt10xx: Add info on clock config source 2020-01-07 20:05:57 +01:00
arturo182
13e0cba6f1 Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00