atmel-samd: Rework the clock configs to only be crystalless when needed by the hardware.
This commit is contained in:
Scott Shawcroft
parent
370d1dec88
commit
ae715a827b
@ -140,8 +140,8 @@
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# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
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/* Configure GCLK generator 1 */
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# define CONF_CLOCK_GCLK_1_ENABLE true
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# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY true
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# define CONF_CLOCK_GCLK_1_ENABLE false
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# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_1_PRESCALER 1
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# define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE false
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@ -154,8 +154,8 @@
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# define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE false
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/* Configure GCLK generator 3 */
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# define CONF_CLOCK_GCLK_3_ENABLE false
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# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_3_ENABLE true
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# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY true
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# define CONF_CLOCK_GCLK_3_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_3_PRESCALER 1
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# define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE false
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197
atmel-samd/asf_conf/conf_clocks_external_32k.h
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197
atmel-samd/asf_conf/conf_clocks_external_32k.h
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@ -0,0 +1,197 @@
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/**
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* \file
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*
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* \brief SAM D21 Clock configuration
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*
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* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#include <clock.h>
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#ifndef CONF_CLOCKS_H_INCLUDED
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# define CONF_CLOCKS_H_INCLUDED
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/* System clock bus configuration */
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# define CONF_CLOCK_CPU_CLOCK_FAILURE_DETECT false
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# define CONF_CLOCK_FLASH_WAIT_STATES 2
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# define CONF_CLOCK_CPU_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
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# define CONF_CLOCK_APBA_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
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# define CONF_CLOCK_APBB_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
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# define CONF_CLOCK_APBC_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
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/* SYSTEM_CLOCK_SOURCE_OSC8M configuration - Internal 8MHz oscillator */
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# define CONF_CLOCK_OSC8M_PRESCALER SYSTEM_OSC8M_DIV_1
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# define CONF_CLOCK_OSC8M_ON_DEMAND true
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# define CONF_CLOCK_OSC8M_RUN_IN_STANDBY false
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/* SYSTEM_CLOCK_SOURCE_XOSC configuration - External clock/oscillator */
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# define CONF_CLOCK_XOSC_ENABLE false
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# define CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
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# define CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY 12000000UL
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# define CONF_CLOCK_XOSC_STARTUP_TIME SYSTEM_XOSC_STARTUP_32768
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# define CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL true
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# define CONF_CLOCK_XOSC_ON_DEMAND true
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# define CONF_CLOCK_XOSC_RUN_IN_STANDBY false
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/* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
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# define CONF_CLOCK_XOSC32K_ENABLE true
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# define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
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# define CONF_CLOCK_XOSC32K_STARTUP_TIME SYSTEM_XOSC32K_STARTUP_65536
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# define CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL false
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# define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT false
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# define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT true
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# define CONF_CLOCK_XOSC32K_ON_DEMAND false
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# define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY true
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/* SYSTEM_CLOCK_SOURCE_OSC32K configuration - Internal 32KHz oscillator */
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# define CONF_CLOCK_OSC32K_ENABLE false
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# define CONF_CLOCK_OSC32K_STARTUP_TIME SYSTEM_OSC32K_STARTUP_130
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# define CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT true
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# define CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT true
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# define CONF_CLOCK_OSC32K_ON_DEMAND true
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# define CONF_CLOCK_OSC32K_RUN_IN_STANDBY false
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/* SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop */
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# define CONF_CLOCK_DFLL_ENABLE true
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# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED
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# define CONF_CLOCK_DFLL_ON_DEMAND true
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/* DFLL open loop mode configuration */
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# define CONF_CLOCK_DFLL_FINE_VALUE (512)
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/* DFLL closed loop mode configuration */
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# define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR GCLK_GENERATOR_1
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# define CONF_CLOCK_DFLL_MULTIPLY_FACTOR (48000000 / 32768)
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# define CONF_CLOCK_DFLL_QUICK_LOCK true
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# define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK true
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# define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP true
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# define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE true
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# define CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE (0x1f / 4)
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# define CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE (0xff / 4)
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/* SYSTEM_CLOCK_SOURCE_DPLL configuration - Digital Phase-Locked Loop */
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# define CONF_CLOCK_DPLL_ENABLE false
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# define CONF_CLOCK_DPLL_ON_DEMAND true
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# define CONF_CLOCK_DPLL_RUN_IN_STANDBY false
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# define CONF_CLOCK_DPLL_LOCK_BYPASS false
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# define CONF_CLOCK_DPLL_WAKE_UP_FAST false
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# define CONF_CLOCK_DPLL_LOW_POWER_ENABLE false
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# define CONF_CLOCK_DPLL_LOCK_TIME SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT
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# define CONF_CLOCK_DPLL_REFERENCE_CLOCK SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K
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# define CONF_CLOCK_DPLL_FILTER SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT
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# define CONF_CLOCK_DPLL_REFERENCE_FREQUENCY 32768
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# define CONF_CLOCK_DPLL_REFERENCE_DIVIDER 1
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# define CONF_CLOCK_DPLL_OUTPUT_FREQUENCY 48000000
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/* DPLL GCLK reference configuration */
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# define CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR GCLK_GENERATOR_1
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/* DPLL GCLK lock timer configuration */
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# define CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR GCLK_GENERATOR_1
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/* Set this to true to configure the GCLK when running clocks_init. If set to
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* false, none of the GCLK generators will be configured in clocks_init(). */
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# define CONF_CLOCK_CONFIGURE_GCLK true
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/* Configure GCLK generator 0 (Main Clock) */
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# define CONF_CLOCK_GCLK_0_ENABLE true
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# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
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# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
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# define CONF_CLOCK_GCLK_0_PRESCALER 1
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# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
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/* Configure GCLK generator 1 */
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# define CONF_CLOCK_GCLK_1_ENABLE true
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# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
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# define CONF_CLOCK_GCLK_1_PRESCALER 1
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# define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE true
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/* Configure GCLK generator 2 (RTC) */
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# define CONF_CLOCK_GCLK_2_ENABLE false
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# define CONF_CLOCK_GCLK_2_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_2_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC32K
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# define CONF_CLOCK_GCLK_2_PRESCALER 32
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# define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE false
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/* Configure GCLK generator 3 */
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# define CONF_CLOCK_GCLK_3_ENABLE true
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# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY true
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# define CONF_CLOCK_GCLK_3_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_3_PRESCALER 1
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# define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE false
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/* Configure GCLK generator 4 */
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# define CONF_CLOCK_GCLK_4_ENABLE false
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# define CONF_CLOCK_GCLK_4_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_4_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_4_PRESCALER 1
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# define CONF_CLOCK_GCLK_4_OUTPUT_ENABLE false
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/* Configure GCLK generator 5 */
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# define CONF_CLOCK_GCLK_5_ENABLE false
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# define CONF_CLOCK_GCLK_5_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_5_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_5_PRESCALER 1
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# define CONF_CLOCK_GCLK_5_OUTPUT_ENABLE false
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/* Configure GCLK generator 6 */
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# define CONF_CLOCK_GCLK_6_ENABLE false
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# define CONF_CLOCK_GCLK_6_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_6_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_6_PRESCALER 1
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# define CONF_CLOCK_GCLK_6_OUTPUT_ENABLE false
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/* Configure GCLK generator 7 */
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# define CONF_CLOCK_GCLK_7_ENABLE false
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# define CONF_CLOCK_GCLK_7_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_7_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_7_PRESCALER 1
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# define CONF_CLOCK_GCLK_7_OUTPUT_ENABLE false
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/* Configure GCLK generator 8 */
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# define CONF_CLOCK_GCLK_8_ENABLE false
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# define CONF_CLOCK_GCLK_8_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_8_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_8_PRESCALER 1
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# define CONF_CLOCK_GCLK_8_OUTPUT_ENABLE false
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#endif /* CONF_CLOCKS_H_INCLUDED */
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1
atmel-samd/boards/arduino_zero/conf_clocks.h
Normal file
1
atmel-samd/boards/arduino_zero/conf_clocks.h
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@ -0,0 +1 @@
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#include "conf_clocks_external_32k.h"
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1
atmel-samd/boards/cplay_m0_flash/conf_clocks.h
Normal file
1
atmel-samd/boards/cplay_m0_flash/conf_clocks.h
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@ -0,0 +1 @@
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#include "conf_clocks_crystalless.h"
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@ -36,3 +36,5 @@
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#include "spi_flash.h"
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#define BOARD_FLASH_SIZE (0x00040000 - 0x2000)
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#define CRYSTALLESS 1
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@ -1,4 +1,4 @@
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LD_FILE = boards/samd21x18-bootloader-external-flash.ld
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LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld
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USB_VID = 0x239A
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USB_PID = 0x8015
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1
atmel-samd/boards/feather_m0_adalogger/conf_clocks.h
Normal file
1
atmel-samd/boards/feather_m0_adalogger/conf_clocks.h
Normal file
@ -0,0 +1 @@
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#include "conf_clocks_external_32k.h"
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1
atmel-samd/boards/feather_m0_basic/conf_clocks.h
Normal file
1
atmel-samd/boards/feather_m0_basic/conf_clocks.h
Normal file
@ -0,0 +1 @@
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#include "conf_clocks_external_32k.h"
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1
atmel-samd/boards/feather_m0_flash/conf_clocks.h
Normal file
1
atmel-samd/boards/feather_m0_flash/conf_clocks.h
Normal file
@ -0,0 +1 @@
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#include "conf_clocks_external_32k.h"
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1
atmel-samd/boards/gemma_m0/conf_clocks.h
Normal file
1
atmel-samd/boards/gemma_m0/conf_clocks.h
Normal file
@ -0,0 +1 @@
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#include "conf_clocks_crystalless.h"
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@ -14,3 +14,5 @@
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#include "internal_flash.h"
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#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000)
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#define CRYSTALLESS 1
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@ -1,4 +1,4 @@
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LD_FILE = boards/samd21x18-bootloader.ld
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LD_FILE = boards/samd21x18-bootloader-crystalless.ld
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USB_VID = 0x239A
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USB_PID = 0x8015
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1
atmel-samd/boards/metro_m0_flash/conf_clocks.h
Normal file
1
atmel-samd/boards/metro_m0_flash/conf_clocks.h
Normal file
@ -0,0 +1 @@
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#include "conf_clocks_external_32k.h"
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82
atmel-samd/boards/samd21x18-bootloader-crystalless.ld
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82
atmel-samd/boards/samd21x18-bootloader-crystalless.ld
Normal file
@ -0,0 +1,82 @@
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/*
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GNU linker script for SAMD21
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*/
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/* Specify the memory areas */
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MEMORY
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{
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/* Leave 8KiB for the bootloader, 256b for persistent config (clock), and 64k for the flash file system. */
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FLASH (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000 - 0x2000 - 0x100 - 0x010000
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
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}
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/* top end of the stack */
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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/* define output sections */
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SECTIONS
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{
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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_sfixed = .;
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KEEP(*(.vectors)) /* isr vector table */
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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_etext = .; /* define a global symbol at end of code */
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} >FLASH
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.ARM.exidx :
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{
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*(.ARM.exidx*)
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*(.gnu.linkonce.armexidx.*)
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_sidata = .; /* This is used by the startup in order to initialize the .data section */
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} > FLASH
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/* This is the initialized data section
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The program executes knowing that the data is in the RAM
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but the loader puts the initial values in the FLASH (inidata).
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It is one task of the startup to copy the initial values from FLASH to RAM. */
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.data : AT ( _sidata )
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{
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. = ALIGN(4);
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_srelocate = .; /* create a global symbol at data start; used by startup code in order to initialize the .data section in RAM */
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*(.ramfunc)
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*(.ramfunc*)
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_erelocate = .; /* define a global symbol at data end; used by startup code in order to initialize the .data section in RAM */
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} >RAM
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/* Uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .;
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_szero = .; /* define a global symbol at bss start; used by startup code */
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ezero = .; /* define a global symbol at bss end; used by startup code */
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_ebss = .;
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} >RAM
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/* this just checks there is enough RAM for a minimal stack */
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.stack :
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{
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. = ALIGN(4);
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. = . + 0x800; /* Reserve a minimum of 2K for the stack. */
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. = ALIGN(4);
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} >RAM
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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@ -0,0 +1,81 @@
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/*
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GNU linker script for SAMD21
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*/
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x00000000 + 0x2000, LENGTH = 0x00040000 - 0x2000 - 0x100 /* Leave 8KiB for the bootloader and 256b for config. */
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
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}
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/* top end of the stack */
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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/* define output sections */
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SECTIONS
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{
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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_sfixed = .;
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KEEP(*(.vectors)) /* isr vector table */
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbol at end of code */
|
||||
} >FLASH
|
||||
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx*)
|
||||
*(.gnu.linkonce.armexidx.*)
|
||||
_sidata = .; /* This is used by the startup in order to initialize the .data section */
|
||||
} > FLASH
|
||||
|
||||
/* This is the initialized data section
|
||||
The program executes knowing that the data is in the RAM
|
||||
but the loader puts the initial values in the FLASH (inidata).
|
||||
It is one task of the startup to copy the initial values from FLASH to RAM. */
|
||||
.data : AT ( _sidata )
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
|
||||
*(.ramfunc)
|
||||
*(.ramfunc*)
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
|
||||
} >RAM
|
||||
|
||||
/* Uninitialized data section */
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = .;
|
||||
_szero = .; /* define a global symbol at bss start; used by startup code */
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ezero = .; /* define a global symbol at bss end; used by startup code */
|
||||
_ebss = .;
|
||||
} >RAM
|
||||
|
||||
/* this just checks there is enough RAM for a minimal stack */
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
. = . + 0x800; /* Reserve a minimum of 2K for the stack. */
|
||||
. = ALIGN(4);
|
||||
} >RAM
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
@ -5,7 +5,7 @@
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00000000 + 0x2000, LENGTH = 0x00040000 - 0x2000 - 0x100 /* Leave 8KiB for the bootloader and 256b for config. */
|
||||
FLASH (rx) : ORIGIN = 0x00000000 + 0x2000, LENGTH = 0x00040000 - 0x2000 /* Leave 8KiB for the bootloader. */
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
|
||||
}
|
||||
|
||||
|
||||
@ -5,8 +5,8 @@
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
/* Leave 8KiB for the bootloader, 256b for persistant config (clock), and 64k for the flash file system. */
|
||||
FLASH (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000 - 0x2000 - 0x100 - 0x010000
|
||||
/* Leave 8KiB for the bootloader and 64k for the flash file system. */
|
||||
FLASH (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000 - 0x2000 - 0x010000
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
|
||||
}
|
||||
|
||||
|
||||
1
atmel-samd/boards/trinket_m0/conf_clocks.h
Normal file
1
atmel-samd/boards/trinket_m0/conf_clocks.h
Normal file
@ -0,0 +1 @@
|
||||
#include "conf_clocks_crystalless.h"
|
||||
@ -14,3 +14,5 @@
|
||||
#include "internal_flash.h"
|
||||
|
||||
#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000)
|
||||
|
||||
#define CRYSTALLESS 1
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
LD_FILE = boards/samd21x18-bootloader.ld
|
||||
LD_FILE = boards/samd21x18-bootloader-crystalless.ld
|
||||
USB_VID = 0x239A
|
||||
USB_PID = 0x8015
|
||||
|
||||
|
||||
@ -219,7 +219,7 @@ void common_hal_nativeio_touchin_construct(nativeio_touchin_obj_t* self,
|
||||
/* Setup and enable generic clock source for PTC module. */
|
||||
struct system_gclk_chan_config gclk_chan_conf;
|
||||
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
|
||||
gclk_chan_conf.source_generator = GCLK_GENERATOR_1;
|
||||
gclk_chan_conf.source_generator = GCLK_GENERATOR_3;
|
||||
system_gclk_chan_set_config(PTC_GCLK_ID, &gclk_chan_conf);
|
||||
system_gclk_chan_enable(PTC_GCLK_ID);
|
||||
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, PM_APBCMASK_PTC);
|
||||
|
||||
@ -39,7 +39,6 @@
|
||||
#include "rgb_led_status.h"
|
||||
#include "tick.h"
|
||||
|
||||
|
||||
fs_user_mount_t fs_user_mount_flash;
|
||||
|
||||
void do_str(const char *src, mp_parse_input_kind_t input_kind) {
|
||||
@ -184,6 +183,7 @@ void reset_samd21(void) {
|
||||
|
||||
pwmout_reset();
|
||||
|
||||
#ifdef CRYSTALLESS
|
||||
// If we are on USB lets double check our fine calibration for the clock and
|
||||
// save the new value if its different enough.
|
||||
if (mp_msc_enabled) {
|
||||
@ -228,6 +228,7 @@ void reset_samd21(void) {
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
bool maybe_run(const char* filename, pyexec_result_t* exec_result) {
|
||||
@ -460,13 +461,16 @@ void samd21_init(void) {
|
||||
// Initialize the sleep manager
|
||||
sleepmgr_init();
|
||||
|
||||
|
||||
uint16_t dfll_fine_calibration = 0x1ff;
|
||||
#ifdef CRYSTALLESS
|
||||
// This is stored in an NVM page after the text and data storage but before
|
||||
// the optional file system. The first 16 bytes are the identifier for the
|
||||
// section.
|
||||
if (strcmp((char*) INTERNAL_CIRCUITPY_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) {
|
||||
dfll_fine_calibration = ((uint16_t *) INTERNAL_CIRCUITPY_CONFIG_START_ADDR)[8];
|
||||
}
|
||||
#endif
|
||||
|
||||
// We pass in the DFLL fine calibration because we can't change it once the
|
||||
// clock is going.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user