diff --git a/atmel-samd/asf_conf/conf_clocks.h b/atmel-samd/asf_conf/conf_clocks_crystalless.h
similarity index 97%
rename from atmel-samd/asf_conf/conf_clocks.h
rename to atmel-samd/asf_conf/conf_clocks_crystalless.h
index 372608f749..5e7ad962db 100644
--- a/atmel-samd/asf_conf/conf_clocks.h
+++ b/atmel-samd/asf_conf/conf_clocks_crystalless.h
@@ -140,8 +140,8 @@
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
/* Configure GCLK generator 1 */
-# define CONF_CLOCK_GCLK_1_ENABLE true
-# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY true
+# define CONF_CLOCK_GCLK_1_ENABLE false
+# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_1_PRESCALER 1
# define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE false
@@ -154,8 +154,8 @@
# define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE false
/* Configure GCLK generator 3 */
-# define CONF_CLOCK_GCLK_3_ENABLE false
-# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_3_ENABLE true
+# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY true
# define CONF_CLOCK_GCLK_3_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_3_PRESCALER 1
# define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE false
diff --git a/atmel-samd/asf_conf/conf_clocks_external_32k.h b/atmel-samd/asf_conf/conf_clocks_external_32k.h
new file mode 100644
index 0000000000..5af6ad4d62
--- /dev/null
+++ b/atmel-samd/asf_conf/conf_clocks_external_32k.h
@@ -0,0 +1,197 @@
+/**
+ * \file
+ *
+ * \brief SAM D21 Clock configuration
+ *
+ * Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ * Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit Atmel Support
+ */
+#include
+
+#ifndef CONF_CLOCKS_H_INCLUDED
+# define CONF_CLOCKS_H_INCLUDED
+
+/* System clock bus configuration */
+# define CONF_CLOCK_CPU_CLOCK_FAILURE_DETECT false
+# define CONF_CLOCK_FLASH_WAIT_STATES 2
+# define CONF_CLOCK_CPU_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
+# define CONF_CLOCK_APBA_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
+# define CONF_CLOCK_APBB_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
+# define CONF_CLOCK_APBC_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
+
+/* SYSTEM_CLOCK_SOURCE_OSC8M configuration - Internal 8MHz oscillator */
+# define CONF_CLOCK_OSC8M_PRESCALER SYSTEM_OSC8M_DIV_1
+# define CONF_CLOCK_OSC8M_ON_DEMAND true
+# define CONF_CLOCK_OSC8M_RUN_IN_STANDBY false
+
+/* SYSTEM_CLOCK_SOURCE_XOSC configuration - External clock/oscillator */
+# define CONF_CLOCK_XOSC_ENABLE false
+# define CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
+# define CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY 12000000UL
+# define CONF_CLOCK_XOSC_STARTUP_TIME SYSTEM_XOSC_STARTUP_32768
+# define CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL true
+# define CONF_CLOCK_XOSC_ON_DEMAND true
+# define CONF_CLOCK_XOSC_RUN_IN_STANDBY false
+
+/* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
+# define CONF_CLOCK_XOSC32K_ENABLE true
+# define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
+# define CONF_CLOCK_XOSC32K_STARTUP_TIME SYSTEM_XOSC32K_STARTUP_65536
+# define CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL false
+# define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT false
+# define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT true
+# define CONF_CLOCK_XOSC32K_ON_DEMAND false
+# define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY true
+
+/* SYSTEM_CLOCK_SOURCE_OSC32K configuration - Internal 32KHz oscillator */
+# define CONF_CLOCK_OSC32K_ENABLE false
+# define CONF_CLOCK_OSC32K_STARTUP_TIME SYSTEM_OSC32K_STARTUP_130
+# define CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT true
+# define CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT true
+# define CONF_CLOCK_OSC32K_ON_DEMAND true
+# define CONF_CLOCK_OSC32K_RUN_IN_STANDBY false
+
+/* SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop */
+# define CONF_CLOCK_DFLL_ENABLE true
+# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED
+# define CONF_CLOCK_DFLL_ON_DEMAND true
+
+/* DFLL open loop mode configuration */
+# define CONF_CLOCK_DFLL_FINE_VALUE (512)
+
+/* DFLL closed loop mode configuration */
+# define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR GCLK_GENERATOR_1
+# define CONF_CLOCK_DFLL_MULTIPLY_FACTOR (48000000 / 32768)
+# define CONF_CLOCK_DFLL_QUICK_LOCK true
+# define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK true
+# define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP true
+# define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE true
+# define CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE (0x1f / 4)
+# define CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE (0xff / 4)
+
+/* SYSTEM_CLOCK_SOURCE_DPLL configuration - Digital Phase-Locked Loop */
+# define CONF_CLOCK_DPLL_ENABLE false
+# define CONF_CLOCK_DPLL_ON_DEMAND true
+# define CONF_CLOCK_DPLL_RUN_IN_STANDBY false
+# define CONF_CLOCK_DPLL_LOCK_BYPASS false
+# define CONF_CLOCK_DPLL_WAKE_UP_FAST false
+# define CONF_CLOCK_DPLL_LOW_POWER_ENABLE false
+
+# define CONF_CLOCK_DPLL_LOCK_TIME SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT
+# define CONF_CLOCK_DPLL_REFERENCE_CLOCK SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K
+# define CONF_CLOCK_DPLL_FILTER SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT
+
+# define CONF_CLOCK_DPLL_REFERENCE_FREQUENCY 32768
+# define CONF_CLOCK_DPLL_REFERENCE_DIVIDER 1
+# define CONF_CLOCK_DPLL_OUTPUT_FREQUENCY 48000000
+
+/* DPLL GCLK reference configuration */
+# define CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR GCLK_GENERATOR_1
+/* DPLL GCLK lock timer configuration */
+# define CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR GCLK_GENERATOR_1
+
+/* Set this to true to configure the GCLK when running clocks_init. If set to
+ * false, none of the GCLK generators will be configured in clocks_init(). */
+# define CONF_CLOCK_CONFIGURE_GCLK true
+
+/* Configure GCLK generator 0 (Main Clock) */
+# define CONF_CLOCK_GCLK_0_ENABLE true
+# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
+# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
+# define CONF_CLOCK_GCLK_0_PRESCALER 1
+# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 1 */
+# define CONF_CLOCK_GCLK_1_ENABLE true
+# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
+# define CONF_CLOCK_GCLK_1_PRESCALER 1
+# define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE true
+
+/* Configure GCLK generator 2 (RTC) */
+# define CONF_CLOCK_GCLK_2_ENABLE false
+# define CONF_CLOCK_GCLK_2_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_2_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC32K
+# define CONF_CLOCK_GCLK_2_PRESCALER 32
+# define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 3 */
+# define CONF_CLOCK_GCLK_3_ENABLE true
+# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY true
+# define CONF_CLOCK_GCLK_3_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
+# define CONF_CLOCK_GCLK_3_PRESCALER 1
+# define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 4 */
+# define CONF_CLOCK_GCLK_4_ENABLE false
+# define CONF_CLOCK_GCLK_4_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_4_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
+# define CONF_CLOCK_GCLK_4_PRESCALER 1
+# define CONF_CLOCK_GCLK_4_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 5 */
+# define CONF_CLOCK_GCLK_5_ENABLE false
+# define CONF_CLOCK_GCLK_5_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_5_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
+# define CONF_CLOCK_GCLK_5_PRESCALER 1
+# define CONF_CLOCK_GCLK_5_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 6 */
+# define CONF_CLOCK_GCLK_6_ENABLE false
+# define CONF_CLOCK_GCLK_6_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_6_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
+# define CONF_CLOCK_GCLK_6_PRESCALER 1
+# define CONF_CLOCK_GCLK_6_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 7 */
+# define CONF_CLOCK_GCLK_7_ENABLE false
+# define CONF_CLOCK_GCLK_7_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_7_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
+# define CONF_CLOCK_GCLK_7_PRESCALER 1
+# define CONF_CLOCK_GCLK_7_OUTPUT_ENABLE false
+
+/* Configure GCLK generator 8 */
+# define CONF_CLOCK_GCLK_8_ENABLE false
+# define CONF_CLOCK_GCLK_8_RUN_IN_STANDBY false
+# define CONF_CLOCK_GCLK_8_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
+# define CONF_CLOCK_GCLK_8_PRESCALER 1
+# define CONF_CLOCK_GCLK_8_OUTPUT_ENABLE false
+
+#endif /* CONF_CLOCKS_H_INCLUDED */
diff --git a/atmel-samd/boards/arduino_zero/conf_clocks.h b/atmel-samd/boards/arduino_zero/conf_clocks.h
new file mode 100644
index 0000000000..d3f3e6496d
--- /dev/null
+++ b/atmel-samd/boards/arduino_zero/conf_clocks.h
@@ -0,0 +1 @@
+#include "conf_clocks_external_32k.h"
diff --git a/atmel-samd/boards/cplay_m0_flash/conf_clocks.h b/atmel-samd/boards/cplay_m0_flash/conf_clocks.h
new file mode 100644
index 0000000000..9e4f7876be
--- /dev/null
+++ b/atmel-samd/boards/cplay_m0_flash/conf_clocks.h
@@ -0,0 +1 @@
+#include "conf_clocks_crystalless.h"
diff --git a/atmel-samd/boards/cplay_m0_flash/mpconfigboard.h b/atmel-samd/boards/cplay_m0_flash/mpconfigboard.h
index 7ccd955596..942da9cfd0 100644
--- a/atmel-samd/boards/cplay_m0_flash/mpconfigboard.h
+++ b/atmel-samd/boards/cplay_m0_flash/mpconfigboard.h
@@ -36,3 +36,5 @@
#include "spi_flash.h"
#define BOARD_FLASH_SIZE (0x00040000 - 0x2000)
+
+#define CRYSTALLESS 1
diff --git a/atmel-samd/boards/cplay_m0_flash/mpconfigboard.mk b/atmel-samd/boards/cplay_m0_flash/mpconfigboard.mk
index 8b6d61bbb4..514c55a208 100644
--- a/atmel-samd/boards/cplay_m0_flash/mpconfigboard.mk
+++ b/atmel-samd/boards/cplay_m0_flash/mpconfigboard.mk
@@ -1,4 +1,4 @@
-LD_FILE = boards/samd21x18-bootloader-external-flash.ld
+LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld
USB_VID = 0x239A
USB_PID = 0x8015
diff --git a/atmel-samd/boards/feather_m0_adalogger/conf_clocks.h b/atmel-samd/boards/feather_m0_adalogger/conf_clocks.h
new file mode 100644
index 0000000000..d3f3e6496d
--- /dev/null
+++ b/atmel-samd/boards/feather_m0_adalogger/conf_clocks.h
@@ -0,0 +1 @@
+#include "conf_clocks_external_32k.h"
diff --git a/atmel-samd/boards/feather_m0_basic/conf_clocks.h b/atmel-samd/boards/feather_m0_basic/conf_clocks.h
new file mode 100644
index 0000000000..d3f3e6496d
--- /dev/null
+++ b/atmel-samd/boards/feather_m0_basic/conf_clocks.h
@@ -0,0 +1 @@
+#include "conf_clocks_external_32k.h"
diff --git a/atmel-samd/boards/feather_m0_flash/conf_clocks.h b/atmel-samd/boards/feather_m0_flash/conf_clocks.h
new file mode 100644
index 0000000000..d3f3e6496d
--- /dev/null
+++ b/atmel-samd/boards/feather_m0_flash/conf_clocks.h
@@ -0,0 +1 @@
+#include "conf_clocks_external_32k.h"
diff --git a/atmel-samd/boards/gemma_m0/conf_clocks.h b/atmel-samd/boards/gemma_m0/conf_clocks.h
new file mode 100644
index 0000000000..9e4f7876be
--- /dev/null
+++ b/atmel-samd/boards/gemma_m0/conf_clocks.h
@@ -0,0 +1 @@
+#include "conf_clocks_crystalless.h"
diff --git a/atmel-samd/boards/gemma_m0/mpconfigboard.h b/atmel-samd/boards/gemma_m0/mpconfigboard.h
index 165522fab7..1b1e635a66 100644
--- a/atmel-samd/boards/gemma_m0/mpconfigboard.h
+++ b/atmel-samd/boards/gemma_m0/mpconfigboard.h
@@ -14,3 +14,5 @@
#include "internal_flash.h"
#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000)
+
+#define CRYSTALLESS 1
diff --git a/atmel-samd/boards/gemma_m0/mpconfigboard.mk b/atmel-samd/boards/gemma_m0/mpconfigboard.mk
index 8e1b732081..99ddbafadf 100644
--- a/atmel-samd/boards/gemma_m0/mpconfigboard.mk
+++ b/atmel-samd/boards/gemma_m0/mpconfigboard.mk
@@ -1,4 +1,4 @@
-LD_FILE = boards/samd21x18-bootloader.ld
+LD_FILE = boards/samd21x18-bootloader-crystalless.ld
USB_VID = 0x239A
USB_PID = 0x8015
diff --git a/atmel-samd/boards/metro_m0_flash/conf_clocks.h b/atmel-samd/boards/metro_m0_flash/conf_clocks.h
new file mode 100644
index 0000000000..d3f3e6496d
--- /dev/null
+++ b/atmel-samd/boards/metro_m0_flash/conf_clocks.h
@@ -0,0 +1 @@
+#include "conf_clocks_external_32k.h"
diff --git a/atmel-samd/boards/samd21x18-bootloader-crystalless.ld b/atmel-samd/boards/samd21x18-bootloader-crystalless.ld
new file mode 100644
index 0000000000..96527ab7e5
--- /dev/null
+++ b/atmel-samd/boards/samd21x18-bootloader-crystalless.ld
@@ -0,0 +1,82 @@
+/*
+ GNU linker script for SAMD21
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+ /* Leave 8KiB for the bootloader, 256b for persistent config (clock), and 64k for the flash file system. */
+ FLASH (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000 - 0x2000 - 0x100 - 0x010000
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
+}
+
+/* top end of the stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* define output sections */
+SECTIONS
+{
+ /* The program code and other data goes into FLASH */
+ .text :
+ {
+ . = ALIGN(4);
+ _sfixed = .;
+ KEEP(*(.vectors)) /* isr vector table */
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbol at end of code */
+ } >FLASH
+
+ .ARM.exidx :
+ {
+ *(.ARM.exidx*)
+ *(.gnu.linkonce.armexidx.*)
+ _sidata = .; /* This is used by the startup in order to initialize the .data section */
+ } > FLASH
+
+ /* This is the initialized data section
+ The program executes knowing that the data is in the RAM
+ but the loader puts the initial values in the FLASH (inidata).
+ It is one task of the startup to copy the initial values from FLASH to RAM. */
+ .data : AT ( _sidata )
+ {
+ . = ALIGN(4);
+ _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialize the .data section in RAM */
+ *(.ramfunc)
+ *(.ramfunc*)
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialize the .data section in RAM */
+ } >RAM
+
+ /* Uninitialized data section */
+ .bss :
+ {
+ . = ALIGN(4);
+ _sbss = .;
+ _szero = .; /* define a global symbol at bss start; used by startup code */
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ezero = .; /* define a global symbol at bss end; used by startup code */
+ _ebss = .;
+ } >RAM
+
+ /* this just checks there is enough RAM for a minimal stack */
+ .stack :
+ {
+ . = ALIGN(4);
+ . = . + 0x800; /* Reserve a minimum of 2K for the stack. */
+ . = ALIGN(4);
+ } >RAM
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/atmel-samd/boards/samd21x18-bootloader-external-flash-crystalless.ld b/atmel-samd/boards/samd21x18-bootloader-external-flash-crystalless.ld
new file mode 100644
index 0000000000..a6be02f90f
--- /dev/null
+++ b/atmel-samd/boards/samd21x18-bootloader-external-flash-crystalless.ld
@@ -0,0 +1,81 @@
+/*
+ GNU linker script for SAMD21
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000 + 0x2000, LENGTH = 0x00040000 - 0x2000 - 0x100 /* Leave 8KiB for the bootloader and 256b for config. */
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
+}
+
+/* top end of the stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* define output sections */
+SECTIONS
+{
+ /* The program code and other data goes into FLASH */
+ .text :
+ {
+ . = ALIGN(4);
+ _sfixed = .;
+ KEEP(*(.vectors)) /* isr vector table */
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbol at end of code */
+ } >FLASH
+
+ .ARM.exidx :
+ {
+ *(.ARM.exidx*)
+ *(.gnu.linkonce.armexidx.*)
+ _sidata = .; /* This is used by the startup in order to initialize the .data section */
+ } > FLASH
+
+ /* This is the initialized data section
+ The program executes knowing that the data is in the RAM
+ but the loader puts the initial values in the FLASH (inidata).
+ It is one task of the startup to copy the initial values from FLASH to RAM. */
+ .data : AT ( _sidata )
+ {
+ . = ALIGN(4);
+ _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
+ *(.ramfunc)
+ *(.ramfunc*)
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _erelocate = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
+ } >RAM
+
+ /* Uninitialized data section */
+ .bss :
+ {
+ . = ALIGN(4);
+ _sbss = .;
+ _szero = .; /* define a global symbol at bss start; used by startup code */
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ezero = .; /* define a global symbol at bss end; used by startup code */
+ _ebss = .;
+ } >RAM
+
+ /* this just checks there is enough RAM for a minimal stack */
+ .stack :
+ {
+ . = ALIGN(4);
+ . = . + 0x800; /* Reserve a minimum of 2K for the stack. */
+ . = ALIGN(4);
+ } >RAM
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/atmel-samd/boards/samd21x18-bootloader-external-flash.ld b/atmel-samd/boards/samd21x18-bootloader-external-flash.ld
index a6be02f90f..bb1d3fdc44 100644
--- a/atmel-samd/boards/samd21x18-bootloader-external-flash.ld
+++ b/atmel-samd/boards/samd21x18-bootloader-external-flash.ld
@@ -5,7 +5,7 @@
/* Specify the memory areas */
MEMORY
{
- FLASH (rx) : ORIGIN = 0x00000000 + 0x2000, LENGTH = 0x00040000 - 0x2000 - 0x100 /* Leave 8KiB for the bootloader and 256b for config. */
+ FLASH (rx) : ORIGIN = 0x00000000 + 0x2000, LENGTH = 0x00040000 - 0x2000 /* Leave 8KiB for the bootloader. */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
}
diff --git a/atmel-samd/boards/samd21x18-bootloader.ld b/atmel-samd/boards/samd21x18-bootloader.ld
index 4e3312bf03..0ea475ede1 100644
--- a/atmel-samd/boards/samd21x18-bootloader.ld
+++ b/atmel-samd/boards/samd21x18-bootloader.ld
@@ -5,8 +5,8 @@
/* Specify the memory areas */
MEMORY
{
- /* Leave 8KiB for the bootloader, 256b for persistant config (clock), and 64k for the flash file system. */
- FLASH (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000 - 0x2000 - 0x100 - 0x010000
+ /* Leave 8KiB for the bootloader and 64k for the flash file system. */
+ FLASH (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000 - 0x2000 - 0x010000
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x008000 /* 32 KiB */
}
diff --git a/atmel-samd/boards/trinket_m0/conf_clocks.h b/atmel-samd/boards/trinket_m0/conf_clocks.h
new file mode 100644
index 0000000000..9e4f7876be
--- /dev/null
+++ b/atmel-samd/boards/trinket_m0/conf_clocks.h
@@ -0,0 +1 @@
+#include "conf_clocks_crystalless.h"
diff --git a/atmel-samd/boards/trinket_m0/mpconfigboard.h b/atmel-samd/boards/trinket_m0/mpconfigboard.h
index e72b0a8eb8..693b2b7308 100644
--- a/atmel-samd/boards/trinket_m0/mpconfigboard.h
+++ b/atmel-samd/boards/trinket_m0/mpconfigboard.h
@@ -14,3 +14,5 @@
#include "internal_flash.h"
#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000)
+
+#define CRYSTALLESS 1
diff --git a/atmel-samd/boards/trinket_m0/mpconfigboard.mk b/atmel-samd/boards/trinket_m0/mpconfigboard.mk
index 8e1b732081..99ddbafadf 100644
--- a/atmel-samd/boards/trinket_m0/mpconfigboard.mk
+++ b/atmel-samd/boards/trinket_m0/mpconfigboard.mk
@@ -1,4 +1,4 @@
-LD_FILE = boards/samd21x18-bootloader.ld
+LD_FILE = boards/samd21x18-bootloader-crystalless.ld
USB_VID = 0x239A
USB_PID = 0x8015
diff --git a/atmel-samd/common-hal/nativeio/TouchIn.c b/atmel-samd/common-hal/nativeio/TouchIn.c
index 324f0cf2a1..901fe9e707 100644
--- a/atmel-samd/common-hal/nativeio/TouchIn.c
+++ b/atmel-samd/common-hal/nativeio/TouchIn.c
@@ -219,7 +219,7 @@ void common_hal_nativeio_touchin_construct(nativeio_touchin_obj_t* self,
/* Setup and enable generic clock source for PTC module. */
struct system_gclk_chan_config gclk_chan_conf;
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
- gclk_chan_conf.source_generator = GCLK_GENERATOR_1;
+ gclk_chan_conf.source_generator = GCLK_GENERATOR_3;
system_gclk_chan_set_config(PTC_GCLK_ID, &gclk_chan_conf);
system_gclk_chan_enable(PTC_GCLK_ID);
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, PM_APBCMASK_PTC);
diff --git a/atmel-samd/main.c b/atmel-samd/main.c
index f05195f5bc..d01ea86685 100644
--- a/atmel-samd/main.c
+++ b/atmel-samd/main.c
@@ -39,7 +39,6 @@
#include "rgb_led_status.h"
#include "tick.h"
-
fs_user_mount_t fs_user_mount_flash;
void do_str(const char *src, mp_parse_input_kind_t input_kind) {
@@ -184,6 +183,7 @@ void reset_samd21(void) {
pwmout_reset();
+#ifdef CRYSTALLESS
// If we are on USB lets double check our fine calibration for the clock and
// save the new value if its different enough.
if (mp_msc_enabled) {
@@ -228,6 +228,7 @@ void reset_samd21(void) {
}
}
}
+#endif
}
bool maybe_run(const char* filename, pyexec_result_t* exec_result) {
@@ -460,13 +461,16 @@ void samd21_init(void) {
// Initialize the sleep manager
sleepmgr_init();
+
uint16_t dfll_fine_calibration = 0x1ff;
+#ifdef CRYSTALLESS
// This is stored in an NVM page after the text and data storage but before
// the optional file system. The first 16 bytes are the identifier for the
// section.
if (strcmp((char*) INTERNAL_CIRCUITPY_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) {
dfll_fine_calibration = ((uint16_t *) INTERNAL_CIRCUITPY_CONFIG_START_ADDR)[8];
}
+#endif
// We pass in the DFLL fine calibration because we can't change it once the
// clock is going.