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Linker file restructure, TCM and MPU additions

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This commit is contained in:
Lucian Copeland 2020-04-02 16:15:12 -04:00
parent 47a5d83267
commit 9761672d42
36 changed files with 409 additions and 1136 deletions
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17
ports/stm/Makefile
View File

@ -93,7 +93,8 @@ endif
# MCU Series is defined by the HAL package and doesn't need to be specified here # MCU Series is defined by the HAL package and doesn't need to be specified here
C_DEFS = -D$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(MCU_VARIANT) C_DEFS = -D$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(MCU_VARIANT)
CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) CFLAGS += $(INC) -Werror -Wall -std=gnu11 $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
# Removed -nostdlib since it conflicts with stm32 startup files
# Undo some warnings. # Undo some warnings.
# STM32 HAL uses undefined preprocessor variables, shadowed variables, casts that change alignment reqs # STM32 HAL uses undefined preprocessor variables, shadowed variables, casts that change alignment reqs
@ -107,6 +108,7 @@ MCU_FLAGS_F7 = -mcpu=cortex-m7
MCU_FLAGS_H7 = -mcpu=cortex-m7 MCU_FLAGS_H7 = -mcpu=cortex-m7
CFLAGS += $(MCU_FLAGS_$(MCU_SERIES)) CFLAGS += $(MCU_FLAGS_$(MCU_SERIES))
# Select HAL file for distribution via mpconfigport
CFLAGS += -DSTM32_HAL_H='<stm32$(MCU_SERIES_LOWER)xx_hal.h>' CFLAGS += -DSTM32_HAL_H='<stm32$(MCU_SERIES_LOWER)xx_hal.h>'
# Floating point settings # Floating point settings
@ -132,7 +134,7 @@ ifndef BOOTLOADER_OFFSET
BOOTLOADER_OFFSET := 0x8000000 BOOTLOADER_OFFSET := 0x8000000
endif endif
LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-T,$(LD_COMMON) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
LIBS := -lgcc -lc LIBS := -lgcc -lc
LDFLAGS += -mthumb $(MCU_FLAGS_$(MCU_SERIES)) LDFLAGS += -mthumb $(MCU_FLAGS_$(MCU_SERIES))
@ -143,7 +145,13 @@ LIBS += -lm
endif endif
# TinyUSB defines # TinyUSB defines
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_STM32$(MCU_SERIES) -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_STM32$(MCU_SERIES) \
-DCFG_TUD_CDC_RX_BUFSIZE=1024 \
-DCFG_TUD_CDC_TX_BUFSIZE=1024 \
-DCFG_TUD_MSC_BUFSIZE=4096 \
-DCFG_TUD_MIDI_RX_BUFSIZE=128 \
-DCFG_TUD_MIDI_TX_BUFSIZE=128
SRC_STM32 = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_,\ SRC_STM32 = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_,\
hal_adc.c \ hal_adc.c \
@ -218,7 +226,7 @@ endif
SRC_S = \ SRC_S = \
supervisor/cpu.s \ supervisor/cpu.s \
boards/startup_$(MCU_VARIANT_LOWER).s st_driver/CMSIS/Device/ST/STM32$(MCU_SERIES)xx/Source/Templates/gcc/startup_$(MCU_VARIANT_LOWER).s
SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \
$(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \
@ -241,6 +249,7 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o))
ifeq ($(INTERNAL_LIBM),1) ifeq ($(INTERNAL_LIBM),1)
OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o))
endif endif
#OBJ += $(addprefix $(BUILD)/, $(SRC_O))
OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o))
OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o))

83
ports/stm/boards/STM32F401xd_fs.ld
View File

@ -1,5 +1,5 @@
/* /*
GNU linker script for STM32F401 with bootloader (such as the Meowbit) GNU linker script for STM32F401 with filesystem
*/ */
/* Specify the memory areas */ /* Specify the memory areas */
@ -24,84 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */ /* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F401xe_boot.ld
View File

@ -1,5 +1,5 @@
/* /*
GNU linker script for STM32F401 with bootloader (such as the Meowbit) GNU linker script for STM32F401 with bootloader (such as the Meowbit). No internal fs.
*/ */
/* Specify the memory areas */ /* Specify the memory areas */
@ -24,83 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

81
ports/stm/boards/STM32F401xe_fs.ld
View File

@ -24,84 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */ /* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

80
ports/stm/boards/STM32F405_boot.ld
View File

@ -1,6 +1,5 @@
/* /*
GNU linker script for STM32F405 with bootloader GNU linker script for STM32F405 with bootloader
Based on Micropython
*/ */
/* Specify the memory areas */ /* Specify the memory areas */
@ -26,82 +25,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F405_default.ld
View File

@ -1,5 +1,5 @@
/* /*
GNU linker script for STM32F405 via Micropython GNU linker script for STM32F405, no filesystem
*/ */
/* Specify the memory areas */ /* Specify the memory areas */
@ -25,83 +25,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F405_fs.ld
View File

@ -1,5 +1,5 @@
/* /*
GNU linker script for STM32F405 via Micropython GNU linker script for STM32F405 with filesystem
*/ */
/* Specify the memory areas */ /* Specify the memory areas */
@ -26,83 +26,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F407_fs.ld
View File

@ -1,5 +1,5 @@
/* /*
GNU linker script for STM32F405 via Micropython GNU linker script for STM32F407 with filesystem
*/ */
/* Specify the memory areas */ /* Specify the memory areas */
@ -26,83 +26,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

27
ports/stm/boards/STM32F411_fs.ld Normal file
View File

@ -0,0 +1,27 @@
/*
GNU linker script for STM32F411 with filesystem
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

27
ports/stm/boards/STM32F411_nvm.ld Normal file
View File

@ -0,0 +1,27 @@
/*
GNU linker script for STM32F411 with nvm
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 32K /* sectors 1,2 are 16K */
FLASH_NVM (rwx) : ORIGIN = 0x0800C000, LENGTH = 16K /* sector 3 is 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define the top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

27
ports/stm/boards/STM32F412_fs.ld Normal file
View File

@ -0,0 +1,27 @@
/*
GNU linker script for STM32F412 with filesystem, tcm
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

189
ports/stm/boards/STM32F767ZITx_FLASH.ld
View File

@ -1,189 +0,0 @@
/*
******************************************************************************
**
** File : LinkerScript.ld
**
** Author : Auto-generated by System Workbench for STM32
**
** Abstract : Linker script for STM32F767ZITx series
** 2048Kbytes FLASH and 512Kbytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed “as is,” without any warranty
** of any kind.
**
*****************************************************************************
** @attention
**
** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
** 1. Redistributions of source code must retain the above copyright notice,
** this list of conditions and the following disclaimer.
** 2. Redistributions in binary form must reproduce the above copyright notice,
** this list of conditions and the following disclaimer in the documentation
** and/or other materials provided with the distribution.
** 3. Neither the name of STMicroelectronics nor the names of its contributors
** may be used to endorse or promote products derived from this software
** without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
*****************************************************************************
*/
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = 0x20080000; /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Specify the memory areas */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
/* Constant data goes into FLASH */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

82
ports/stm/boards/STM32F767_fs.ld
View File

@ -1,5 +1,5 @@
/* /*
GNU linker script for STM32F405 via Micropython GNU linker script for STM32F767 with filesystem
*/ */
/* Specify the memory areas */ /* Specify the memory areas */
@ -25,83 +25,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}

179
ports/stm/boards/STM32H743_fs.ld
View File

@ -1,59 +1,11 @@
/* /*
****************************************************************************** GNU linker script for STM32H743 with filesystem, tcm
**
** File : LinkerScript.ld
**
** Author : Auto-generated by System Workbench for STM32
**
** Abstract : Linker script for STM32H743ZITx series
** 2048Kbytes FLASH and 1056Kbytes RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed “as is,” without any warranty
** of any kind.
**
*****************************************************************************
** @attention
**
** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
** 1. Redistributions of source code must retain the above copyright notice,
** this list of conditions and the following disclaimer.
** 2. Redistributions in binary form must reproduce the above copyright notice,
** this list of conditions and the following disclaimer in the documentation
** and/or other materials provided with the distribution.
** 3. Neither the name of STMicroelectronics nor the names of its contributors
** may be used to endorse or promote products derived from this software
** without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
*****************************************************************************
*/ */
/* Entry Point */ /* Entry Point */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
/* Highest address of the user mode stack */ _ld_default_stack_size = 24K;
_estack = 0x20020000; /* end of RAM */
/* Specify the memory areas */ /* Specify the memory areas */
MEMORY MEMORY
@ -79,134 +31,9 @@ _minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just /* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */ aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM); _estack = ORIGIN(DTCM) + LENGTH(DTCM);
/* RAM extents for the garbage collector */ /* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM); _ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM);
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
/* This first flash block is 16K annd the isr vectors only take up
about 400 bytes. Micropython pads this with files, but this didn't
work with the size of Circuitpython's ff object. */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
/* itcm stuff doesn't work, results in arcane hard crashes
.itcm :
{
. = ALIGN(4);
*(.itcm.*)
. = ALIGN(4);
} > ITCM AT> FLASH_TEXT
_ld_itcm_destination = ADDR(.itcm);
_ld_itcm_flash_copy = LOADADDR(.itcm);
_ld_itcm_size = SIZEOF(.itcm);
.dtcm_data :
{
. = ALIGN(4);
*(.dtcm_data.*)
. = ALIGN(4);
} > DTCM AT> FLASH_TEXT
_ld_dtcm_data_destination = ADDR(.dtcm_data);
_ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data);
_ld_dtcm_data_size = SIZEOF(.dtcm_data);
.dtcm_bss :
{
. = ALIGN(4);
*(.dtcm_bss.*)
. = ALIGN(4);
} > DTCM AT> DTCM
_ld_dtcm_bss_start = ADDR(.dtcm_bss);
_ld_dtcm_bss_size = SIZEOF(.dtcm_bss);
.stack :
{
. = ALIGN(8);
_ld_stack_bottom = .;
. += _ld_default_stack_size;
} > DTCM
_ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM);
*/
.ARM.attributes 0 : { *(.ARM.attributes) }
}

48
ports/stm/boards/STM32F412ZGTx_FLASH.ld → ports/stm/boards/common_default.ld
View File

@ -1,34 +1,20 @@
/* /* Memory layout for default case.
GNU linker script for STM32F412
FLASH_ISR .isr_vector
FLASH_TEXT .text
FLASH_TEXT .data
FLASH_FS // ignored for fs use
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/ */
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = 0x20020000; /* tunable */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
_ld_default_stack_size = _minimum_stack_size;
/* define output sections */ /* define output sections */
SECTIONS SECTIONS
{ {
@ -51,6 +37,8 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
*(.text*) /* .text* sections (code) */ *(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4); . = ALIGN(4);
_etext = .; /* define a global symbol at end of code */ _etext = .; /* define a global symbol at end of code */
@ -89,17 +77,23 @@ SECTIONS
.heap : .heap :
{ {
. = ALIGN(4); . = ALIGN(4);
_ld_heap_start = .;
. = . + _minimum_heap_size; . = . + _minimum_heap_size;
. = ALIGN(4); . = ALIGN(4);
} >RAM } >RAM
_ld_heap_end = ORIGIN(RAM) + LENGTH(RAM);
/* this just checks there is enough RAM for the stack */ /* this just checks there is enough RAM for the stack */
.stack : .stack :
{ {
. = ALIGN(4); . = ALIGN(4);
_ld_stack_bottom = .;
. = . + _minimum_stack_size; . = . + _minimum_stack_size;
. = ALIGN(4); . = ALIGN(4);
} >RAM } >RAM
_ld_stack_top = ORIGIN(RAM) + LENGTH(RAM);
.ARM.attributes 0 : { *(.ARM.attributes) } .ARM.attributes 0 : { *(.ARM.attributes) }
} }

56
ports/stm/boards/STM32F411VETx_FLASH.ld → ports/stm/boards/common_nvm.ld
View File

@ -1,34 +1,22 @@
/* /* Memory layout for case with dedicated nvm sector (inefficient)
GNU linker script for STM32F411 via Micropython TODO: rewrite nvm module, remove this file entirely
FLASH_ISR .isr_vector
FLASH_TEXT .text
FLASH_TEXT .data
FLASH_NVM .nvm_data
FLASH_FS // ignored for fs use
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/ */
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = 0x2001c000; /* tunable */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
_ld_default_stack_size = _minimum_stack_size;
/* define output sections */ /* define output sections */
SECTIONS SECTIONS
{ {
@ -45,6 +33,14 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
} >FLASH_ISR } >FLASH_ISR
/* Non-volitile memory */
.nvm_data :
{
. = ALIGN(4);
KEEP(*(.nvm_data))
. = ALIGN(4);
} >FLASH_NVM
/* The program code and other data goes into FLASH */ /* The program code and other data goes into FLASH */
.text : .text :
{ {
@ -91,19 +87,23 @@ SECTIONS
.heap : .heap :
{ {
. = ALIGN(4); . = ALIGN(4);
_ld_heap_start = .;
. = . + _minimum_heap_size; . = . + _minimum_heap_size;
. = ALIGN(4); . = ALIGN(4);
} >RAM } >RAM
_ld_heap_end = ORIGIN(RAM) + LENGTH(RAM);
/* this just checks there is enough RAM for the stack */ /* this just checks there is enough RAM for the stack */
.stack : .stack :
{ {
. = ALIGN(4); . = ALIGN(4);
_ld_stack_bottom = .;
. = . + _minimum_stack_size; . = . + _minimum_stack_size;
. = ALIGN(4); . = ALIGN(4);
} >RAM } >RAM
_ld_stack_top = ORIGIN(RAM) + LENGTH(RAM);
.ARM.attributes 0 : { *(.ARM.attributes) } .ARM.attributes 0 : { *(.ARM.attributes) }
} }

105
ports/stm/boards/STM32F411VETx_nvm_FLASH.ld → ports/stm/boards/common_tcm.ld
View File

@ -1,33 +1,20 @@
/* /* Memory layout for cases with itcm and dtcm
GNU linker script for STM32F411 via Micropython
FLASH_ISR .isr_vector
FLASH_TEXT .text
FLASH_TEXT .data
FLASH_FS // ignored for fs use
RAM .data
RAM .bss
RAM .heap
ITCM .itcm
DTCM .dtcm_data
DTCM .dtcm_bss
DTCM .stack
*/ */
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 32K /* sectors 1,2 are 16K */
FLASH_NVM (rwx) : ORIGIN = 0x0800C000, LENGTH = 16K /* sector 3 is 16K */
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define the top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = 0x2001c000; /* tunable */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
/* define output sections */ /* define output sections */
@ -46,14 +33,6 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
} >FLASH_ISR } >FLASH_ISR
/* Non-volitile memory */
.nvm_data :
{
. = ALIGN(4);
KEEP(*(.nvm_data))
. = ALIGN(4);
} >FLASH_NVM
/* The program code and other data goes into FLASH */ /* The program code and other data goes into FLASH */
.text : .text :
{ {
@ -83,6 +62,9 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT } >RAM AT> FLASH_TEXT
_ld_d1_ram_data_destination = ADDR(.data);
_ld_d1_ram_data_flash_copy = LOADADDR(.data);
_ld_d1_ram_data_size = SIZEOF(.data);
/* Uninitialized data section */ /* Uninitialized data section */
.bss : .bss :
@ -95,6 +77,10 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */ _ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM } >RAM
_ld_d1_ram_bss_start = ADDR(.bss);
_ld_d1_ram_bss_size = SIZEOF(.bss);
_ld_heap_start = _ld_d1_ram_bss_start + _ld_d1_ram_bss_size;
_ld_heap_end = ORIGIN(RAM) + LENGTH(RAM);
/* this is to define the start of the heap, and make sure we have a minimum size */ /* this is to define the start of the heap, and make sure we have a minimum size */
.heap : .heap :
@ -104,15 +90,50 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
} >RAM } >RAM
/* this just checks there is enough RAM for the stack */ /* itcm stuff */
.stack : .itcm :
{ {
. = ALIGN(4); . = ALIGN(4);
. = . + _minimum_stack_size;
*(.itcm.*)
. = ALIGN(4); . = ALIGN(4);
} >RAM } > ITCM AT> FLASH_TEXT
_ld_itcm_destination = ADDR(.itcm);
_ld_itcm_flash_copy = LOADADDR(.itcm);
_ld_itcm_size = SIZEOF(.itcm);
.dtcm_data :
{
. = ALIGN(4);
*(.dtcm_data.*)
. = ALIGN(4);
} > DTCM AT> FLASH_TEXT
_ld_dtcm_data_destination = ADDR(.dtcm_data);
_ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data);
_ld_dtcm_data_size = SIZEOF(.dtcm_data);
.dtcm_bss :
{
. = ALIGN(4);
*(.dtcm_bss.*)
. = ALIGN(4);
} > DTCM AT> DTCM
_ld_dtcm_bss_start = ADDR(.dtcm_bss);
_ld_dtcm_bss_size = SIZEOF(.dtcm_bss);
.stack :
{
. = ALIGN(8);
_ld_stack_bottom = .;
. += _ld_default_stack_size;
} > DTCM
_ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM);
.ARM.attributes 0 : { *(.ARM.attributes) } .ARM.attributes 0 : { *(.ARM.attributes) }
} }

1
ports/stm/boards/espruino_pico/mpconfigboard.mk
View File

@ -10,5 +10,6 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F401xE MCU_VARIANT = STM32F401xE
MCU_PACKAGE = UFQFPN48 MCU_PACKAGE = UFQFPN48
LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F401xd_fs.ld # use for internal flash LD_FILE = boards/STM32F401xd_fs.ld # use for internal flash

3
ports/stm/boards/espruino_wifi/mpconfigboard.mk
View File

@ -10,5 +10,6 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F411xE MCU_VARIANT = STM32F411xE
MCU_PACKAGE = UFQFPN48 MCU_PACKAGE = UFQFPN48
LD_FILE = boards/STM32F411VETx_FLASH.ld LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F411_fs.ld

1
ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk
View File

@ -12,6 +12,7 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F405xx MCU_VARIANT = STM32F405xx
MCU_PACKAGE = LQFP64 MCU_PACKAGE = LQFP64
LD_COMMON = boards/common_default.ld
LD_DEFAULT = boards/STM32F405_default.ld LD_DEFAULT = boards/STM32F405_default.ld
LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option
UF2_OFFSET = 0x8010000 UF2_OFFSET = 0x8010000

1
ports/stm/boards/meowbit_v121/mpconfigboard.mk
View File

@ -15,6 +15,7 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F401xE MCU_VARIANT = STM32F401xE
MCU_PACKAGE = LQFP64 MCU_PACKAGE = LQFP64
LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F401xe_boot.ld LD_FILE = boards/STM32F401xe_boot.ld
# LD_FILE = boards/STM32F401xe_fs.ld # use for internal flash # LD_FILE = boards/STM32F401xe_fs.ld # use for internal flash

1
ports/stm/boards/nucleo_f767zi/mpconfigboard.mk
View File

@ -10,5 +10,6 @@ MCU_SERIES = F7
MCU_VARIANT = STM32F767xx MCU_VARIANT = STM32F767xx
MCU_PACKAGE = LQFP144 MCU_PACKAGE = LQFP144
LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F767_fs.ld LD_FILE = boards/STM32F767_fs.ld

1
ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk
View File

@ -10,5 +10,6 @@ MCU_SERIES = H7
MCU_VARIANT = STM32H743xx MCU_VARIANT = STM32H743xx
MCU_PACKAGE = LQFP144 MCU_PACKAGE = LQFP144
LD_COMMON = boards/common_tcm.ld
LD_FILE = boards/STM32H743_fs.ld LD_FILE = boards/STM32H743_fs.ld

3
ports/stm/boards/pyb_nano_v2/mpconfigboard.mk
View File

@ -12,5 +12,6 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F411xE MCU_VARIANT = STM32F411xE
MCU_PACKAGE = UFQFPN48 MCU_PACKAGE = UFQFPN48
LD_FILE = boards/STM32F411VETx_FLASH.ld LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F411_fs.ld

1
ports/stm/boards/pyboard_v11/mpconfigboard.mk
View File

@ -10,5 +10,6 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F405xx MCU_VARIANT = STM32F405xx
MCU_PACKAGE = LQFP64 MCU_PACKAGE = LQFP64
LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F405_fs.ld LD_FILE = boards/STM32F405_fs.ld

3
ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk
View File

@ -15,5 +15,6 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F411xE MCU_VARIANT = STM32F411xE
MCU_PACKAGE = UFQFPN48 MCU_PACKAGE = UFQFPN48
LD_FILE = boards/STM32F411VETx_FLASH.ld LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F411_fs.ld

3
ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk
View File

@ -10,5 +10,6 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F411xE MCU_VARIANT = STM32F411xE
MCU_PACKAGE = LQFP100_f4 MCU_PACKAGE = LQFP100_f4
LD_FILE = boards/STM32F411VETx_FLASH.ld LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F411_fs.ld

3
ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk
View File

@ -15,6 +15,7 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F412Zx MCU_VARIANT = STM32F412Zx
MCU_PACKAGE = LQFP144 MCU_PACKAGE = LQFP144
LD_FILE = boards/STM32F412ZGTx_FLASH.ld LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F412_fs.ld

1
ports/stm/boards/stm32f4_discovery/mpconfigboard.mk
View File

@ -10,5 +10,6 @@ MCU_SERIES = F4
MCU_VARIANT = STM32F407xx MCU_VARIANT = STM32F407xx
MCU_PACKAGE = LQFP100_f4 MCU_PACKAGE = LQFP100_f4
LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F407_fs.ld LD_FILE = boards/STM32F407_fs.ld

11
ports/stm/boards/thunderpack/mpconfigboard.mk
View File

@ -9,12 +9,9 @@ LONGINT_IMPL = NONE
CIRCUITPY_NVM = 1 CIRCUITPY_NVM = 1
MCU_SERIES = m4 MCU_SERIES = F4
MCU_VARIANT = stm32f4 MCU_VARIANT = STM32F411xE
MCU_SUB_VARIANT = stm32f411xe
MCU_PACKAGE = 48 MCU_PACKAGE = 48
CMSIS_MCU = STM32F411xE
LD_FILE = boards/STM32F411VETx_nvm_FLASH.ld
STARTUP_FILE = startup_stm32f411xe.s
LD_FILE = boards/common_nvm.ld
LD_FILE = boards/STM32F411_nvm.ld

7
ports/stm/mpconfigport.h
View File

@ -28,14 +28,19 @@
#ifndef STM32_MPCONFIGPORT_H__ #ifndef STM32_MPCONFIGPORT_H__
#define STM32_MPCONFIGPORT_H__ #define STM32_MPCONFIGPORT_H__
#include <stdint.h>
#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1)
#define MICROPY_PY_FUNCTION_ATTRS (1) #define MICROPY_PY_FUNCTION_ATTRS (1)
#define MICROPY_PY_IO (1) #define MICROPY_PY_IO (1)
#define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1)
#define MICROPY_PY_UJSON (1) #define MICROPY_PY_UJSON (1)
extern uint8_t _ld_default_stack_size;
// 24kiB stack // 24kiB stack
#define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 // #define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000
#define CIRCUITPY_DEFAULT_STACK_SIZE ((uint32_t) &_ld_default_stack_size)
#include "py/circuitpy_mpconfig.h" #include "py/circuitpy_mpconfig.h"

2
ports/stm/packages/LQFP100_f4.c
View File

@ -53,7 +53,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
{ MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) },
{ MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) },
{ MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) },
#if MCU_LINE == FOUNDATION || MCU_LINE == ADVANCED #if defined(STM32F405xx) || defined(STM32F412Zx) || defined(STM32F407xx) || defined(STM32F767xx)
{ MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) },
#endif //or VCAP1 -----------------------------------*/ #endif //or VCAP1 -----------------------------------*/
// VCAP1 or VSS -----------------------------------*/ // VCAP1 or VSS -----------------------------------*/

2
ports/stm/packages/LQFP64.c
View File

@ -35,7 +35,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
{ MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) },
{ MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) },
{ MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) },
#if MCU_LINE == FOUNDATION || MCU_LINE == ADVANCED #if defined(STM32F405xx) || defined(STM32F412Zx) || defined(STM32F407xx) || defined(STM32F767xx)
{ MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) },
#endif //or VCAP1 -----------------------------------*/ #endif //or VCAP1 -----------------------------------*/
// VCAP1 or VSS -----------------------------------*/ // VCAP1 or VSS -----------------------------------*/

168
ports/stm/supervisor/port.c
View File

@ -44,6 +44,131 @@
#include "clocks.h" #include "clocks.h"
#include "gpio.h" #include "gpio.h"
//only enable the Reset Handler overwrite for the H7 for now
#if defined(STM32H7)
// Device memories must be accessed in order.
#define DEVICE 2
// Normal memory can have accesses reorder and prefetched.
#define NORMAL 0
// Prevents instruction access.
#define NO_EXECUTION 1
#define EXECUTION 0
// Shareable if the memory system manages coherency.
#define NOT_SHAREABLE 0
#define SHAREABLE 1
#define NOT_CACHEABLE 0
#define CACHEABLE 1
#define NOT_BUFFERABLE 0
#define BUFFERABLE 1
#define NO_SUBREGIONS 0
extern uint32_t _ld_stack_top;
extern uint32_t _ld_d1_ram_bss_start;
extern uint32_t _ld_d1_ram_bss_size;
extern uint32_t _ld_d1_ram_data_destination;
extern uint32_t _ld_d1_ram_data_size;
extern uint32_t _ld_d1_ram_data_flash_copy;
extern uint32_t _ld_dtcm_bss_start;
extern uint32_t _ld_dtcm_bss_size;
extern uint32_t _ld_dtcm_data_destination;
extern uint32_t _ld_dtcm_data_size;
extern uint32_t _ld_dtcm_data_flash_copy;
extern uint32_t _ld_itcm_destination;
extern uint32_t _ld_itcm_size;
extern uint32_t _ld_itcm_flash_copy;
extern void main(void);
extern void SystemInit(void);
// This replaces the Reset_Handler in startup_*.S and SystemInit in system_*.c.
__attribute__((used, naked)) void Reset_Handler(void) {
__disable_irq();
__set_MSP((uint32_t) &_ld_stack_top);
// TODO: Is any of this commented stuff actually required?
/* Disable I cache and D cache */
// SCB_DisableICache();
// SCB_DisableDCache(); // this causes an instant hardfault if used
// #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
// SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access */
// #endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
// /* Disable Systick which might be enabled by bootrom */
// if (SysTick->CTRL & SysTick_CTRL_ENABLE_Msk)
// {
// SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
// }
/* Disable MPU */
ARM_MPU_Disable();
// Copy all of the itcm code to run from ITCM. Do this while the MPU is disabled because we write
// protect it.
for (uint32_t i = 0; i < ((size_t) &_ld_itcm_size) / 4; i++) {
(&_ld_itcm_destination)[i] = (&_ld_itcm_flash_copy)[i];
}
// The first number in RBAR is the region number. When searching for a policy, the region with
// the highest number wins. If none match, then the default policy set at enable applies.
// TODO: what is the default policy? Where is that set?
// TODO: do I need to subdivide this up?
// Mark all the flash the same until instructed otherwise.
MPU->RBAR = ARM_MPU_RBAR(11, 0x08000000U);
MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_2MB);
// This the ITCM. Set it to read-only because we've loaded everything already and it's easy to
// accidentally write the wrong value to 0x00000000 (aka NULL).
MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_128KB);
// This the DTCM.
MPU->RBAR = ARM_MPU_RBAR(14, 0x20000000U);
MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_128KB);
// This is AXI SRAM (D1).
MPU->RBAR = ARM_MPU_RBAR(15, 0x24000000U);
MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB);
// TODO: what is the mask here doing?
/* Enable MPU */
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
// We're done mucking with memory so enable I cache and D cache
// SCB_EnableDCache();
// SCB_EnableICache();
// Copy all of the data to run from DTCM.
for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_data_size) / 4; i++) {
(&_ld_dtcm_data_destination)[i] = (&_ld_dtcm_data_flash_copy)[i];
}
// Clear DTCM bss.
for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_bss_size) / 4; i++) {
(&_ld_dtcm_bss_start)[i] = 0;
}
// Copy all of the data to run from D1 RAM.
for (uint32_t i = 0; i < ((size_t) &_ld_d1_ram_data_size) / 4; i++) {
(&_ld_d1_ram_data_destination)[i] = (&_ld_d1_ram_data_flash_copy)[i];
}
// Clear D1 RAM bss.
for (uint32_t i = 0; i < ((size_t) &_ld_d1_ram_bss_size) / 4; i++) {
(&_ld_d1_ram_bss_start)[i] = 0;
}
SystemInit();
__enable_irq();
main();
}
#endif //end H7 specific code
safe_mode_t port_init(void) { safe_mode_t port_init(void) {
HAL_Init(); HAL_Init();
__HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_RCC_SYSCFG_CLK_ENABLE();
@ -63,6 +188,7 @@ safe_mode_t port_init(void) {
void reset_port(void) { void reset_port(void) {
reset_all_pins(); reset_all_pins();
// TODO: it'd be nice if this was more automatic
#if defined(STM32F4) #if defined(STM32F4)
i2c_reset(); i2c_reset();
spi_reset(); spi_reset();
@ -81,22 +207,25 @@ void reset_cpu(void) {
NVIC_SystemReset(); NVIC_SystemReset();
} }
extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom;
uint32_t *port_heap_get_bottom(void) { uint32_t *port_heap_get_bottom(void) {
return port_stack_get_limit(); return &_ld_heap_start;
} }
uint32_t *port_heap_get_top(void) { uint32_t *port_heap_get_top(void) {
return port_stack_get_top(); return &_ld_heap_end;
} }
uint32_t *port_stack_get_limit(void) { uint32_t *port_stack_get_limit(void) {
return &_ebss; return &_ld_stack_bottom;
} }
uint32_t *port_stack_get_top(void) { uint32_t *port_stack_get_top(void) {
return &_estack; return &_ld_stack_top;
} }
// TODO: what even are these
extern uint32_t _ebss; extern uint32_t _ebss;
// Place the word to save just after our BSS section that gets blanked. // Place the word to save just after our BSS section that gets blanked.
void port_set_saved_word(uint32_t value) { void port_set_saved_word(uint32_t value) {
@ -107,7 +236,36 @@ uint32_t port_get_saved_word(void) {
return _ebss; return _ebss;
} }
void HardFault_Handler(void) { __attribute__((used)) void MemManage_Handler(void)
{
__ASM volatile ("bkpt");
reset_into_safe_mode(MEM_MANAGE);
while (true) {
asm("nop;");
}
}
__attribute__((used)) void BusFault_Handler(void)
{
__ASM volatile ("bkpt");
reset_into_safe_mode(MEM_MANAGE);
while (true) {
asm("nop;");
}
}
__attribute__((used)) void UsageFault_Handler(void)
{
__ASM volatile ("bkpt");
reset_into_safe_mode(MEM_MANAGE);
while (true) {
asm("nop;");
}
}
__attribute__((used)) void HardFault_Handler(void)
{
__ASM volatile ("bkpt");
reset_into_safe_mode(HARD_CRASH); reset_into_safe_mode(HARD_CRASH);
while (true) { while (true) {
asm("nop;"); asm("nop;");

2
supervisor/linker.h
View File

@ -29,7 +29,7 @@
#ifndef MICROPY_INCLUDED_SUPERVISOR_LINKER_H #ifndef MICROPY_INCLUDED_SUPERVISOR_LINKER_H
#define MICROPY_INCLUDED_SUPERVISOR_LINKER_H #define MICROPY_INCLUDED_SUPERVISOR_LINKER_H
#if defined(IMXRT10XX) || defined(FOMU) // || defined(STM32H7) #if defined(IMXRT10XX) || defined(FOMU) || defined(STM32H7)
#define PLACE_IN_DTCM_DATA(name) name __attribute__((section(".dtcm_data." #name ))) #define PLACE_IN_DTCM_DATA(name) name __attribute__((section(".dtcm_data." #name )))
#define PLACE_IN_DTCM_BSS(name) name __attribute__((section(".dtcm_bss." #name ))) #define PLACE_IN_DTCM_BSS(name) name __attribute__((section(".dtcm_bss." #name )))
#define PLACE_IN_ITCM(name) __attribute__((section(".itcm." #name ))) name #define PLACE_IN_ITCM(name) __attribute__((section(".itcm." #name ))) name

2
supervisor/shared/stack.c
View File

@ -46,7 +46,7 @@ void allocate_stack(void) {
mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp; mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp;
if (port_stack_get_top() != port_heap_get_top()) { if (port_stack_get_top() != port_heap_get_top()) { //Why is this here? Doesn't apply to some chips.
return; return;
} }