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Wait for the DFLL to be stable.

This commit is contained in:
Scott Shawcroft 2018-06-06 12:02:17 -07:00
parent 07a8899c72
commit 383bf9a59e
1 changed files with 3 additions and 0 deletions
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3
ports/atmel-samd/peripherals/samd21/clocks.c
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@ -130,6 +130,9 @@ static void init_clock_source_dfll48m_xosc(void) {
SYSCTRL_DFLLCTRL_ENABLE; SYSCTRL_DFLLCTRL_ENABLE;
while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {} while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {}
while (GCLK->STATUS.bit.SYNCBUSY) {} while (GCLK->STATUS.bit.SYNCBUSY) {}
// Wait for the fine lock on the DFLL.
while (!SYSCTRL->PCLKSR.bit.DFLLLCKC || !SYSCTRL->PCLKSR.bit.DFLLLCKF) {}
} }
static void init_clock_source_dfll48m_usb(void) { static void init_clock_source_dfll48m_usb(void) {