From 383bf9a59e1672684169b4afe57671a639fe12ad Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott.shawcroft@gmail.com>
Date: Wed, 6 Jun 2018 12:02:17 -0700
Subject: [PATCH] Wait for the DFLL to be stable.

---
 ports/atmel-samd/peripherals/samd21/clocks.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ports/atmel-samd/peripherals/samd21/clocks.c b/ports/atmel-samd/peripherals/samd21/clocks.c
index 51b7ad993d..422290e8bb 100644
--- a/ports/atmel-samd/peripherals/samd21/clocks.c
+++ b/ports/atmel-samd/peripherals/samd21/clocks.c
@@ -130,6 +130,9 @@ static void init_clock_source_dfll48m_xosc(void) {
                             SYSCTRL_DFLLCTRL_ENABLE;
     while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {}
     while (GCLK->STATUS.bit.SYNCBUSY) {}
+
+    // Wait for the fine lock on the DFLL.
+    while (!SYSCTRL->PCLKSR.bit.DFLLLCKC || !SYSCTRL->PCLKSR.bit.DFLLLCKF) {}
 }
 
 static void init_clock_source_dfll48m_usb(void) {