2017-12-21 07:49:14 -05:00
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/*
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* SPI Master library for nRF5x.
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* Copyright (c) 2015 Arduino LLC
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* Copyright (c) 2016 Sandeep Mistry All right reserved.
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* Copyright (c) 2017 hathach
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2018-06-25 17:33:39 -04:00
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* Copyright (c) 2018 Artur Pacholec
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2017-12-21 07:49:14 -05:00
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "shared-bindings/busio/SPI.h"
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#include "py/mperrno.h"
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#include "py/runtime.h"
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2018-06-25 17:33:39 -04:00
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#include "nrfx_spim.h"
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#include "nrf_gpio.h"
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2018-09-19 21:59:04 -04:00
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STATIC spim_peripheral_t spim_peripherals[] = {
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#if NRFX_CHECK(NRFX_SPIM3_ENABLED)
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// SPIM3 exists only on nRF52840 and supports 32MHz max. All other SPIM's are only 8MHz max.
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// Allocate SPIM3 first.
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{ .spim = NRFX_SPIM_INSTANCE(3),
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.max_frequency_MHz = 32,
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.max_xfer_size = SPIM3_EASYDMA_MAXCNT_SIZE,
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},
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2018-06-25 17:33:39 -04:00
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#endif
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2018-09-19 21:59:04 -04:00
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#if NRFX_CHECK(NRFX_SPIM2_ENABLED)
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// SPIM2 is not shared with a TWIM, so allocate before the shared ones.
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{ .spim = NRFX_SPIM_INSTANCE(2),
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.max_frequency_MHz = 8,
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.max_xfer_size = SPIM2_EASYDMA_MAXCNT_SIZE,
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},
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#endif
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#if NRFX_CHECK(NRFX_SPIM1_ENABLED)
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// SPIM1 and TWIM1 share an address.
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{ .spim = NRFX_SPIM_INSTANCE(1),
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.max_frequency_MHz = 8,
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.max_xfer_size = SPIM1_EASYDMA_MAXCNT_SIZE,
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},
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#endif
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#if NRFX_CHECK(NRFX_SPIM0_ENABLED)
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// SPIM0 and TWIM0 share an address.
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{ .spim = NRFX_SPIM_INSTANCE(0),
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.max_frequency_MHz = 8,
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.max_xfer_size = SPIM0_EASYDMA_MAXCNT_SIZE,
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},
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#endif
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};
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2018-07-04 14:24:41 -04:00
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2018-06-25 17:33:39 -04:00
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// Convert frequency to clock-speed-dependent value
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static nrf_spim_frequency_t baudrate_to_spim_frequency(const uint32_t baudrate) {
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2018-09-19 21:59:04 -04:00
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if (baudrate <= 125000) {
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2018-06-25 17:33:39 -04:00
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return NRF_SPIM_FREQ_125K;
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2018-09-19 21:59:04 -04:00
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}
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if (baudrate <= 250000) {
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2018-06-25 17:33:39 -04:00
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return NRF_SPIM_FREQ_250K;
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2018-09-19 21:59:04 -04:00
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}
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if (baudrate <= 500000) {
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2018-06-25 17:33:39 -04:00
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return NRF_SPIM_FREQ_500K;
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2018-09-19 21:59:04 -04:00
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}
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if (baudrate <= 1000000) {
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2018-06-25 17:33:39 -04:00
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return NRF_SPIM_FREQ_1M;
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2018-09-19 21:59:04 -04:00
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}
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if (baudrate <= 2000000) {
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2018-06-25 17:33:39 -04:00
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return NRF_SPIM_FREQ_2M;
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2018-09-19 21:59:04 -04:00
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}
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if (baudrate <= 4000000) {
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2018-06-25 17:33:39 -04:00
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return NRF_SPIM_FREQ_4M;
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2018-09-19 21:59:04 -04:00
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}
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if (baudrate <= 8000000) {
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2018-06-25 17:33:39 -04:00
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return NRF_SPIM_FREQ_8M;
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2018-09-19 21:59:04 -04:00
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}
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2018-06-25 17:33:39 -04:00
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#ifdef SPIM_FREQUENCY_FREQUENCY_M16
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2018-09-19 21:59:04 -04:00
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if (baudrate <= 16000000) {
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2018-06-25 17:33:39 -04:00
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return NRF_SPIM_FREQ_16M;
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2018-09-19 21:59:04 -04:00
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}
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2018-06-25 17:33:39 -04:00
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#endif
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2017-12-21 07:49:14 -05:00
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2018-06-25 17:33:39 -04:00
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#ifdef SPIM_FREQUENCY_FREQUENCY_M32
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return NRF_SPIM_FREQ_32M;
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#else
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return NRF_SPIM_FREQ_8M;
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#endif
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2017-12-21 07:49:14 -05:00
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}
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void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) {
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2018-09-19 21:59:04 -04:00
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// Find a free instance.
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self->spim_peripheral = NULL;
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for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) {
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if ((spim_peripherals[i].spim.p_reg->ENABLE & SPIM_ENABLE_ENABLE_Msk) == 0) {
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self->spim_peripheral = &spim_peripherals[i];
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break;
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}
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}
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if (self->spim_peripheral == NULL) {
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mp_raise_ValueError(translate("All SPI peripherals are in use"));
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}
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2017-12-21 07:49:14 -05:00
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2018-06-25 17:33:39 -04:00
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nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG;
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config.frequency = NRF_SPIM_FREQ_8M;
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2017-12-21 07:49:14 -05:00
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2018-08-30 21:42:25 -04:00
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config.sck_pin = clock->number;
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2018-08-31 17:46:03 -04:00
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self->clock_pin_number = clock->number;
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claim_pin(clock);
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2018-02-02 15:01:01 -05:00
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2018-08-31 17:46:03 -04:00
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if (mosi != (mcu_pin_obj_t*)&mp_const_none_obj) {
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2018-08-30 21:42:25 -04:00
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config.mosi_pin = mosi->number;
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2018-08-31 17:46:03 -04:00
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self->MOSI_pin_number = mosi->number;
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claim_pin(mosi);
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} else {
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self->MOSI_pin_number = NO_PIN;
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}
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2018-02-02 15:01:01 -05:00
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2018-08-31 17:46:03 -04:00
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if (miso != (mcu_pin_obj_t*)&mp_const_none_obj) {
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2018-08-30 21:42:25 -04:00
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config.miso_pin = miso->number;
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2018-08-31 17:46:03 -04:00
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self->MISO_pin_number = mosi->number;
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claim_pin(miso);
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} else {
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self->MISO_pin_number = NO_PIN;
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}
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2018-06-25 17:33:39 -04:00
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2018-09-19 21:59:04 -04:00
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nrfx_err_t err = nrfx_spim_init(&self->spim_peripheral->spim, &config, NULL, NULL);
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2018-06-25 17:33:39 -04:00
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// A soft reset doesn't uninit the driver so we might end up with a invalid state
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if (err == NRFX_ERROR_INVALID_STATE) {
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2018-09-19 21:59:04 -04:00
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nrfx_spim_uninit(&self->spim_peripheral->spim);
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err = nrfx_spim_init(&self->spim_peripheral->spim, &config, NULL, NULL);
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2018-06-25 17:33:39 -04:00
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}
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2018-08-31 17:46:03 -04:00
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if (err != NRFX_SUCCESS) {
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common_hal_busio_spi_deinit(self);
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2018-06-25 17:33:39 -04:00
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mp_raise_OSError(MP_EIO);
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2018-08-31 17:46:03 -04:00
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}
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2017-12-21 07:49:14 -05:00
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}
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bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) {
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2018-08-31 17:46:03 -04:00
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return self->clock_pin_number == NO_PIN;
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2017-12-21 07:49:14 -05:00
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}
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void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
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2018-06-25 17:33:39 -04:00
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if (common_hal_busio_spi_deinited(self))
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2017-12-21 07:49:14 -05:00
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return;
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2018-09-19 21:59:04 -04:00
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nrfx_spim_uninit(&self->spim_peripheral->spim);
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2017-12-21 07:49:14 -05:00
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2018-08-31 17:46:03 -04:00
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reset_pin_number(self->clock_pin_number);
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reset_pin_number(self->MOSI_pin_number);
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reset_pin_number(self->MISO_pin_number);
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2017-12-21 07:49:14 -05:00
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}
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bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
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// nrf52 does not support 16 bit
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2018-06-25 17:33:39 -04:00
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if (bits != 8)
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return false;
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2017-12-21 07:49:14 -05:00
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2018-09-19 21:59:04 -04:00
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if (baudrate > self->spim_peripheral->max_frequency_MHz * 1000000) {
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mp_raise_ValueError(translate("Baud rate too high for this SPI peripheral"));
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return false;
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}
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nrf_spim_frequency_set(self->spim_peripheral->spim.p_reg, baudrate_to_spim_frequency(baudrate));
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2017-12-21 07:49:14 -05:00
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2018-06-25 17:33:39 -04:00
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nrf_spim_mode_t mode = NRF_SPIM_MODE_0;
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if (polarity) {
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mode = (phase) ? NRF_SPIM_MODE_3 : NRF_SPIM_MODE_2;
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} else {
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mode = (phase) ? NRF_SPIM_MODE_1 : NRF_SPIM_MODE_0;
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}
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2017-12-21 07:49:14 -05:00
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2018-09-19 21:59:04 -04:00
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nrf_spim_configure(self->spim_peripheral->spim.p_reg, mode, NRF_SPIM_BIT_ORDER_MSB_FIRST);
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2017-12-21 07:49:14 -05:00
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return true;
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}
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bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
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bool grabbed_lock = false;
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2018-09-20 20:45:30 -04:00
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// NRFX_CRITICAL_SECTION_ENTER();
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if (!self->has_lock) {
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grabbed_lock = true;
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self->has_lock = true;
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}
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// NRFX_CRITICAL_SECTION_EXIT();
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2017-12-21 07:49:14 -05:00
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return grabbed_lock;
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}
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bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) {
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return self->has_lock;
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}
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void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
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self->has_lock = false;
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}
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bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) {
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2018-06-25 17:33:39 -04:00
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if (len == 0)
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return true;
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2017-12-21 07:49:14 -05:00
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2018-09-19 21:59:04 -04:00
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const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size;
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const uint32_t parts = len / max_xfer_size;
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const uint32_t remainder = len % max_xfer_size;
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2018-07-04 14:24:41 -04:00
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for (uint32_t i = 0; i < parts; ++i) {
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2018-09-19 21:59:04 -04:00
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const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(data + i * max_xfer_size, max_xfer_size);
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if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS)
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2018-07-04 14:24:41 -04:00
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return false;
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}
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2017-12-21 07:49:14 -05:00
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2018-07-04 14:24:41 -04:00
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if (remainder > 0) {
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2018-09-19 21:59:04 -04:00
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const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(data + parts * max_xfer_size, remainder);
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if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS)
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2018-07-04 14:24:41 -04:00
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return false;
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}
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return true;
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2017-12-21 07:49:14 -05:00
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}
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bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) {
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2018-06-25 17:33:39 -04:00
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if (len == 0)
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return true;
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2017-12-21 07:49:14 -05:00
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2018-09-19 21:59:04 -04:00
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const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size;
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const uint32_t parts = len / max_xfer_size;
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const uint32_t remainder = len % max_xfer_size;
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2018-07-04 14:24:41 -04:00
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for (uint32_t i = 0; i < parts; ++i) {
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2018-09-19 21:59:04 -04:00
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const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_RX(data + i * max_xfer_size, max_xfer_size);
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if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS)
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2018-07-04 14:24:41 -04:00
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return false;
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}
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2017-12-21 07:49:14 -05:00
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2018-07-04 14:24:41 -04:00
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if (remainder > 0) {
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2018-09-19 21:59:04 -04:00
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const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_RX(data + parts * max_xfer_size, remainder);
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if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS)
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2018-07-04 14:24:41 -04:00
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return false;
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}
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return true;
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2017-12-21 07:49:14 -05:00
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}
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2018-01-03 16:50:57 -05:00
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) {
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2018-06-25 17:33:39 -04:00
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if (len == 0)
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return true;
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2018-01-03 16:50:57 -05:00
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2018-09-19 21:59:04 -04:00
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const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size;
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const uint32_t parts = len / max_xfer_size;
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const uint32_t remainder = len % max_xfer_size;
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2018-07-04 14:24:41 -04:00
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for (uint32_t i = 0; i < parts; ++i) {
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2018-09-19 21:59:04 -04:00
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const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_SINGLE_XFER(data_out + i * max_xfer_size, max_xfer_size,
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data_in + i * max_xfer_size, max_xfer_size);
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if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS)
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2018-07-04 14:24:41 -04:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (remainder > 0) {
|
2018-09-19 21:59:04 -04:00
|
|
|
const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_SINGLE_XFER(data_out + parts * max_xfer_size, remainder,
|
|
|
|
data_in + parts * max_xfer_size, remainder);
|
|
|
|
if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS)
|
2018-07-04 14:24:41 -04:00
|
|
|
return false;
|
|
|
|
}
|
2018-01-03 16:50:57 -05:00
|
|
|
|
2018-07-04 14:24:41 -04:00
|
|
|
return true;
|
2018-01-03 16:50:57 -05:00
|
|
|
}
|
2018-06-25 17:33:39 -04:00
|
|
|
|
2018-01-30 13:23:00 -05:00
|
|
|
uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) {
|
2018-09-19 21:59:04 -04:00
|
|
|
switch (self->spim_peripheral->spim.p_reg->FREQUENCY) {
|
2018-06-25 17:33:39 -04:00
|
|
|
case NRF_SPIM_FREQ_125K:
|
2018-01-30 13:23:00 -05:00
|
|
|
return 125000;
|
2018-06-25 17:33:39 -04:00
|
|
|
case NRF_SPIM_FREQ_250K:
|
2018-01-30 13:23:00 -05:00
|
|
|
return 250000;
|
2018-06-25 17:33:39 -04:00
|
|
|
case NRF_SPIM_FREQ_500K:
|
2018-01-30 13:23:00 -05:00
|
|
|
return 500000;
|
2018-06-25 17:33:39 -04:00
|
|
|
case NRF_SPIM_FREQ_1M:
|
2018-01-30 13:23:00 -05:00
|
|
|
return 1000000;
|
2018-06-25 17:33:39 -04:00
|
|
|
case NRF_SPIM_FREQ_2M:
|
2018-01-30 13:23:00 -05:00
|
|
|
return 2000000;
|
2018-06-25 17:33:39 -04:00
|
|
|
case NRF_SPIM_FREQ_4M:
|
2018-01-30 13:23:00 -05:00
|
|
|
return 4000000;
|
2018-06-25 17:33:39 -04:00
|
|
|
case NRF_SPIM_FREQ_8M:
|
2018-01-30 13:23:00 -05:00
|
|
|
return 8000000;
|
2018-06-25 17:33:39 -04:00
|
|
|
#ifdef SPIM_FREQUENCY_FREQUENCY_M16
|
|
|
|
case NRF_SPIM_FREQ_16M:
|
|
|
|
return 16000000;
|
|
|
|
#endif
|
|
|
|
#ifdef SPIM_FREQUENCY_FREQUENCY_M32
|
|
|
|
case NRF_SPIM_FREQ_32M:
|
|
|
|
return 32000000;
|
|
|
|
#endif
|
2018-01-30 13:23:00 -05:00
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|