2021-01-20 19:47:18 -05:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2022-04-23 14:09:36 -04:00
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#include <string.h>
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2021-01-20 19:47:18 -05:00
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#include "bindings/rp2pio/StateMachine.h"
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#include "common-hal/microcontroller/__init__.h"
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2022-02-01 11:19:17 -05:00
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#include "shared-bindings/digitalio/Pull.h"
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2021-03-05 10:00:03 -05:00
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#include "shared-bindings/microcontroller/__init__.h"
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2021-01-20 19:47:18 -05:00
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#include "shared-bindings/microcontroller/Pin.h"
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#include "src/rp2040/hardware_regs/include/hardware/platform_defs.h"
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#include "src/rp2_common/hardware_clocks/include/hardware/clocks.h"
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#include "src/rp2_common/hardware_dma/include/hardware/dma.h"
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#include "src/rp2_common/hardware_pio/include/hardware/pio_instructions.h"
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#include "src/rp2040/hardware_structs/include/hardware/structs/iobank0.h"
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2021-02-26 23:28:50 -05:00
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#include "src/rp2_common/hardware_irq/include/hardware/irq.h"
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2021-01-20 19:47:18 -05:00
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Merge tag 'v1.17' into merge-1.17
F-strings, new machine.I2S class, ESP32-C3 support and LEGO_HUB_NO6 board
This release of MicroPython adds support for f-strings (PEP-498), with a
few limitations compared to normal Python. F-strings are essentially
syntactic sugar for "".format() and make formatting strings a lot more
convenient. Other improvements to the core runtime include pretty printing
OSError when it has two arguments (an errno code and a string), scheduling
of KeyboardInterrupt on the main thread, and support for a single argument
to the optimised form of StopIteration.
In the machine module a new I2S class has been added, with support for
esp32 and stm32 ports. This provides a consistent API for transmit and
receive of audio data in blocking, non-blocking and asyncio-based
operation. Also, the json module has support for the "separators" argument
in the dump and dumps functions, and framebuf now includes a way to blit
between frame buffers of different formats using a palette. A new,
portable machine.bitstream function is also added which can output a stream
of bits with configurable timing, and is used as the basis for driving
WS2812 LEDs in a common way across ports.
There has been some restructuring of the repository directory layout, with
all third-party code now in the lib/ directory. And a new top-level
directory shared/ has been added with first-party code that was previously
in lib/ moved there.
The docs have seen further improvement with enhancements and additions to
the rp2 parts, as well as a new quick reference for the zephyr port.
The terms master/slave have been replaced with controller/peripheral,
mainly relating to I2C and SPI usage. And u-module references have been
replaced with just the module name without the u-prefix to help clear up
the intended usage of modules in MicroPython.
For the esp8266 and esp32 ports, hidden networks are now included in WLAN
scan results. On the esp32 the RMT class is enhanced with idle_level and
write_pulses modes. There is initial support for ESP32-C3 chips with
GENERIC_C3 and GENERIC_C3_USB boards.
The javascript port has had its Makefile and garbage collector
implementation reworked so it compiles and runs with latest the Emscripten
using asyncify.
The mimxrt port sees the addition of hardware I2C and SPI support, as well
as some additional methods to the machine module. There is also support
for Hyperflash chips.
The nrf port now has full VFS storage support, enables source-line on
traceback, and has .mpy features consistent with other ports.
For the rp2 port there is now more configurability for boards, and more
boards added.
The stm32 port has a new LEGO_HUB_NO6 board definition with detailed
information how to get this LEGO Hub running stock MicroPython. There is
also now support to change the CPU frequency on STM32WB MCUs. And USBD_xxx
descriptor options have been renamed to MICROPY_HW_USB_xxx.
Thanks to everyone who contributed to this release: Amir Gonnen, Andrew
Scheller, Bryan Tong Minh, Chris Wilson, Damien George, Daniel Mizyrycki,
David Lechner, David P, Fernando, finefoot, Frank Pilhofer, Glenn Ruben
Bakke, iabdalkader, Jeff Epler, Jim Mussared, Jonathan Hogg, Josh Klar,
Josh Lloyd, Julia Hathaway, Krzysztof Adamski, Matúš Olekšák, Michael
Weiss, Michel Bouwmans, Mike Causer, Mike Teachman, Ned Konz, NitiKaur,
oclyke, Patrick Van Oosterwijck, Peter Hinch, Peter Züger, Philipp
Ebensberger, robert-hh, Roberto Colistete Jr, Sashkoiv, Seon Rozenblum,
Tobias Thyrrestrup, Tom McDermott, Will Sowerbutts, Yonatan Goldschmidt.
What follows is a detailed list of changes, generated from the git commit
history, and organised into sections.
Main components
===============
all:
- fix signed shifts and NULL access errors from -fsanitize=undefined
- update to point to files in new shared/ directory
py core:
- mpstate: make exceptions thread-local
- mpstate: schedule KeyboardInterrupt on main thread
- mperrno: add MP_ECANCELED error code
- makeqstrdefs.py: don't include .h files explicitly in preprocessing
- mark unused arguments from bytecode decoding macros
- objexcept: pretty print OSError also when it has 2 arguments
- makeversionhdr: add --tags arg to git describe
- vm: simplify handling of MP_OBJ_STOP_ITERATION in yield-from opcode
- objexcept: make mp_obj_exception_get_value support subclassed excs
- support single argument to optimised MP_OBJ_STOP_ITERATION
- introduce and use mp_raise_type_arg helper
- modsys: optimise sys.exit for code size by using exception helpers
- objexcept: make mp_obj_new_exception_arg1 inline
- obj: fix formatting of comment for mp_obj_is_integer
- emitnative: reuse need_reg_all func in need_stack_settled
- emitnative: ensure stack settling is safe mid-branch
- runtime: fix bool unary op for subclasses of native types
- builtinimport: fix condition for including do_execute_raw_code()
- mkrules: automatically build mpy-cross if it doesn't exist
- implement partial PEP-498 (f-string) support
- lexer: clear fstring_args vstr on lexer free
- mkrules.mk: do submodule sync in "make submodules"
extmod:
- btstack: add missing call to mp_bluetooth_hci_uart_deinit
- btstack: check that BLE is active before performing operations
- uasyncio: get addr and bind server socket before creating task
- axtls-include: add axtls_os_port.h to customise axTLS
- update for move of crypto-algorithms, re1.5, uzlib to lib
- moduselect: conditionally compile select()
- nimble: fix leak in l2cap_send if send-while-stalled
- btstack/btstack.mk: use -Wno-implicit-fallthrough, not =0
- utime: always invoke mp_hal_delay_ms when >= to 0ms
- modbluetooth: clamp MTU values to 32->UINT16_MAX
- nimble: allow modbluetooth binding to hook "sent HCI packet"
- nimble: add "memory stalling" mechanism for l2cap_send
- uasyncio: in open_connection use address info in socket creation
- modujson: add support for dump/dumps separators keyword-argument
- modlwip: fix close and clean up of UDP and raw sockets
- modbluetooth: add send_update arg to gatts_write
- add machine.bitstream
- modframebuf: enable blit between different formats via a palette
lib:
- tinyusb: update to version 0.10.1
- pico-sdk: update to version 1.2.0
- utils/stdout_helpers: make mp_hal_stdout_tx_strn_cooked efficient
- axtls: switch to repo at micropython/axtls
- axtls: update to latest axtls 2.1.5 wih additional commits
- re1.5: move re1.5 code from extmod to lib
- uzlib: move uzlib code from extmod to lib
- crypto-algorithms: move crypto-algorithms code from extmod to lib
- update README's based on contents of these dirs
drivers:
- neopixel: add common machine.bitstream-based neopixel module
- neopixel: optimize fill() for speed
- neopixel: reduce code size of driver
- cyw43: fix cyw43_deinit so it can be called many times in a row
- cyw43: make wifi join fail if interface is not active
mpy-cross:
- disable stack check when building with Emscripten
Support components
==================
docs:
- library: document new esp32.RMT features and fix wait_done
- library: warn that ustruct doesn't handle spaces in format strings
- esp8266/tutorial: change flash mode from dio to dout
- replace master/slave with controller/peripheral in I2C and SPI
- rp2: enhance quickref and change image to Pico pinout
- rp2: update general section to give a brief technical overview
- library/utime.rst: clarify behaviour and precision of sleep ms/us
- library/uasyncio.rst: document stream readexactly() method
- library/machine.I2S.rst: fix use of sd pin in examples
- zephyr: add quick reference for the Zephyr port
- library/zephyr: add libraries specific to the Zephyr port
- templates: add unix and zephyr quickref links to top-index
- rename ufoo.rst to foo.rst
- replace ufoo with foo in all docs
- library/index.rst: clarify module naming and purpose
- library/builtins.rst: add module title
- library/network.rst: simplify socket import
- add docs for machine.bitstream and neopixel module
- library: fix usage of :term: for frozen module reference
- esp8266: use monospace for software tools
- reference: mention that slicing a memoryview causes allocation
examples: no changes specific to this component/port
tests:
- extmod: make uasyncio_heaplock test more deterministic
- cpydiff/modules_struct_whitespace_in_format: run black
- extmod/ujson: add tests for dump/dumps separators argument
- run-multitests.py: add broadcast and wait facility
- multi_bluetooth/ble_subscribe.py: add test for subscription
- extmod/vfs_fat_finaliser.py: ensure alloc at never-used GC blocks
- basics: split f-string debug printing to separate file with .exp
- pybnative: make while.py test run on boards without pyb.delay
tools:
- autobuild: add scripts to build release firmware
- remove obsolete build-stm-latest.sh script
- ci.sh: run apt-get update in ci_powerpc_setup
- makemanifest.py: allow passing flags to mpy-tool.py
- autobuild: add mimxrt port to build scripts for nightly builds
- pyboard.py: add cmd-line option to make soft reset configurable
- mpremote: swap order of PID and VID in connect-list output
- ci.sh: build unix dev variant as part of macOS CI
- ci.sh: build GENERIC_C3 board as part of esp32 CI
- autobuild: use separate IDF version to build newer esp32 SoCs
- autobuild: add FeatherS2 and TinyS2 to esp32 auto builds
- mpremote: add seek whence for mounted files
- mpremote: raise OSError on unsupported RemoteFile.seek
- autobuild: add the MIMXRT1050_EVKB board to the daily builds
- ci.sh: add mpy-cross build to nrf port
- codeformat.py: include ports/nrf/modules/nrf in code formatting
- gen-cpydiff.py: don't rename foo to ufoo in diff output
- autobuild: add auto build for Silicognition wESP32
- mpremote: fix connect-list in case VID/PID are None
- mpremote: add "devs" shortcut for "connect list"
- mpremote: remove support for pyb.USB_VCP in/out specialisation
- autobuild: don't use "-B" for make, it's already a fresh build
- pyboard.py: move --no-exclusive/--soft-reset out of mutex group
- pyboard.py: make --no-follow use same variable as --follow
- pyboard.py: add --exclusive to match --no-exclusive
- pyboard.py: make --no-soft-reset consistent with other args
- uncrustify: force 1 newline at end of file
- mpremote: bump version to 0.0.6
CI:
- workflows: add workflow to build and test javascript port
- workflows: switch from Coveralls to Codecov
- workflows: switch from lcov to gcov
- workflows: add workflow to build and test unix dev variant
The ports
=========
all ports:
- use common mp_hal_stdout_tx_strn_cooked instead of custom one
- update for move of crypto-algorithms, uzlib to lib
- rename USBD_VID/PID config macros to MICROPY_HW_USB_VID/PID
bare-arm port: no changes specific to this component/port
cc3200 port: no changes specific to this component/port
esp8266 port:
- add __len__ to NeoPixel driver to support iterating
- Makefile: add more libm files to build
- include hidden networks in WLAN.scan results
- replace esp.neopixel with machine.bitstream
- remove dead code for end_ticks in machine_bitstream
esp32 port:
- boards/sdkconfig.base: disable MEMPROT_FEATURE to alloc from IRAM
- add __len__ to NeoPixel driver to support iterating
- main: allow MICROPY_DIR to be overridden
- esp32_rmt: fix RMT looping in newer IDF versions
- esp32_rmt: enhance RMT with idle_level and write_pulses modes
- add new machine.I2S class for I2S protocol support
- machine_spi: calculate actual attained baudrate
- machine_hw_spi: use a 2 item SPI queue for long transfers
- machine_dac: add MICROPY_PY_MACHINE_DAC option, enable by default
- machine_i2s: add MICROPY_PY_MACHINE_I2S option, enable by default
- fix use of mp_int_t, size_t and uintptr_t
- add initial support for ESP32C3 SoCs
- boards/GENERIC_C3: add generic C3-based board
- modmachine: release the GIL in machine.idle()
- mphalport: always yield at least once in delay_ms
- machine_uart: add flow kw-arg to enable hardware flow control
- boards: add Silicognition wESP32 board configuration
- mpconfigport.h: enable reverse and inplace special methods
- include hidden networks in WLAN.scan results
- makeimg.py: get bootloader and partition offset from sdkconfig
- enable MICROPY_PY_FSTRINGS by default
- machine_hw_spi: release GIL during transfers
- machine_pin: make check for non-output pins respect chip variant
- replace esp.neopixel with machine.bitstream
- remove dead code for end_ticks in machine_bitstream
- boards: add GENERIC_C3_USB board with USB serial/JTAG support
javascript port:
- rework Makefile and GC so it works with latest Emscripten
- Makefile: suppress compiler errors from array bounds
- Makefile: change variable to EXPORTED_RUNTIME_METHODS
mimxrt port:
- move calc_weekday helper function to timeutils
- machine_spi: add the SPI class to the machine module
- moduos: seed the PRNG on boot using the TRNG
- boards: set vfs partition start to 1 MBbyte
- main: skip running main.py if boot.py failed
- main: extend the information returned by help()
- mimxrt_flash: remove commented-out code
- modmachine: add a few minor methods to the machine module
- machine_led: use mp_raise_msg_varg helper
- machine_i2c: add hardware-based machine.I2C to machine module
- add support for Hyperflash chips
- boards: add support for the MIMXRT1050_EVKB board
- machine_pin: implement ioctl for Pin
minimal port:
- Makefile: add support for building with user C modules
nrf port:
- modules: replace master/slave with controller/peripheral in SPI
- boards/common.ld: calculate unused flash region
- modules/nrf: add new nrf module with flash block device
- drivers: add support for using flash block device with SoftDevice
- mpconfigport.h: expose nrf module when MICROPY_PY_NRF is set
- README: update README.md to reflect internal file systems
- mpconfigport.h: tune FAT FS configuration
- Makefile: add _fs_size linker script override from make
- modules/uos: allow a board to configure MICROPY_VFS_FAT/LFS1/LFS2
- mpconfigport.h: enable MICROPY_PY_IO_FILEIO when an FS is enabled
- qstrdefsport.h: add entries for in-built FS mount points
- main: add auto mount and auto format hook for internal flash FS
- boards: enable needed features for FAT/LFS1/LFS2
- facilitate use of freeze manifest
- boards: set FROZEN_MANIFEST blank when SD present on nrf51 targets
- modules/scripts: add file system formatting script
- Makefile: set default manifest file for all targets
- mphalport: add dummy function for mp_hal_time_ns()
- boards: enable MICROPY_VFS_LFS2 for all target boards
- modules/uos: add ilistdir to uos module
- modules/nrf: add function to enable/disable DCDC
- enable source line on tracebacks
- set .mpy features consistent with documentation and other ports
pic16bit port: no changes specific to this component/port
powerpc port: no changes specific to this component/port
qemu-arm port: no changes specific to this component/port
rp2 port:
- use 0=Monday datetime convention in RTC
- machine_rtc: in RTC.datetime, compute weekday automatically
- CMakeLists.txt: suppress compiler errors for pico-sdk and tinyusb
- tusb_config.h: set CFG_TUD_CDC_EP_BUFSIZE to 256
- machine_uart: add hardware flow control support
- machine_uart: allow overriding default machine UART pins
- machine_i2c: allow boards to configure I2C pins using new macros
- machine_spi: allow boards to configure SPI pins using new macros
- machine_uart: fix poll ioctl to also check hardware FIFO
- machine_uart: fix read when FIFO has chars but ringbuf doesn't
- tusb_port: allow boards to configure USB VID and PID
- boards/ADAFRUIT_FEATHER_RP2040: configure custom VID/PID
- boards/ADAFRUIT_FEATHER_RP2040: configure I2C/SPI default pins
- boards/SPARKFUN_PROMICRO: configure UART/I2C/SPI default pins
- boards/SPARKFUN_THINGPLUS: configure I2C/SPI default pins
- boards: add Adafruit ItsyBitsy RP2040
- boards: add Adafruit QT Py RP2040
- boards: add Pimoroni Pico LiPo 4MB
- boards: add Pimoroni Pico LiPo 16MB
- boards: add Pimoroni Tiny 2040
- CMakeLists.txt: allow a board's cmake to set the manifest path
- enable MICROPY_PY_FSTRINGS by default
- Makefile: add "submodules" target, to match other ports
- rp2_flash: disable IRQs while calling flash_erase/program
- CMakeLists.txt: add option to enable double tap reset to bootrom
- mpconfigport.h: allow boards to add root pointers
samd port:
- add support for building with user C modules
stm32 port:
- softtimer: add soft_timer_reinsert() helper function
- mpbthciport: change from systick to soft-timer for BT scheduling
- provide a custom BTstack runloop that integrates with soft timer
- usb: make irq's default trigger enable all events
- boardctrl: skip running main.py if boot.py had an error
- sdio: fix undefined reference to DMA stream on H7
- dma: add DMAMUX configuration for H7 to fix dma_nohal_init
- main: call mp_deinit() at end of main
- adc: allow using ADC12 and ADC3 for H7
- adc: define the ADC instance used for internal channels
- adc: simplify and generalise how pin_adcX table is defined
- add new machine.I2S class for I2S protocol support
- boards/NUCLEO_F446RE: fix I2C1 pin assignment to match datasheet
- replace master/slave with controller/peripheral in I2C and SPI
- systick: always POLL_HOOK when delaying for milliseconds
- sdram: make SDRAM test cache aware, and optional failure with msg
- boards/NUCLEO_F446RE: enable CAN bus support
- boards: add support for SparkFun STM32 MicroMod Processor board
- uart: fix LPUART1 baudrate set/get
- uart: support low baudrates on LPUART1
- boards/STM32F429DISC: set correct UART2 pins and add UART3/6
- boards/NUCLEO_F439ZI: add board definition for NUCLEO_F439ZI
- boards/LEGO_HUB_NO6: add board definition for LEGO_HUB_NO6
- Makefile: update to only pull in used Bluetooth library
- README.md: update supported MCUs, and submodule and mboot use
- usbd_desc: rename USBD_xxx descriptor opts to MICROPY_HW_USB_xxx
- usbd_cdc_interface: rename USBD_CDC_xx opts to MICROPY_HW_USB_xx
- powerctrl: support changing frequency on WB MCUs
- boards/NUCLEO_H743ZI2: add modified version of NUCLEO_H743ZI
- mbedtls: fix compile warning about uninitialized val
- enable MICROPY_PY_FSTRINGS by default
- add implementation of machine.bitstream
- Makefile: allow GIT_SUBMODULES and LIBS to be extended
- stm32_it: support TIM17 IRQs on WB MCUs
- disable computed goto on constrained boards
- storage: make extended-block-device more configurable
- boards/LEGO_HUB_NO6: change SPI flash storage to use hardware SPI
- boards/LEGO_HUB_NO6: skip first 1MiB of SPI flash for storage
- boards/LEGO_HUB_NO6: add make commands to backup/restore firmware
teensy port: no changes specific to this component/port
unix port:
- modffi: add option to lock GC in callback, and cfun access
- Makefile: add back LIB_SRC_C to list of object files
- variants: enable help and help("modules") on standard and dev
- Makefile: disable error compression on arm-linux-gnueabi-gcc
windows port:
- Makefile: add .exe extension to executables name
- appveyor: update to VS 2017 and use Python 3.8 for build/test
zephyr port:
- machine_spi: add support for hardware SPI
2021-10-14 15:38:41 -04:00
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#include "shared/runtime/interrupt_char.h"
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#include "py/obj.h"
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#include "py/objproperty.h"
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#include "py/runtime.h"
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2022-04-19 16:14:50 -04:00
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#define NO_DMA_CHANNEL (-1)
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// Count how many state machines are using each pin.
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STATIC uint8_t _pin_reference_count[NUM_BANK0_GPIOS];
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STATIC uint32_t _current_program_id[NUM_PIOS][NUM_PIO_STATE_MACHINES];
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STATIC uint8_t _current_program_offset[NUM_PIOS][NUM_PIO_STATE_MACHINES];
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STATIC uint8_t _current_program_len[NUM_PIOS][NUM_PIO_STATE_MACHINES];
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STATIC bool _never_reset[NUM_PIOS][NUM_PIO_STATE_MACHINES];
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STATIC uint32_t _current_pins[NUM_PIOS];
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STATIC uint32_t _current_sm_pins[NUM_PIOS][NUM_PIO_STATE_MACHINES];
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2022-04-19 17:33:51 -04:00
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STATIC int8_t _sm_dma_plus_one[NUM_PIOS][NUM_PIO_STATE_MACHINES];
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#define SM_DMA_ALLOCATED(pio_index, sm) (_sm_dma_plus_one[(pio_index)][(sm)] != 0)
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#define SM_DMA_GET_CHANNEL(pio_index, sm) (_sm_dma_plus_one[(pio_index)][(sm)] - 1)
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#define SM_DMA_CLEAR_CHANNEL(pio_index, sm) (_sm_dma_plus_one[(pio_index)][(sm)] = 0)
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#define SM_DMA_SET_CHANNEL(pio_isntance, sm, channel) (_sm_dma_plus_one[(pio_index)][(sm)] = (channel) + 1)
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STATIC PIO pio_instances[2] = {pio0, pio1};
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typedef void (*interrupt_handler_type)(void *);
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STATIC interrupt_handler_type _interrupt_handler[NUM_PIOS][NUM_PIO_STATE_MACHINES];
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STATIC void *_interrupt_arg[NUM_PIOS][NUM_PIO_STATE_MACHINES];
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STATIC void rp2pio_statemachine_interrupt_handler(void);
|
2021-01-20 19:47:18 -05:00
|
|
|
|
2021-03-04 11:03:31 -05:00
|
|
|
static void rp2pio_statemachine_set_pull(uint32_t pull_pin_up, uint32_t pull_pin_down, uint32_t pins_we_use) {
|
2022-10-19 22:03:28 -04:00
|
|
|
for (size_t i = 0; i < NUM_BANK0_GPIOS; i++) {
|
2021-03-04 11:03:31 -05:00
|
|
|
bool used = pins_we_use & (1 << i);
|
2021-03-15 09:57:36 -04:00
|
|
|
if (used) {
|
2021-03-04 11:03:31 -05:00
|
|
|
bool pull_up = pull_pin_up & (1 << i);
|
|
|
|
bool pull_down = pull_pin_down & (1 << i);
|
|
|
|
gpio_set_pulls(i, pull_up, pull_down);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2021-01-20 19:47:18 -05:00
|
|
|
|
2022-04-19 17:33:51 -04:00
|
|
|
STATIC void rp2pio_statemachine_clear_dma(int pio_index, int sm) {
|
|
|
|
if (SM_DMA_ALLOCATED(pio_index, sm)) {
|
|
|
|
int channel = SM_DMA_GET_CHANNEL(pio_index, sm);
|
|
|
|
uint32_t channel_mask = 1u << channel;
|
|
|
|
dma_hw->inte0 &= ~channel_mask;
|
|
|
|
if (!dma_hw->inte0) {
|
|
|
|
irq_set_mask_enabled(1 << DMA_IRQ_0, false);
|
|
|
|
}
|
2022-04-23 14:09:36 -04:00
|
|
|
MP_STATE_PORT(background_pio)[channel] = NULL;
|
2022-04-19 17:33:51 -04:00
|
|
|
dma_channel_abort(channel);
|
|
|
|
dma_channel_unclaim(channel);
|
|
|
|
}
|
|
|
|
SM_DMA_CLEAR_CHANNEL(pio_index, sm);
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|
|
|
}
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|
|
|
|
2021-11-10 09:42:21 -05:00
|
|
|
STATIC void _reset_statemachine(PIO pio, uint8_t sm, bool leave_pins) {
|
2021-01-20 19:47:18 -05:00
|
|
|
uint8_t pio_index = pio_get_index(pio);
|
2022-04-19 17:33:51 -04:00
|
|
|
rp2pio_statemachine_clear_dma(pio_index, sm);
|
2021-01-20 19:47:18 -05:00
|
|
|
uint32_t program_id = _current_program_id[pio_index][sm];
|
|
|
|
if (program_id == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
_current_program_id[pio_index][sm] = 0;
|
|
|
|
bool program_in_use = false;
|
|
|
|
for (size_t i = 0; i < NUM_PIO_STATE_MACHINES; i++) {
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|
|
|
if (_current_program_id[pio_index][i] == program_id) {
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|
|
|
program_in_use = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!program_in_use) {
|
|
|
|
uint8_t offset = _current_program_offset[pio_index][sm];
|
|
|
|
pio_program_t program_struct = {
|
|
|
|
.length = _current_program_len[pio_index][sm]
|
|
|
|
};
|
|
|
|
pio_remove_program(pio, &program_struct, offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t pins = _current_sm_pins[pio_index][sm];
|
2022-10-19 22:03:28 -04:00
|
|
|
for (size_t pin_number = 0; pin_number < NUM_BANK0_GPIOS; pin_number++) {
|
2021-01-20 19:47:18 -05:00
|
|
|
if ((pins & (1 << pin_number)) == 0) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
_pin_reference_count[pin_number]--;
|
|
|
|
if (_pin_reference_count[pin_number] == 0) {
|
|
|
|
if (!leave_pins) {
|
|
|
|
reset_pin_number(pin_number);
|
|
|
|
}
|
|
|
|
_current_pins[pio_index] &= ~(1 << pin_number);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
_current_sm_pins[pio_index][sm] = 0;
|
2021-03-05 10:00:03 -05:00
|
|
|
pio->inte0 &= ~((PIO_IRQ0_INTF_SM0_RXNEMPTY_BITS | PIO_IRQ0_INTF_SM0_TXNFULL_BITS | PIO_IRQ0_INTF_SM0_BITS) << sm);
|
2021-02-23 18:50:00 -05:00
|
|
|
pio_sm_unclaim(pio, sm);
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
void reset_rp2pio_statemachine(void) {
|
|
|
|
for (size_t i = 0; i < NUM_PIOS; i++) {
|
|
|
|
PIO pio = pio_instances[i];
|
|
|
|
for (size_t j = 0; j < NUM_PIO_STATE_MACHINES; j++) {
|
|
|
|
if (_never_reset[i][j]) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
_reset_statemachine(pio, j, false);
|
|
|
|
}
|
|
|
|
}
|
2021-03-15 09:57:36 -04:00
|
|
|
for (uint8_t irq = PIO0_IRQ_0; irq <= PIO1_IRQ_1; irq++) {
|
|
|
|
irq_handler_t int_handler = irq_get_exclusive_handler(irq);
|
|
|
|
if (int_handler > 0) {
|
|
|
|
irq_set_enabled(irq, false);
|
|
|
|
irq_remove_handler(irq,int_handler);
|
|
|
|
}
|
|
|
|
}
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
STATIC uint32_t _check_pins_free(const mcu_pin_obj_t *first_pin, uint8_t pin_count, bool exclusive_pin_use) {
|
2021-01-20 19:47:18 -05:00
|
|
|
uint32_t pins_we_use = 0;
|
|
|
|
if (first_pin != NULL) {
|
|
|
|
for (size_t i = 0; i < pin_count; i++) {
|
|
|
|
uint8_t pin_number = first_pin->number + i;
|
2022-10-19 22:03:28 -04:00
|
|
|
if (pin_number >= NUM_BANK0_GPIOS) {
|
2021-01-20 19:47:18 -05:00
|
|
|
mp_raise_ValueError(translate("Pin count too large"));
|
|
|
|
}
|
2022-10-19 22:03:28 -04:00
|
|
|
const mcu_pin_obj_t *pin = mcu_get_pin_by_number(pin_number);
|
|
|
|
if (!pin) {
|
|
|
|
mp_raise_ValueError_varg(translate("%q in use"), MP_QSTR_Pin);
|
|
|
|
}
|
|
|
|
|
2021-01-20 19:47:18 -05:00
|
|
|
if (exclusive_pin_use || _pin_reference_count[pin_number] == 0) {
|
|
|
|
assert_pin_free(pin);
|
|
|
|
}
|
|
|
|
pins_we_use |= 1 << pin_number;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return pins_we_use;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
bool rp2pio_statemachine_construct(rp2pio_statemachine_obj_t *self,
|
2021-03-15 09:57:36 -04:00
|
|
|
const uint16_t *program, size_t program_len,
|
2021-01-20 19:47:18 -05:00
|
|
|
size_t frequency,
|
2021-03-15 09:57:36 -04:00
|
|
|
const uint16_t *init, size_t init_len,
|
|
|
|
const mcu_pin_obj_t *first_out_pin, uint8_t out_pin_count,
|
|
|
|
const mcu_pin_obj_t *first_in_pin, uint8_t in_pin_count,
|
2021-03-04 11:03:31 -05:00
|
|
|
uint32_t pull_pin_up, uint32_t pull_pin_down,
|
2021-03-15 09:57:36 -04:00
|
|
|
const mcu_pin_obj_t *first_set_pin, uint8_t set_pin_count,
|
|
|
|
const mcu_pin_obj_t *first_sideset_pin, uint8_t sideset_pin_count,
|
2021-02-23 18:50:00 -05:00
|
|
|
uint32_t initial_pin_state, uint32_t initial_pin_direction,
|
2021-07-22 12:39:04 -04:00
|
|
|
const mcu_pin_obj_t *jmp_pin,
|
2021-01-20 19:47:18 -05:00
|
|
|
uint32_t pins_we_use, bool tx_fifo, bool rx_fifo,
|
|
|
|
bool auto_pull, uint8_t pull_threshold, bool out_shift_right,
|
2021-02-23 18:50:00 -05:00
|
|
|
bool wait_for_txstall,
|
2021-01-20 19:47:18 -05:00
|
|
|
bool auto_push, uint8_t push_threshold, bool in_shift_right,
|
2021-08-27 08:18:18 -04:00
|
|
|
bool claim_pins,
|
2021-12-22 15:00:19 -05:00
|
|
|
bool user_interruptible,
|
2022-02-13 17:38:53 -05:00
|
|
|
bool sideset_enable,
|
|
|
|
int wrap_target, int wrap
|
2021-08-27 08:18:18 -04:00
|
|
|
) {
|
2021-01-20 19:47:18 -05:00
|
|
|
// Create a program id that isn't the pointer so we can store it without storing the original object.
|
2021-03-15 09:57:36 -04:00
|
|
|
uint32_t program_id = ~((uint32_t)program);
|
2021-01-20 19:47:18 -05:00
|
|
|
|
|
|
|
// Next, find a PIO and state machine to use.
|
|
|
|
size_t pio_index = NUM_PIOS;
|
|
|
|
uint8_t program_offset = 32;
|
|
|
|
pio_program_t program_struct = {
|
2021-03-15 09:57:36 -04:00
|
|
|
.instructions = (uint16_t *)program,
|
2021-01-20 19:47:18 -05:00
|
|
|
.length = program_len,
|
2021-03-14 16:05:56 -04:00
|
|
|
.origin = -1
|
2021-01-20 19:47:18 -05:00
|
|
|
};
|
|
|
|
for (size_t i = 0; i < NUM_PIOS; i++) {
|
|
|
|
PIO pio = pio_instances[i];
|
|
|
|
uint8_t free_count = 0;
|
|
|
|
for (size_t j = 0; j < NUM_PIO_STATE_MACHINES; j++) {
|
|
|
|
if (_current_program_id[i][j] == program_id &&
|
|
|
|
_current_program_len[i][j] == program_len) {
|
|
|
|
program_offset = _current_program_offset[i][j];
|
|
|
|
}
|
|
|
|
int temp_claim = pio_claim_unused_sm(pio, false);
|
|
|
|
if (temp_claim >= 0) {
|
|
|
|
pio_sm_unclaim(pio, temp_claim);
|
|
|
|
free_count++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (free_count > 0 && (program_offset < 32 || pio_can_add_program(pio, &program_struct))) {
|
|
|
|
pio_index = i;
|
|
|
|
if (program_offset < 32) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// Reset program offset if we weren't able to find a free state machine
|
|
|
|
// on that PIO. (We would have broken the loop otherwise.)
|
|
|
|
program_offset = 32;
|
|
|
|
}
|
|
|
|
|
2022-09-30 09:15:17 -04:00
|
|
|
size_t state_machine = NUM_PIO_STATE_MACHINES;
|
2021-01-20 19:47:18 -05:00
|
|
|
if (pio_index < NUM_PIOS) {
|
|
|
|
PIO pio = pio_instances[pio_index];
|
|
|
|
for (size_t i = 0; i < NUM_PIOS; i++) {
|
|
|
|
if (i == pio_index) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if ((_current_pins[i] & pins_we_use) != 0) {
|
|
|
|
// Pin in use by another PIO already.
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
state_machine = pio_claim_unused_sm(pio, false);
|
|
|
|
}
|
|
|
|
if (pio_index == NUM_PIOS || state_machine < 0 || state_machine >= NUM_PIO_STATE_MACHINES) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
self->pio = pio_instances[pio_index];
|
|
|
|
self->state_machine = state_machine;
|
|
|
|
if (program_offset == 32) {
|
|
|
|
program_offset = pio_add_program(self->pio, &program_struct);
|
|
|
|
}
|
2021-02-24 17:58:29 -05:00
|
|
|
self->offset = program_offset;
|
2021-01-20 19:47:18 -05:00
|
|
|
_current_program_id[pio_index][state_machine] = program_id;
|
|
|
|
_current_program_len[pio_index][state_machine] = program_len;
|
|
|
|
_current_program_offset[pio_index][state_machine] = program_offset;
|
|
|
|
_current_sm_pins[pio_index][state_machine] = pins_we_use;
|
|
|
|
_current_pins[pio_index] |= pins_we_use;
|
|
|
|
|
2021-02-23 18:50:00 -05:00
|
|
|
pio_sm_set_pins_with_mask(self->pio, state_machine, initial_pin_state, pins_we_use);
|
|
|
|
pio_sm_set_pindirs_with_mask(self->pio, state_machine, initial_pin_direction, pins_we_use);
|
2021-03-04 11:03:31 -05:00
|
|
|
rp2pio_statemachine_set_pull(pull_pin_up, pull_pin_down, pins_we_use);
|
2021-02-23 18:50:00 -05:00
|
|
|
self->initial_pin_state = initial_pin_state;
|
|
|
|
self->initial_pin_direction = initial_pin_direction;
|
2021-03-04 11:03:31 -05:00
|
|
|
self->pull_pin_up = pull_pin_up;
|
|
|
|
self->pull_pin_down = pull_pin_down;
|
2021-02-23 18:50:00 -05:00
|
|
|
|
2022-10-19 22:03:28 -04:00
|
|
|
for (size_t pin_number = 0; pin_number < NUM_BANK0_GPIOS; pin_number++) {
|
2021-01-20 19:47:18 -05:00
|
|
|
if ((pins_we_use & (1 << pin_number)) == 0) {
|
|
|
|
continue;
|
|
|
|
}
|
2022-10-19 22:03:28 -04:00
|
|
|
const mcu_pin_obj_t *pin = mcu_get_pin_by_number(pin_number);
|
|
|
|
if (!pin) {
|
|
|
|
return false;
|
|
|
|
}
|
2021-01-20 19:47:18 -05:00
|
|
|
_pin_reference_count[pin_number]++;
|
|
|
|
// Also claim the pin at the top level when we're the first to grab it.
|
|
|
|
if (_pin_reference_count[pin_number] == 1) {
|
|
|
|
if (claim_pins) {
|
|
|
|
claim_pin(pin);
|
|
|
|
}
|
|
|
|
pio_gpio_init(self->pio, pin_number);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pio_sm_config c = {0, 0, 0};
|
|
|
|
|
|
|
|
if (frequency == 0) {
|
|
|
|
frequency = clock_get_hz(clk_sys);
|
|
|
|
}
|
2021-03-15 09:57:36 -04:00
|
|
|
uint64_t frequency256 = ((uint64_t)clock_get_hz(clk_sys)) * 256;
|
2021-01-20 19:47:18 -05:00
|
|
|
uint64_t div256 = frequency256 / frequency;
|
|
|
|
if (frequency256 % div256 > 0) {
|
|
|
|
div256 += 1;
|
|
|
|
}
|
|
|
|
self->actual_frequency = frequency256 / div256;
|
|
|
|
sm_config_set_clkdiv_int_frac(&c, div256 / 256, div256 % 256);
|
|
|
|
|
|
|
|
if (first_out_pin != NULL) {
|
|
|
|
sm_config_set_out_pins(&c, first_out_pin->number, out_pin_count);
|
|
|
|
}
|
|
|
|
if (first_in_pin != NULL) {
|
|
|
|
sm_config_set_in_pins(&c, first_in_pin->number);
|
|
|
|
}
|
|
|
|
if (first_set_pin != NULL) {
|
|
|
|
sm_config_set_set_pins(&c, first_set_pin->number, set_pin_count);
|
|
|
|
}
|
|
|
|
if (first_sideset_pin != NULL) {
|
2021-12-22 15:00:19 -05:00
|
|
|
size_t total_sideset_bits = sideset_pin_count;
|
|
|
|
if (sideset_enable) {
|
|
|
|
total_sideset_bits += 1;
|
|
|
|
}
|
|
|
|
sm_config_set_sideset(&c, total_sideset_bits, sideset_enable, false /* pin direction */);
|
2021-01-20 19:47:18 -05:00
|
|
|
sm_config_set_sideset_pins(&c, first_sideset_pin->number);
|
|
|
|
}
|
2021-07-22 12:39:04 -04:00
|
|
|
if (jmp_pin != NULL) {
|
|
|
|
sm_config_set_jmp_pin(&c, jmp_pin->number);
|
|
|
|
}
|
2022-02-13 17:38:53 -05:00
|
|
|
|
|
|
|
mp_arg_validate_int_range(wrap, -1, program_len - 1, MP_QSTR_wrap);
|
|
|
|
if (wrap == -1) {
|
|
|
|
wrap = program_len - 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
mp_arg_validate_int_range(wrap_target, 0, program_len - 1, MP_QSTR_wrap_target);
|
|
|
|
|
|
|
|
wrap += program_offset;
|
|
|
|
wrap_target += program_offset;
|
|
|
|
|
|
|
|
sm_config_set_wrap(&c, wrap_target, wrap);
|
2021-01-20 19:47:18 -05:00
|
|
|
sm_config_set_in_shift(&c, in_shift_right, auto_push, push_threshold);
|
|
|
|
sm_config_set_out_shift(&c, out_shift_right, auto_pull, pull_threshold);
|
|
|
|
|
|
|
|
enum pio_fifo_join join = PIO_FIFO_JOIN_NONE;
|
|
|
|
if (!rx_fifo) {
|
|
|
|
join = PIO_FIFO_JOIN_TX;
|
|
|
|
} else if (!tx_fifo) {
|
|
|
|
join = PIO_FIFO_JOIN_RX;
|
|
|
|
}
|
|
|
|
if (rx_fifo) {
|
|
|
|
self->rx_dreq = pio_get_dreq(self->pio, self->state_machine, false);
|
|
|
|
}
|
|
|
|
if (tx_fifo) {
|
|
|
|
self->tx_dreq = pio_get_dreq(self->pio, self->state_machine, true);
|
|
|
|
}
|
|
|
|
self->in = rx_fifo;
|
|
|
|
self->out = tx_fifo;
|
|
|
|
self->out_shift_right = out_shift_right;
|
|
|
|
self->in_shift_right = in_shift_right;
|
2021-02-23 18:50:00 -05:00
|
|
|
self->wait_for_txstall = wait_for_txstall;
|
2021-08-27 08:18:18 -04:00
|
|
|
self->user_interruptible = user_interruptible;
|
2021-02-23 18:50:00 -05:00
|
|
|
|
|
|
|
self->init = init;
|
|
|
|
self->init_len = init_len;
|
2021-01-20 19:47:18 -05:00
|
|
|
|
|
|
|
sm_config_set_fifo_join(&c, join);
|
2021-02-24 17:58:29 -05:00
|
|
|
self->sm_config = c;
|
2021-01-20 19:47:18 -05:00
|
|
|
|
2022-04-19 16:14:50 -04:00
|
|
|
// no DMA allocated
|
2022-04-19 17:33:51 -04:00
|
|
|
SM_DMA_CLEAR_CHANNEL(pio_index, state_machine);
|
2022-04-19 16:14:50 -04:00
|
|
|
|
2021-01-20 19:47:18 -05:00
|
|
|
pio_sm_init(self->pio, self->state_machine, program_offset, &c);
|
2021-02-23 18:50:00 -05:00
|
|
|
common_hal_rp2pio_statemachine_run(self, init, init_len);
|
|
|
|
|
|
|
|
common_hal_rp2pio_statemachine_set_frequency(self, frequency);
|
2021-01-20 19:47:18 -05:00
|
|
|
pio_sm_set_enabled(self->pio, self->state_machine, true);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
static uint32_t mask_and_rotate(const mcu_pin_obj_t *first_pin, uint32_t bit_count, uint32_t value) {
|
2022-09-03 21:39:08 -04:00
|
|
|
if (!first_pin) {
|
|
|
|
return 0;
|
|
|
|
}
|
2021-02-23 18:50:00 -05:00
|
|
|
value = value & ((1 << bit_count) - 1);
|
|
|
|
uint32_t shift = first_pin->number;
|
|
|
|
return value << shift | value >> (32 - shift);
|
|
|
|
}
|
|
|
|
|
2021-01-20 19:47:18 -05:00
|
|
|
void common_hal_rp2pio_statemachine_construct(rp2pio_statemachine_obj_t *self,
|
2021-03-15 09:57:36 -04:00
|
|
|
const uint16_t *program, size_t program_len,
|
2021-01-20 19:47:18 -05:00
|
|
|
size_t frequency,
|
2021-03-15 09:57:36 -04:00
|
|
|
const uint16_t *init, size_t init_len,
|
|
|
|
const mcu_pin_obj_t *first_out_pin, uint8_t out_pin_count, uint32_t initial_out_pin_state, uint32_t initial_out_pin_direction,
|
|
|
|
const mcu_pin_obj_t *first_in_pin, uint8_t in_pin_count,
|
2021-03-04 11:03:31 -05:00
|
|
|
uint32_t pull_pin_up, uint32_t pull_pin_down,
|
2021-03-15 09:57:36 -04:00
|
|
|
const mcu_pin_obj_t *first_set_pin, uint8_t set_pin_count, uint32_t initial_set_pin_state, uint32_t initial_set_pin_direction,
|
|
|
|
const mcu_pin_obj_t *first_sideset_pin, uint8_t sideset_pin_count, uint32_t initial_sideset_pin_state, uint32_t initial_sideset_pin_direction,
|
2021-12-22 15:00:19 -05:00
|
|
|
bool sideset_enable,
|
2022-02-01 11:19:17 -05:00
|
|
|
const mcu_pin_obj_t *jmp_pin, digitalio_pull_t jmp_pull,
|
2021-04-22 12:47:05 -04:00
|
|
|
uint32_t wait_gpio_mask,
|
2021-01-20 19:47:18 -05:00
|
|
|
bool exclusive_pin_use,
|
|
|
|
bool auto_pull, uint8_t pull_threshold, bool out_shift_right,
|
2021-02-23 18:50:00 -05:00
|
|
|
bool wait_for_txstall,
|
2021-08-27 08:18:18 -04:00
|
|
|
bool auto_push, uint8_t push_threshold, bool in_shift_right,
|
2022-02-13 17:38:53 -05:00
|
|
|
bool user_interruptible,
|
|
|
|
int wrap_target, int wrap) {
|
2021-01-20 19:47:18 -05:00
|
|
|
|
|
|
|
// First, check that all pins are free OR already in use by any PIO if exclusive_pin_use is false.
|
2021-04-22 12:47:05 -04:00
|
|
|
uint32_t pins_we_use = wait_gpio_mask;
|
2021-01-20 19:47:18 -05:00
|
|
|
pins_we_use |= _check_pins_free(first_out_pin, out_pin_count, exclusive_pin_use);
|
|
|
|
pins_we_use |= _check_pins_free(first_in_pin, in_pin_count, exclusive_pin_use);
|
|
|
|
pins_we_use |= _check_pins_free(first_set_pin, set_pin_count, exclusive_pin_use);
|
|
|
|
pins_we_use |= _check_pins_free(first_sideset_pin, sideset_pin_count, exclusive_pin_use);
|
2021-07-22 12:39:04 -04:00
|
|
|
pins_we_use |= _check_pins_free(jmp_pin, 1, exclusive_pin_use);
|
2021-01-20 19:47:18 -05:00
|
|
|
|
|
|
|
// Look through the program to see what we reference and make sure it was provided.
|
|
|
|
bool tx_fifo = false;
|
|
|
|
bool rx_fifo = false;
|
|
|
|
bool in_loaded = false; // can be loaded in other ways besides the fifo
|
|
|
|
bool out_loaded = false;
|
|
|
|
bool in_used = false;
|
|
|
|
bool out_used = false;
|
|
|
|
for (size_t i = 0; i < program_len; i++) {
|
|
|
|
uint16_t full_instruction = program[i];
|
|
|
|
uint16_t instruction = full_instruction & 0xe000;
|
|
|
|
if (instruction == 0x8000) {
|
|
|
|
if ((full_instruction & 0xe080) == pio_instr_bits_push) {
|
|
|
|
rx_fifo = true;
|
|
|
|
in_loaded = true;
|
|
|
|
} else { // pull otherwise.
|
|
|
|
tx_fifo = true;
|
|
|
|
out_loaded = true;
|
|
|
|
}
|
|
|
|
}
|
2021-07-23 07:35:20 -04:00
|
|
|
if (instruction == pio_instr_bits_jmp) {
|
|
|
|
uint16_t condition = (full_instruction & 0x00e0) >> 5;
|
|
|
|
if ((condition == 0x6) && (jmp_pin == NULL)) {
|
|
|
|
mp_raise_ValueError_varg(translate("Missing jmp_pin. Instruction %d jumps on pin"), i);
|
|
|
|
}
|
|
|
|
}
|
2021-01-20 19:47:18 -05:00
|
|
|
if (instruction == pio_instr_bits_wait) {
|
|
|
|
uint16_t wait_source = (full_instruction & 0x0060) >> 5;
|
|
|
|
uint16_t wait_index = full_instruction & 0x001f;
|
|
|
|
if (wait_source == 0 && (pins_we_use & (1 << wait_index)) == 0) { // GPIO
|
|
|
|
mp_raise_ValueError_varg(translate("Instruction %d uses extra pin"), i);
|
|
|
|
}
|
|
|
|
if (wait_source == 1) { // Input pin
|
|
|
|
if (first_in_pin == NULL) {
|
|
|
|
mp_raise_ValueError_varg(translate("Missing first_in_pin. Instruction %d waits based on pin"), i);
|
|
|
|
}
|
2022-07-02 17:30:36 -04:00
|
|
|
if (wait_index >= in_pin_count) {
|
2021-01-20 19:47:18 -05:00
|
|
|
mp_raise_ValueError_varg(translate("Instruction %d waits on input outside of count"), i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (instruction == pio_instr_bits_in) {
|
|
|
|
uint16_t source = (full_instruction & 0x00e0) >> 5;
|
|
|
|
uint16_t bit_count = full_instruction & 0x001f;
|
|
|
|
if (source == 0) {
|
|
|
|
if (first_in_pin == NULL) {
|
|
|
|
mp_raise_ValueError_varg(translate("Missing first_in_pin. Instruction %d shifts in from pin(s)"), i);
|
|
|
|
}
|
|
|
|
if (bit_count > in_pin_count) {
|
|
|
|
mp_raise_ValueError_varg(translate("Instruction %d shifts in more bits than pin count"), i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (auto_push) {
|
|
|
|
in_loaded = true;
|
|
|
|
rx_fifo = true;
|
|
|
|
}
|
|
|
|
in_used = true;
|
|
|
|
}
|
|
|
|
if (instruction == pio_instr_bits_out) {
|
|
|
|
uint16_t bit_count = full_instruction & 0x001f;
|
|
|
|
uint16_t destination = (full_instruction & 0x00e0) >> 5;
|
|
|
|
// Check for pins or pindirs destination.
|
|
|
|
if (destination == 0x0 || destination == 0x4) {
|
|
|
|
if (first_out_pin == NULL) {
|
|
|
|
mp_raise_ValueError_varg(translate("Missing first_out_pin. Instruction %d shifts out to pin(s)"), i);
|
|
|
|
}
|
|
|
|
if (bit_count > out_pin_count) {
|
|
|
|
mp_raise_ValueError_varg(translate("Instruction %d shifts out more bits than pin count"), i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (auto_pull) {
|
|
|
|
out_loaded = true;
|
|
|
|
tx_fifo = true;
|
|
|
|
}
|
|
|
|
out_used = true;
|
|
|
|
}
|
|
|
|
if (instruction == pio_instr_bits_set) {
|
|
|
|
uint16_t destination = (full_instruction & 0x00e0) >> 5;
|
|
|
|
// Check for pins or pindirs destination.
|
|
|
|
if ((destination == 0x00 || destination == 0x4) && first_set_pin == NULL) {
|
|
|
|
mp_raise_ValueError_varg(translate("Missing first_set_pin. Instruction %d sets pin(s)"), i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (instruction == pio_instr_bits_mov) {
|
|
|
|
uint16_t source = full_instruction & 0x0007;
|
|
|
|
uint16_t destination = (full_instruction & 0x00e0) >> 5;
|
|
|
|
// Check for pins or pindirs destination.
|
|
|
|
if (destination == 0x0 && first_out_pin == NULL) {
|
|
|
|
mp_raise_ValueError_varg(translate("Missing first_out_pin. Instruction %d writes pin(s)"), i);
|
|
|
|
}
|
|
|
|
if (source == 0x0 && first_in_pin == NULL) {
|
|
|
|
mp_raise_ValueError_varg(translate("Missing first_in_pin. Instruction %d reads pin(s)"), i);
|
|
|
|
}
|
|
|
|
if (destination == 0x6) {
|
|
|
|
in_loaded = true;
|
|
|
|
} else if (destination == 0x7) {
|
|
|
|
out_loaded = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!in_loaded && in_used) {
|
|
|
|
mp_raise_ValueError_varg(translate("Program does IN without loading ISR"));
|
|
|
|
}
|
|
|
|
if (!out_loaded && out_used) {
|
|
|
|
mp_raise_ValueError_varg(translate("Program does OUT without loading OSR"));
|
|
|
|
}
|
|
|
|
|
2021-02-23 18:50:00 -05:00
|
|
|
uint32_t initial_pin_state = mask_and_rotate(first_out_pin, out_pin_count, initial_out_pin_state);
|
|
|
|
uint32_t initial_pin_direction = mask_and_rotate(first_out_pin, out_pin_count, initial_out_pin_direction);
|
|
|
|
initial_set_pin_state = mask_and_rotate(first_set_pin, set_pin_count, initial_set_pin_state);
|
|
|
|
initial_set_pin_direction = mask_and_rotate(first_set_pin, set_pin_count, initial_set_pin_direction);
|
|
|
|
uint32_t set_out_overlap = mask_and_rotate(first_out_pin, out_pin_count, 0xffffffff) &
|
2021-03-15 09:57:36 -04:00
|
|
|
mask_and_rotate(first_set_pin, set_pin_count, 0xffffffff);
|
2021-02-23 18:50:00 -05:00
|
|
|
// Check that OUT and SET settings agree because we don't have a way of picking one over the other.
|
|
|
|
if ((initial_pin_state & set_out_overlap) != (initial_set_pin_state & set_out_overlap)) {
|
|
|
|
mp_raise_ValueError(translate("Initial set pin state conflicts with initial out pin state"));
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
2021-02-23 18:50:00 -05:00
|
|
|
if ((initial_pin_direction & set_out_overlap) != (initial_set_pin_direction & set_out_overlap)) {
|
2021-02-26 18:03:56 -05:00
|
|
|
mp_raise_ValueError(translate("Initial set pin direction conflicts with initial out pin direction"));
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
2021-02-23 18:50:00 -05:00
|
|
|
initial_pin_state |= initial_set_pin_state;
|
|
|
|
initial_pin_direction |= initial_set_pin_direction;
|
|
|
|
|
|
|
|
// Sideset overrides OUT or SET so we always use its values.
|
|
|
|
uint32_t sideset_mask = mask_and_rotate(first_sideset_pin, sideset_pin_count, 0x1f);
|
|
|
|
initial_pin_state = (initial_pin_state & ~sideset_mask) | mask_and_rotate(first_sideset_pin, sideset_pin_count, initial_sideset_pin_state);
|
|
|
|
initial_pin_direction = (initial_pin_direction & ~sideset_mask) | mask_and_rotate(first_sideset_pin, sideset_pin_count, initial_sideset_pin_direction);
|
2021-01-20 19:47:18 -05:00
|
|
|
|
2021-03-04 11:03:31 -05:00
|
|
|
// Deal with pull up/downs
|
|
|
|
uint32_t pull_up = mask_and_rotate(first_in_pin, in_pin_count, pull_pin_up);
|
|
|
|
uint32_t pull_down = mask_and_rotate(first_in_pin, in_pin_count, pull_pin_down);
|
2022-02-01 11:19:17 -05:00
|
|
|
|
|
|
|
if (jmp_pin) {
|
|
|
|
uint32_t jmp_mask = mask_and_rotate(jmp_pin, 1, 0x1f);
|
|
|
|
if (jmp_pull == PULL_UP) {
|
|
|
|
pull_up |= jmp_mask;
|
|
|
|
}
|
|
|
|
if (jmp_pull == PULL_DOWN) {
|
|
|
|
pull_up |= jmp_mask;
|
|
|
|
}
|
|
|
|
}
|
2021-03-04 11:03:31 -05:00
|
|
|
if (initial_pin_direction & (pull_up | pull_down)) {
|
|
|
|
mp_raise_ValueError(translate("pull masks conflict with direction masks"));
|
|
|
|
}
|
2021-08-27 08:18:18 -04:00
|
|
|
bool ok = rp2pio_statemachine_construct(
|
|
|
|
self,
|
2021-01-20 19:47:18 -05:00
|
|
|
program, program_len,
|
|
|
|
frequency,
|
|
|
|
init, init_len,
|
|
|
|
first_out_pin, out_pin_count,
|
|
|
|
first_in_pin, in_pin_count,
|
2021-03-04 11:03:31 -05:00
|
|
|
pull_up, pull_down,
|
2021-01-20 19:47:18 -05:00
|
|
|
first_set_pin, set_pin_count,
|
|
|
|
first_sideset_pin, sideset_pin_count,
|
2021-02-23 18:50:00 -05:00
|
|
|
initial_pin_state, initial_pin_direction,
|
2021-07-22 12:39:04 -04:00
|
|
|
jmp_pin,
|
2021-01-20 19:47:18 -05:00
|
|
|
pins_we_use, tx_fifo, rx_fifo,
|
|
|
|
auto_pull, pull_threshold, out_shift_right,
|
2021-02-23 18:50:00 -05:00
|
|
|
wait_for_txstall,
|
2021-01-20 19:47:18 -05:00
|
|
|
auto_push, push_threshold, in_shift_right,
|
2021-08-27 08:18:18 -04:00
|
|
|
true /* claim pins */,
|
2021-12-22 15:00:19 -05:00
|
|
|
user_interruptible,
|
2022-02-13 17:38:53 -05:00
|
|
|
sideset_enable,
|
|
|
|
wrap_target, wrap);
|
2021-01-20 19:47:18 -05:00
|
|
|
if (!ok) {
|
|
|
|
mp_raise_RuntimeError(translate("All state machines in use"));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-02-23 18:50:00 -05:00
|
|
|
void common_hal_rp2pio_statemachine_restart(rp2pio_statemachine_obj_t *self) {
|
2021-07-13 12:17:03 -04:00
|
|
|
common_hal_rp2pio_statemachine_stop(self);
|
2021-07-12 15:09:11 -04:00
|
|
|
// Reset program counter to the original offset. A JMP is 0x0000 plus
|
|
|
|
// the desired offset, so we can just use self->offset.
|
2021-12-22 15:00:19 -05:00
|
|
|
pio_sm_exec(self->pio, self->state_machine, self->offset);
|
2021-02-23 18:50:00 -05:00
|
|
|
pio_sm_restart(self->pio, self->state_machine);
|
|
|
|
uint8_t pio_index = pio_get_index(self->pio);
|
|
|
|
uint32_t pins_we_use = _current_sm_pins[pio_index][self->state_machine];
|
|
|
|
pio_sm_set_pins_with_mask(self->pio, self->state_machine, self->initial_pin_state, pins_we_use);
|
|
|
|
pio_sm_set_pindirs_with_mask(self->pio, self->state_machine, self->initial_pin_direction, pins_we_use);
|
2021-03-04 11:03:31 -05:00
|
|
|
rp2pio_statemachine_set_pull(self->pull_pin_up, self->pull_pin_down, pins_we_use);
|
2021-02-23 18:50:00 -05:00
|
|
|
common_hal_rp2pio_statemachine_run(self, self->init, self->init_len);
|
|
|
|
pio_sm_set_enabled(self->pio, self->state_machine, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_rp2pio_statemachine_stop(rp2pio_statemachine_obj_t *self) {
|
|
|
|
pio_sm_set_enabled(self->pio, self->state_machine, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_rp2pio_statemachine_run(rp2pio_statemachine_obj_t *self, const uint16_t *instructions, size_t len) {
|
|
|
|
for (size_t i = 0; i < len; i++) {
|
|
|
|
pio_sm_exec(self->pio, self->state_machine, instructions[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
uint32_t common_hal_rp2pio_statemachine_get_frequency(rp2pio_statemachine_obj_t *self) {
|
2021-01-20 19:47:18 -05:00
|
|
|
return self->actual_frequency;
|
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
void common_hal_rp2pio_statemachine_set_frequency(rp2pio_statemachine_obj_t *self, uint32_t frequency) {
|
2021-02-23 18:50:00 -05:00
|
|
|
if (frequency == 0) {
|
|
|
|
frequency = clock_get_hz(clk_sys);
|
|
|
|
}
|
2021-03-15 09:57:36 -04:00
|
|
|
uint64_t frequency256 = ((uint64_t)clock_get_hz(clk_sys)) * 256;
|
2021-02-23 18:50:00 -05:00
|
|
|
uint64_t div256 = frequency256 / frequency;
|
|
|
|
if (frequency256 % div256 > 0) {
|
|
|
|
div256 += 1;
|
|
|
|
}
|
2021-02-23 19:25:02 -05:00
|
|
|
// 0 is interpreted as 0x10000 so it's valid.
|
|
|
|
if (div256 / 256 > 0x10000 || frequency > clock_get_hz(clk_sys)) {
|
|
|
|
mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_frequency);
|
|
|
|
}
|
2021-02-23 18:50:00 -05:00
|
|
|
self->actual_frequency = frequency256 / div256;
|
|
|
|
|
|
|
|
pio_sm_set_clkdiv_int_frac(self->pio, self->state_machine, div256 / 256, div256 % 256);
|
|
|
|
// Reset the clkdiv counter in case our new TOP is lower.
|
|
|
|
pio_sm_clkdiv_restart(self->pio, self->state_machine);
|
|
|
|
}
|
|
|
|
|
2021-01-20 19:47:18 -05:00
|
|
|
void rp2pio_statemachine_deinit(rp2pio_statemachine_obj_t *self, bool leave_pins) {
|
2021-08-27 10:07:14 -04:00
|
|
|
common_hal_rp2pio_statemachine_stop(self);
|
2022-04-23 14:09:36 -04:00
|
|
|
(void)common_hal_rp2pio_statemachine_stop_background_write(self);
|
2021-08-27 10:07:14 -04:00
|
|
|
|
2021-01-20 19:47:18 -05:00
|
|
|
uint8_t sm = self->state_machine;
|
|
|
|
uint8_t pio_index = pio_get_index(self->pio);
|
2021-03-05 10:00:03 -05:00
|
|
|
common_hal_mcu_disable_interrupts();
|
|
|
|
_interrupt_arg[pio_index][sm] = NULL;
|
|
|
|
_interrupt_handler[pio_index][sm] = NULL;
|
|
|
|
common_hal_mcu_enable_interrupts();
|
2021-01-20 19:47:18 -05:00
|
|
|
_never_reset[pio_index][sm] = false;
|
|
|
|
_reset_statemachine(self->pio, sm, leave_pins);
|
|
|
|
self->state_machine = NUM_PIO_STATE_MACHINES;
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_rp2pio_statemachine_deinit(rp2pio_statemachine_obj_t *self) {
|
|
|
|
rp2pio_statemachine_deinit(self, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_rp2pio_statemachine_never_reset(rp2pio_statemachine_obj_t *self) {
|
|
|
|
uint8_t sm = self->state_machine;
|
|
|
|
uint8_t pio_index = pio_get_index(self->pio);
|
|
|
|
_never_reset[pio_index][sm] = true;
|
|
|
|
// TODO: never reset all the pins
|
|
|
|
}
|
|
|
|
|
|
|
|
bool common_hal_rp2pio_statemachine_deinited(rp2pio_statemachine_obj_t *self) {
|
|
|
|
return self->state_machine == NUM_PIO_STATE_MACHINES;
|
|
|
|
}
|
|
|
|
|
2021-11-10 09:42:21 -05:00
|
|
|
STATIC enum dma_channel_transfer_size _stride_to_dma_size(uint8_t stride) {
|
2021-02-23 18:50:00 -05:00
|
|
|
switch (stride) {
|
|
|
|
case 4:
|
|
|
|
return DMA_SIZE_32;
|
|
|
|
case 2:
|
|
|
|
return DMA_SIZE_16;
|
|
|
|
case 1:
|
|
|
|
default:
|
|
|
|
return DMA_SIZE_8;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-01-20 19:47:18 -05:00
|
|
|
static bool _transfer(rp2pio_statemachine_obj_t *self,
|
2021-02-23 18:50:00 -05:00
|
|
|
const uint8_t *data_out, size_t out_len, uint8_t out_stride_in_bytes,
|
2022-05-06 16:18:59 -04:00
|
|
|
uint8_t *data_in, size_t in_len, uint8_t in_stride_in_bytes, bool swap_out, bool swap_in) {
|
2021-01-20 19:47:18 -05:00
|
|
|
// This implementation is based on SPI but varies because the tx and rx buffers
|
|
|
|
// may be different lengths and occur at different times or speeds.
|
|
|
|
|
|
|
|
// Use DMA for large transfers if channels are available
|
|
|
|
const size_t dma_min_size_threshold = 32;
|
|
|
|
int chan_tx = -1;
|
|
|
|
int chan_rx = -1;
|
|
|
|
size_t len = MAX(out_len, in_len);
|
|
|
|
bool tx = data_out != NULL;
|
|
|
|
bool rx = data_in != NULL;
|
2022-05-06 16:18:59 -04:00
|
|
|
bool use_dma = len >= dma_min_size_threshold || swap_out || swap_in;
|
|
|
|
if (use_dma) {
|
2021-01-20 19:47:18 -05:00
|
|
|
// Use DMA channels to service the two FIFOs
|
|
|
|
if (tx) {
|
|
|
|
chan_tx = dma_claim_unused_channel(false);
|
2022-05-06 16:18:59 -04:00
|
|
|
// DMA allocation failed...
|
|
|
|
if (chan_tx < 0) {
|
|
|
|
return false;
|
|
|
|
}
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
if (rx) {
|
|
|
|
chan_rx = dma_claim_unused_channel(false);
|
2022-05-06 16:18:59 -04:00
|
|
|
// DMA allocation failed...
|
|
|
|
if (chan_rx < 0) {
|
|
|
|
// may need to free tx channel
|
|
|
|
if (chan_tx >= 0) {
|
|
|
|
dma_channel_unclaim(chan_tx);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
}
|
2021-03-15 09:57:36 -04:00
|
|
|
volatile uint8_t *tx_destination = NULL;
|
|
|
|
const volatile uint8_t *rx_source = NULL;
|
2021-01-20 19:47:18 -05:00
|
|
|
if (tx) {
|
2021-03-15 09:57:36 -04:00
|
|
|
tx_destination = (volatile uint8_t *)&self->pio->txf[self->state_machine];
|
2021-01-20 19:47:18 -05:00
|
|
|
if (!self->out_shift_right) {
|
2021-02-23 18:50:00 -05:00
|
|
|
tx_destination += 4 - out_stride_in_bytes;
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (rx) {
|
2021-03-15 09:57:36 -04:00
|
|
|
rx_source = (const volatile uint8_t *)&self->pio->rxf[self->state_machine];
|
2021-02-23 18:50:00 -05:00
|
|
|
if (self->in_shift_right) {
|
|
|
|
rx_source += 4 - in_stride_in_bytes;
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
}
|
2021-02-23 18:50:00 -05:00
|
|
|
uint32_t stall_mask = 1 << (PIO_FDEBUG_TXSTALL_LSB + self->state_machine);
|
2021-01-20 19:47:18 -05:00
|
|
|
if (use_dma) {
|
|
|
|
dma_channel_config c;
|
|
|
|
uint32_t channel_mask = 0;
|
|
|
|
if (tx) {
|
|
|
|
c = dma_channel_get_default_config(chan_tx);
|
2021-02-23 18:50:00 -05:00
|
|
|
channel_config_set_transfer_data_size(&c, _stride_to_dma_size(out_stride_in_bytes));
|
2021-01-20 19:47:18 -05:00
|
|
|
channel_config_set_dreq(&c, self->tx_dreq);
|
|
|
|
channel_config_set_read_increment(&c, true);
|
|
|
|
channel_config_set_write_increment(&c, false);
|
2022-05-06 16:18:59 -04:00
|
|
|
channel_config_set_bswap(&c, swap_out);
|
2021-01-20 19:47:18 -05:00
|
|
|
dma_channel_configure(chan_tx, &c,
|
|
|
|
tx_destination,
|
|
|
|
data_out,
|
2021-02-23 18:50:00 -05:00
|
|
|
out_len / out_stride_in_bytes,
|
2021-01-20 19:47:18 -05:00
|
|
|
false);
|
|
|
|
channel_mask |= 1u << chan_tx;
|
|
|
|
}
|
|
|
|
if (rx) {
|
|
|
|
c = dma_channel_get_default_config(chan_rx);
|
2021-02-23 18:50:00 -05:00
|
|
|
channel_config_set_transfer_data_size(&c, _stride_to_dma_size(in_stride_in_bytes));
|
2021-01-20 19:47:18 -05:00
|
|
|
channel_config_set_dreq(&c, self->rx_dreq);
|
|
|
|
channel_config_set_read_increment(&c, false);
|
|
|
|
channel_config_set_write_increment(&c, true);
|
2022-05-06 16:18:59 -04:00
|
|
|
channel_config_set_bswap(&c, swap_in);
|
2021-01-20 19:47:18 -05:00
|
|
|
dma_channel_configure(chan_rx, &c,
|
|
|
|
data_in,
|
|
|
|
rx_source,
|
2021-02-23 18:50:00 -05:00
|
|
|
in_len / in_stride_in_bytes,
|
2021-01-20 19:47:18 -05:00
|
|
|
false);
|
|
|
|
channel_mask |= 1u << chan_rx;
|
|
|
|
}
|
|
|
|
|
|
|
|
dma_start_channel_mask(channel_mask);
|
|
|
|
while ((rx && dma_channel_is_busy(chan_rx)) ||
|
|
|
|
(tx && dma_channel_is_busy(chan_tx))) {
|
|
|
|
// TODO: We should idle here until we get a DMA interrupt or something else.
|
|
|
|
RUN_BACKGROUND_TASKS;
|
2021-08-27 08:18:18 -04:00
|
|
|
if (self->user_interruptible && mp_hal_is_interrupted()) {
|
|
|
|
if (rx && dma_channel_is_busy(chan_rx)) {
|
|
|
|
dma_channel_abort(chan_rx);
|
|
|
|
}
|
|
|
|
if (tx && dma_channel_is_busy(chan_tx)) {
|
|
|
|
dma_channel_abort(chan_tx);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
// Clear the stall bit so we can detect when the state machine is done transmitting.
|
2021-02-23 18:50:00 -05:00
|
|
|
self->pio->fdebug = stall_mask;
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
// If we have claimed only one channel successfully, we should release immediately. This also
|
|
|
|
// releases the DMA after use_dma has been done.
|
|
|
|
if (chan_rx >= 0) {
|
|
|
|
dma_channel_unclaim(chan_rx);
|
|
|
|
}
|
|
|
|
if (chan_tx >= 0) {
|
|
|
|
dma_channel_unclaim(chan_tx);
|
|
|
|
}
|
|
|
|
|
2021-08-27 08:18:18 -04:00
|
|
|
if (!use_dma && !(self->user_interruptible && mp_hal_is_interrupted())) {
|
2021-01-20 19:47:18 -05:00
|
|
|
// Use software for small transfers, or if couldn't claim two DMA channels
|
2021-02-23 18:50:00 -05:00
|
|
|
size_t rx_remaining = in_len / in_stride_in_bytes;
|
|
|
|
size_t tx_remaining = out_len / out_stride_in_bytes;
|
2021-01-20 19:47:18 -05:00
|
|
|
|
|
|
|
while (rx_remaining || tx_remaining) {
|
2021-02-23 18:50:00 -05:00
|
|
|
while (tx_remaining && !pio_sm_is_tx_fifo_full(self->pio, self->state_machine)) {
|
|
|
|
if (out_stride_in_bytes == 1) {
|
2021-02-08 09:35:07 -05:00
|
|
|
*tx_destination = *data_out;
|
2021-02-25 16:50:49 -05:00
|
|
|
} else if (out_stride_in_bytes == 2) {
|
2021-03-15 09:57:36 -04:00
|
|
|
*((uint16_t *)tx_destination) = *((uint16_t *)data_out);
|
2021-02-25 16:50:49 -05:00
|
|
|
} else if (out_stride_in_bytes == 4) {
|
2021-03-15 09:57:36 -04:00
|
|
|
*((uint32_t *)tx_destination) = *((uint32_t *)data_out);
|
2021-02-08 09:35:07 -05:00
|
|
|
}
|
2021-02-23 18:50:00 -05:00
|
|
|
data_out += out_stride_in_bytes;
|
|
|
|
--tx_remaining;
|
|
|
|
}
|
|
|
|
while (rx_remaining && !pio_sm_is_rx_fifo_empty(self->pio, self->state_machine)) {
|
|
|
|
if (in_stride_in_bytes == 1) {
|
2021-03-15 09:57:36 -04:00
|
|
|
*data_in = (uint8_t)*rx_source;
|
2021-02-23 18:50:00 -05:00
|
|
|
} else if (in_stride_in_bytes == 2) {
|
2021-03-15 09:57:36 -04:00
|
|
|
*((uint16_t *)data_in) = *((uint16_t *)rx_source);
|
2021-02-23 18:50:00 -05:00
|
|
|
} else if (in_stride_in_bytes == 4) {
|
2021-03-15 09:57:36 -04:00
|
|
|
*((uint32_t *)data_in) = *((uint32_t *)rx_source);
|
2021-02-08 09:35:07 -05:00
|
|
|
}
|
2021-02-23 18:50:00 -05:00
|
|
|
data_in += in_stride_in_bytes;
|
|
|
|
--rx_remaining;
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
RUN_BACKGROUND_TASKS;
|
2021-08-27 08:18:18 -04:00
|
|
|
if (self->user_interruptible && mp_hal_is_interrupted()) {
|
|
|
|
break;
|
|
|
|
}
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
// Clear the stall bit so we can detect when the state machine is done transmitting.
|
2021-02-23 18:50:00 -05:00
|
|
|
self->pio->fdebug = stall_mask;
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
// Wait for the state machine to finish transmitting the data we've queued
|
|
|
|
// up.
|
|
|
|
if (tx) {
|
|
|
|
while (!pio_sm_is_tx_fifo_empty(self->pio, self->state_machine) ||
|
2021-02-23 18:50:00 -05:00
|
|
|
(self->wait_for_txstall && (self->pio->fdebug & stall_mask) == 0)) {
|
2021-01-20 19:47:18 -05:00
|
|
|
RUN_BACKGROUND_TASKS;
|
2021-08-27 08:18:18 -04:00
|
|
|
if (self->user_interruptible && mp_hal_is_interrupted()) {
|
|
|
|
break;
|
|
|
|
}
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-02-23 18:50:00 -05:00
|
|
|
// TODO: Provide a way around these checks in case someone wants to use the FIFO
|
|
|
|
// with manually run code.
|
|
|
|
|
2022-05-06 16:18:59 -04:00
|
|
|
bool common_hal_rp2pio_statemachine_write(rp2pio_statemachine_obj_t *self, const uint8_t *data, size_t len, uint8_t stride_in_bytes, bool swap) {
|
2021-01-20 19:47:18 -05:00
|
|
|
if (!self->out) {
|
|
|
|
mp_raise_RuntimeError(translate("No out in program"));
|
|
|
|
}
|
2022-05-06 16:18:59 -04:00
|
|
|
return _transfer(self, data, len, stride_in_bytes, NULL, 0, 0, swap, false);
|
2021-02-23 18:50:00 -05:00
|
|
|
}
|
|
|
|
|
2022-05-06 16:18:59 -04:00
|
|
|
bool common_hal_rp2pio_statemachine_readinto(rp2pio_statemachine_obj_t *self, uint8_t *data, size_t len, uint8_t stride_in_bytes, bool swap) {
|
2021-02-23 18:50:00 -05:00
|
|
|
if (!self->in) {
|
|
|
|
mp_raise_RuntimeError(translate("No in in program"));
|
|
|
|
}
|
2022-05-06 16:18:59 -04:00
|
|
|
return _transfer(self, NULL, 0, 0, data, len, stride_in_bytes, false, swap);
|
2021-02-23 18:50:00 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
bool common_hal_rp2pio_statemachine_write_readinto(rp2pio_statemachine_obj_t *self,
|
2021-03-15 09:57:36 -04:00
|
|
|
const uint8_t *data_out, size_t out_len, uint8_t out_stride_in_bytes,
|
2022-05-06 16:18:59 -04:00
|
|
|
uint8_t *data_in, size_t in_len, uint8_t in_stride_in_bytes, bool swap_out, bool swap_in) {
|
2021-02-23 18:50:00 -05:00
|
|
|
if (!self->in || !self->out) {
|
|
|
|
mp_raise_RuntimeError(translate("No in or out in program"));
|
|
|
|
}
|
2022-05-06 16:18:59 -04:00
|
|
|
return _transfer(self, data_out, out_len, out_stride_in_bytes, data_in, in_len, in_stride_in_bytes, swap_out, swap_in);
|
2021-02-23 18:50:00 -05:00
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
bool common_hal_rp2pio_statemachine_get_rxstall(rp2pio_statemachine_obj_t *self) {
|
2021-02-23 18:50:00 -05:00
|
|
|
uint32_t stall_mask = 1 << (PIO_FDEBUG_RXSTALL_LSB + self->state_machine);
|
|
|
|
return (self->pio->fdebug & stall_mask) != 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_rp2pio_statemachine_clear_rxfifo(rp2pio_statemachine_obj_t *self) {
|
|
|
|
uint8_t level = pio_sm_get_rx_fifo_level(self->pio, self->state_machine);
|
|
|
|
uint32_t stall_mask = 1 << (PIO_FDEBUG_RXSTALL_LSB + self->state_machine);
|
|
|
|
for (size_t i = 0; i < level; i++) {
|
2021-03-15 09:57:36 -04:00
|
|
|
(void)self->pio->rxf[self->state_machine];
|
2021-02-23 18:50:00 -05:00
|
|
|
}
|
|
|
|
self->pio->fdebug = stall_mask;
|
2021-01-20 19:47:18 -05:00
|
|
|
}
|
2021-03-04 10:29:01 -05:00
|
|
|
|
2022-05-06 15:42:24 -04:00
|
|
|
bool common_hal_rp2pio_statemachine_get_txstall(rp2pio_statemachine_obj_t *self) {
|
|
|
|
uint32_t stall_mask = 1 << (PIO_FDEBUG_TXSTALL_LSB + self->state_machine);
|
|
|
|
return (self->pio->fdebug & stall_mask) != 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_rp2pio_statemachine_clear_txstall(rp2pio_statemachine_obj_t *self) {
|
2022-09-30 09:20:33 -04:00
|
|
|
(void)pio_sm_get_rx_fifo_level(self->pio, self->state_machine);
|
2022-05-06 15:42:24 -04:00
|
|
|
uint32_t stall_mask = 1 << (PIO_FDEBUG_TXSTALL_LSB + self->state_machine);
|
|
|
|
self->pio->fdebug = stall_mask;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2021-03-04 10:29:01 -05:00
|
|
|
size_t common_hal_rp2pio_statemachine_get_in_waiting(rp2pio_statemachine_obj_t *self) {
|
|
|
|
uint8_t level = pio_sm_get_rx_fifo_level(self->pio, self->state_machine);
|
|
|
|
return level;
|
|
|
|
}
|
2021-03-05 10:00:03 -05:00
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
void common_hal_rp2pio_statemachine_set_interrupt_handler(rp2pio_statemachine_obj_t *self, void (*handler)(void *), void *arg, int mask) {
|
2021-03-05 10:00:03 -05:00
|
|
|
uint8_t pio_index = pio_get_index(self->pio);
|
|
|
|
uint8_t sm = self->state_machine;
|
|
|
|
|
|
|
|
common_hal_mcu_disable_interrupts();
|
|
|
|
uint32_t inte = self->pio->inte0;
|
|
|
|
inte &= ~((PIO_IRQ0_INTF_SM0_RXNEMPTY_BITS | PIO_IRQ0_INTF_SM0_TXNFULL_BITS | PIO_IRQ0_INTF_SM0_BITS) << sm);
|
|
|
|
inte |= (mask << sm);
|
|
|
|
self->pio->inte0 = inte;
|
|
|
|
_interrupt_arg[pio_index][sm] = arg;
|
|
|
|
_interrupt_handler[pio_index][sm] = handler;
|
|
|
|
irq_set_exclusive_handler(PIO0_IRQ_0 + 2 * pio_index, rp2pio_statemachine_interrupt_handler);
|
|
|
|
irq_set_enabled(PIO0_IRQ_0 + 2 * pio_index, true);
|
|
|
|
common_hal_mcu_enable_interrupts();
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC void rp2pio_statemachine_interrupt_handler(void) {
|
|
|
|
for (size_t pio_index = 0; pio_index < NUM_PIOS; pio_index++) {
|
|
|
|
PIO pio = pio_instances[pio_index];
|
|
|
|
for (size_t sm = 0; sm < NUM_PIO_STATE_MACHINES; sm++) {
|
|
|
|
if (!_interrupt_handler[pio_index][sm]) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
uint32_t intf = (PIO_IRQ0_INTF_SM0_RXNEMPTY_BITS | PIO_IRQ0_INTF_SM0_TXNFULL_BITS | PIO_IRQ0_INTF_SM0_BITS) << sm;
|
|
|
|
if (pio->ints0 & intf) {
|
|
|
|
_interrupt_handler[pio_index][sm](_interrupt_arg[pio_index][sm]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2021-04-22 12:47:05 -04:00
|
|
|
|
|
|
|
uint8_t rp2pio_statemachine_program_offset(rp2pio_statemachine_obj_t *self) {
|
|
|
|
uint8_t pio_index = pio_get_index(self->pio);
|
|
|
|
uint8_t sm = self->state_machine;
|
|
|
|
return _current_program_offset[pio_index][sm];
|
|
|
|
}
|
2022-04-19 12:35:43 -04:00
|
|
|
|
2022-05-06 16:18:59 -04:00
|
|
|
bool common_hal_rp2pio_statemachine_background_write(rp2pio_statemachine_obj_t *self, const sm_buf_info *once, const sm_buf_info *loop, uint8_t stride_in_bytes, bool swap) {
|
2022-04-19 17:33:51 -04:00
|
|
|
uint8_t pio_index = pio_get_index(self->pio);
|
|
|
|
uint8_t sm = self->state_machine;
|
|
|
|
|
2022-05-06 15:22:07 -04:00
|
|
|
int pending_buffers = (once->info.len != 0) + (loop->info.len != 0);
|
|
|
|
if (!once->info.len) {
|
2022-04-23 14:09:36 -04:00
|
|
|
once = loop;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (SM_DMA_ALLOCATED(pio_index, sm)) {
|
|
|
|
if (stride_in_bytes != self->background_stride_in_bytes) {
|
|
|
|
mp_raise_ValueError(translate("Mismatched data size"));
|
|
|
|
}
|
2022-05-06 16:18:59 -04:00
|
|
|
if (swap != self->byteswap) {
|
|
|
|
mp_raise_ValueError(translate("Mismatched swap flag"));
|
|
|
|
}
|
2022-04-23 14:09:36 -04:00
|
|
|
|
|
|
|
while (self->pending_buffers) {
|
2022-04-19 16:14:50 -04:00
|
|
|
RUN_BACKGROUND_TASKS;
|
|
|
|
if (self->user_interruptible && mp_hal_is_interrupted()) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
common_hal_mcu_disable_interrupts();
|
2022-04-23 14:09:36 -04:00
|
|
|
self->once = *once;
|
|
|
|
self->loop = *loop;
|
|
|
|
self->pending_buffers = pending_buffers;
|
|
|
|
|
2022-05-06 15:21:09 -04:00
|
|
|
if (self->dma_completed && self->once.info.len) {
|
2022-04-23 14:09:36 -04:00
|
|
|
rp2pio_statemachine_dma_complete(self, SM_DMA_GET_CHANNEL(pio_index, sm));
|
|
|
|
self->dma_completed = false;
|
|
|
|
}
|
|
|
|
|
2022-04-19 16:14:50 -04:00
|
|
|
common_hal_mcu_enable_interrupts();
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2022-04-19 17:33:51 -04:00
|
|
|
int channel = dma_claim_unused_channel(false);
|
|
|
|
if (channel == -1) {
|
|
|
|
return false;
|
2022-04-19 16:14:50 -04:00
|
|
|
}
|
2022-04-19 17:33:51 -04:00
|
|
|
|
|
|
|
SM_DMA_SET_CHANNEL(pio_index, sm, channel);
|
2022-04-19 16:14:50 -04:00
|
|
|
|
|
|
|
volatile uint8_t *tx_destination = (volatile uint8_t *)&self->pio->txf[self->state_machine];
|
|
|
|
|
|
|
|
self->tx_dreq = pio_get_dreq(self->pio, self->state_machine, true);
|
|
|
|
|
|
|
|
dma_channel_config c;
|
|
|
|
|
2022-04-23 14:09:36 -04:00
|
|
|
self->current = *once;
|
|
|
|
self->once = *loop;
|
|
|
|
self->loop = *loop;
|
|
|
|
self->pending_buffers = pending_buffers;
|
|
|
|
self->dma_completed = false;
|
|
|
|
self->background_stride_in_bytes = stride_in_bytes;
|
2022-05-06 16:18:59 -04:00
|
|
|
self->byteswap = swap;
|
2022-04-19 16:14:50 -04:00
|
|
|
|
2022-04-19 17:33:51 -04:00
|
|
|
c = dma_channel_get_default_config(channel);
|
2022-04-19 16:14:50 -04:00
|
|
|
channel_config_set_transfer_data_size(&c, _stride_to_dma_size(stride_in_bytes));
|
|
|
|
channel_config_set_dreq(&c, self->tx_dreq);
|
|
|
|
channel_config_set_read_increment(&c, true);
|
|
|
|
channel_config_set_write_increment(&c, false);
|
2022-05-06 16:18:59 -04:00
|
|
|
channel_config_set_bswap(&c, swap);
|
2022-04-19 17:33:51 -04:00
|
|
|
dma_channel_configure(channel, &c,
|
2022-04-19 16:14:50 -04:00
|
|
|
tx_destination,
|
2022-04-23 14:09:36 -04:00
|
|
|
once->info.buf,
|
|
|
|
once->info.len / stride_in_bytes,
|
2022-04-19 16:14:50 -04:00
|
|
|
false);
|
|
|
|
|
2022-04-19 17:33:51 -04:00
|
|
|
common_hal_mcu_disable_interrupts();
|
2022-04-23 14:09:36 -04:00
|
|
|
MP_STATE_PORT(background_pio)[channel] = self;
|
2022-04-19 17:33:51 -04:00
|
|
|
dma_hw->inte0 |= 1u << channel;
|
2022-04-19 16:14:50 -04:00
|
|
|
irq_set_mask_enabled(1 << DMA_IRQ_0, true);
|
2022-04-19 17:33:51 -04:00
|
|
|
dma_start_channel_mask(1u << channel);
|
|
|
|
common_hal_mcu_enable_interrupts();
|
2022-04-19 16:14:50 -04:00
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
void rp2pio_statemachine_dma_complete(rp2pio_statemachine_obj_t *self, int channel) {
|
2022-04-23 14:09:36 -04:00
|
|
|
self->current = self->once;
|
|
|
|
self->once = self->loop;
|
2022-04-19 16:14:50 -04:00
|
|
|
|
2022-04-23 14:09:36 -04:00
|
|
|
if (self->current.info.buf) {
|
|
|
|
if (self->pending_buffers > 0) {
|
|
|
|
self->pending_buffers--;
|
|
|
|
}
|
|
|
|
dma_channel_set_read_addr(channel, self->current.info.buf, false);
|
|
|
|
dma_channel_set_trans_count(channel, self->current.info.len / self->background_stride_in_bytes, true);
|
|
|
|
} else {
|
|
|
|
self->dma_completed = true;
|
|
|
|
self->pending_buffers = 0; // should be a no-op
|
|
|
|
}
|
2022-04-19 12:35:43 -04:00
|
|
|
}
|
|
|
|
|
2022-04-23 14:09:36 -04:00
|
|
|
bool common_hal_rp2pio_statemachine_stop_background_write(rp2pio_statemachine_obj_t *self) {
|
2022-04-19 17:33:51 -04:00
|
|
|
uint8_t pio_index = pio_get_index(self->pio);
|
|
|
|
uint8_t sm = self->state_machine;
|
|
|
|
rp2pio_statemachine_clear_dma(pio_index, sm);
|
2022-04-23 14:09:36 -04:00
|
|
|
memset(&self->current, 0, sizeof(self->current));
|
|
|
|
memset(&self->once, 0, sizeof(self->once));
|
|
|
|
memset(&self->loop, 0, sizeof(self->loop));
|
|
|
|
self->pending_buffers = 0;
|
2022-04-19 16:14:50 -04:00
|
|
|
return true;
|
2022-04-19 12:35:43 -04:00
|
|
|
}
|
2022-04-23 14:09:36 -04:00
|
|
|
|
|
|
|
bool common_hal_rp2pio_statemachine_get_writing(rp2pio_statemachine_obj_t *self) {
|
|
|
|
return !self->dma_completed;
|
|
|
|
}
|
|
|
|
|
|
|
|
int common_hal_rp2pio_statemachine_get_pending(rp2pio_statemachine_obj_t *self) {
|
|
|
|
return self->pending_buffers;
|
|
|
|
}
|