circuitpython/ports/cxd56/supervisor/port.c

175 lines
4.1 KiB
C
Raw Normal View History

2019-10-09 02:27:08 -04:00
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright 2019 Sony Semiconductor Solutions Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <stdint.h>
2019-10-09 02:27:08 -04:00
#include <sys/boardctl.h>
#include <sys/time.h>
2019-10-09 02:27:08 -04:00
2020-06-01 05:35:46 -04:00
#include <cxd56_rtc.h>
#include "sched/sched.h"
#include "supervisor/board.h"
2019-10-11 02:54:36 -04:00
2019-10-09 02:27:08 -04:00
#include "supervisor/port.h"
#include "supervisor/background_callback.h"
#include "supervisor/usb.h"
#include "supervisor/shared/tick.h"
2019-10-09 02:27:08 -04:00
#include "common-hal/microcontroller/Pin.h"
#include "common-hal/analogio/AnalogIn.h"
#include "common-hal/pulseio/PulseOut.h"
#include "common-hal/pwmio/PWMOut.h"
2019-10-21 07:17:51 -04:00
#include "common-hal/busio/UART.h"
2019-10-09 02:27:08 -04:00
2020-09-14 06:55:53 -04:00
#define SPRESENSE_MEM_ALIGN (32)
uint32_t* heap;
uint32_t heap_size;
2019-10-09 02:27:08 -04:00
safe_mode_t port_init(void) {
boardctl(BOARDIOC_INIT, 0);
2019-10-11 02:54:36 -04:00
2020-06-01 05:35:46 -04:00
// Wait until RTC is available
while (g_rtc_enabled == false);
2019-10-11 02:54:36 -04:00
2020-09-14 06:55:53 -04:00
heap = memalign(SPRESENSE_MEM_ALIGN, 128 * 1024);
uint32_t size = CONFIG_RAM_START + CONFIG_RAM_SIZE - (uint32_t)heap - 2 * SPRESENSE_MEM_ALIGN;
heap = realloc(heap, size);
heap_size = size / sizeof(uint32_t);
2019-10-11 02:54:36 -04:00
if (board_requests_safe_mode()) {
return USER_SAFE_MODE;
}
2019-10-09 02:27:08 -04:00
return NO_SAFE_MODE;
}
void reset_cpu(void) {
boardctl(BOARDIOC_RESET, 0);
Add some NORETURN attributes I have a function where it should be impossible to reach the end, so I put in a safe-mode reset at the bottom: ``` int find_unused_slot(void) { // precondition: you already verified that a slot was available for (int i=0; i<NUM_SLOTS; i++) { if( slot_free(i)) { return i; } } safe_mode_reset(MICROPY_FATAL_ERROR); } ``` However, the compiler still gave a diagnostic, because safe_mode_reset was not declared NORETURN. So I started by teaching the compiler that reset_into_safe_mode never returned. This leads at least one level deeper due to reset_cpu needing to be a NORETURN function. Each port is a little different in this area. I also marked reset_to_bootloader as NORETURN. Additional notes: * stm32's reset_to_bootloader was not implemented, but now does a bare reset. Most stm32s are not fitted with uf2 bootloaders anyway. * ditto cxd56 * esp32s2 did not implement reset_cpu at all. I used esp_restart(). (not tested) * litex did not implement reset_cpu at all. I used reboot_ctrl_write. But notably this is what reset_to_bootloader already did, so one or the other must be incorrect (not tested). reboot_ctrl_write cannot be declared NORETURN, as it returns unless the special value 0xac is written), so a new unreachable forever-loop is added. * cxd56's reset is via a boardctl() call which can't generically be declared NORETURN, so a new unreacahble "for(;;)" forever-loop is added. * In several places, NVIC_SystemReset is redeclared with NORETURN applied. This is accepted just fine by gcc. I chose this as preferable to editing the multiple copies of CMSIS headers where it is normally declared. * the stub safe_mode reset simply aborts. This is used in mpy-cross.
2020-09-24 12:20:32 -04:00
for (;;) {
}
2019-10-09 02:27:08 -04:00
}
void reset_port(void) {
#if CIRCUITPY_ANALOGIO
analogin_reset();
#endif
#if CIRCUITPY_PULSEIO
pulseout_reset();
#endif
#if CIRCUITPY_PWMIO
2019-10-09 02:27:08 -04:00
pwmout_reset();
#endif
2019-10-21 07:17:51 -04:00
#if CIRCUITPY_BUSIO
busio_uart_reset();
#endif
2019-10-09 02:27:08 -04:00
reset_all_pins();
}
void reset_to_bootloader(void) {
Add some NORETURN attributes I have a function where it should be impossible to reach the end, so I put in a safe-mode reset at the bottom: ``` int find_unused_slot(void) { // precondition: you already verified that a slot was available for (int i=0; i<NUM_SLOTS; i++) { if( slot_free(i)) { return i; } } safe_mode_reset(MICROPY_FATAL_ERROR); } ``` However, the compiler still gave a diagnostic, because safe_mode_reset was not declared NORETURN. So I started by teaching the compiler that reset_into_safe_mode never returned. This leads at least one level deeper due to reset_cpu needing to be a NORETURN function. Each port is a little different in this area. I also marked reset_to_bootloader as NORETURN. Additional notes: * stm32's reset_to_bootloader was not implemented, but now does a bare reset. Most stm32s are not fitted with uf2 bootloaders anyway. * ditto cxd56 * esp32s2 did not implement reset_cpu at all. I used esp_restart(). (not tested) * litex did not implement reset_cpu at all. I used reboot_ctrl_write. But notably this is what reset_to_bootloader already did, so one or the other must be incorrect (not tested). reboot_ctrl_write cannot be declared NORETURN, as it returns unless the special value 0xac is written), so a new unreachable forever-loop is added. * cxd56's reset is via a boardctl() call which can't generically be declared NORETURN, so a new unreacahble "for(;;)" forever-loop is added. * In several places, NVIC_SystemReset is redeclared with NORETURN applied. This is accepted just fine by gcc. I chose this as preferable to editing the multiple copies of CMSIS headers where it is normally declared. * the stub safe_mode reset simply aborts. This is used in mpy-cross.
2020-09-24 12:20:32 -04:00
boardctl(BOARDIOC_RESET, 0);
for (;;) {
}
2019-10-09 02:27:08 -04:00
}
bool port_has_fixed_stack(void) {
return true;
}
uint32_t *port_stack_get_limit(void) {
struct tcb_s *rtcb = this_task();
return rtcb->adj_stack_ptr - (uint32_t)rtcb->adj_stack_size;
}
uint32_t *port_stack_get_top(void) {
struct tcb_s *rtcb = this_task();
return rtcb->adj_stack_ptr;
}
uint32_t *port_heap_get_bottom(void) {
return heap;
}
uint32_t *port_heap_get_top(void) {
return heap + heap_size;
}
2019-10-09 02:27:08 -04:00
extern uint32_t _ebss;
// Place the word to save just after our BSS section that gets blanked.
void port_set_saved_word(uint32_t value) {
_ebss = value;
}
uint32_t port_get_saved_word(void) {
return _ebss;
}
static background_callback_t callback;
static void usb_background_do(void* unused) {
usb_background();
}
volatile bool _tick_enabled;
void board_timerhook(void)
{
// Do things common to all ports when the tick occurs
if (_tick_enabled) {
supervisor_tick();
}
background_callback_add(&callback, usb_background_do, NULL);
}
uint64_t port_get_raw_ticks(uint8_t* subticks) {
2020-06-01 05:35:46 -04:00
uint64_t count = cxd56_rtc_count();
*subticks = count % 32;
2020-06-01 05:35:46 -04:00
return count / 32;
}
// Enable 1/1024 second tick.
void port_enable_tick(void) {
_tick_enabled = true;
}
// Disable 1/1024 second tick.
void port_disable_tick(void) {
_tick_enabled = false;
}
void port_interrupt_after_ticks(uint32_t ticks) {
}
void port_idle_until_interrupt(void) {
// TODO: Implement sleep.
}