2021-05-20 04:15:36 -04:00
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/*
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* This is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016-2021 Damien P. George
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2022-06-05 08:08:44 -04:00
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* Copyright (c) 2022 Robert Hammelrath (pin.irq)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* Uses pins.h & pins.c to create board (MCU package) specific 'machine_pin_obj' array.
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*/
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2022-06-04 14:56:18 -04:00
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#include "string.h"
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "shared/runtime/mpirq.h"
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#include "extmod/virtpin.h"
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#include "modmachine.h"
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#include "samd_soc.h"
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#include "pins.h"
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#include "pin_af.h"
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#include "hal_gpio.h"
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#define GPIO_MODE_IN (0)
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#define GPIO_MODE_OUT (1)
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#define GPIO_MODE_OPEN_DRAIN (2)
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#define GPIO_STRENGTH_2MA (0)
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#define GPIO_STRENGTH_8MA (1)
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#define GPIO_IRQ_EDGE_RISE (1)
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#define GPIO_IRQ_EDGE_FALL (2)
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typedef struct _machine_pin_irq_obj_t {
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mp_irq_obj_t base;
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uint32_t flags;
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uint32_t trigger;
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uint8_t pin_id;
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} machine_pin_irq_obj_t;
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STATIC const mp_irq_methods_t machine_pin_irq_methods;
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uint32_t machine_pin_open_drain_mask[4];
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// Open drain behaviour is simulated.
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#define GPIO_IS_OPEN_DRAIN(id) (machine_pin_open_drain_mask[id / 32] & (1 << (id % 32)))
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STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_pin_obj_t *self = self_in;
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mp_printf(print, "GPIO P%c%02u", "ABCD"[self->id / 32], self->id % 32);
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}
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STATIC void pin_validate_drive(bool strength) {
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if (strength != GPIO_STRENGTH_2MA && strength != GPIO_STRENGTH_8MA) {
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mp_raise_ValueError(MP_ERROR_TEXT("invalid argument(s) value"));
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}
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}
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int pin_find(mp_obj_t pin, const machine_pin_obj_t machine_pin_obj[], int table_size) {
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int wanted_pin = -1;
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if (mp_obj_is_small_int(pin)) {
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// Pin defined by the index of pin table
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wanted_pin = mp_obj_get_int(pin);
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} else if (mp_obj_is_str(pin)) {
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// Search by name
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size_t slen;
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const char *s = mp_obj_str_get_data(pin, &slen);
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for (wanted_pin = 0; wanted_pin < table_size; wanted_pin++) {
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if (slen == strlen(machine_pin_obj[wanted_pin].name) &&
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strncmp(s, machine_pin_obj[wanted_pin].name, slen) == 0) {
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break;
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}
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}
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}
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return wanted_pin;
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}
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// Pin.init(mode, pull=None, *, value=None, drive=0). No 'alt' yet.
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STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_mode, ARG_pull, ARG_value, ARG_drive, ARG_alt };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_mode, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE}},
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{ MP_QSTR_pull, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE}},
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{ MP_QSTR_value, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE}},
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{ MP_QSTR_drive, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = GPIO_STRENGTH_2MA} },
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};
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// parse args
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// set initial value (do this before configuring mode/pull)
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if (args[ARG_value].u_obj != mp_const_none) {
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mp_hal_pin_write(self->id, mp_obj_is_true(args[ARG_value].u_obj));
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}
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// configure mode
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if (args[ARG_mode].u_obj != mp_const_none) {
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mp_int_t mode = mp_obj_get_int(args[ARG_mode].u_obj);
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if (mode == GPIO_MODE_IN) {
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mp_hal_pin_input(self->id);
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} else if (mode == GPIO_MODE_OUT) {
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mp_hal_pin_output(self->id);
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} else if (mode == GPIO_MODE_OPEN_DRAIN) {
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mp_hal_pin_open_drain(self->id);
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} else {
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mp_hal_pin_input(self->id); // If no args are given, the Pin is 'input'.
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}
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}
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// configure pull. Only to be used with IN mode. The function sets the pin to INPUT.
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uint32_t pull = 0;
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mp_int_t dir = mp_hal_get_pin_direction(self->id);
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if (dir == GPIO_DIRECTION_OUT && args[ARG_pull].u_obj != mp_const_none) {
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mp_raise_ValueError(MP_ERROR_TEXT("OUT incompatible with pull"));
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} else if (args[ARG_pull].u_obj != mp_const_none) {
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pull = mp_obj_get_int(args[ARG_pull].u_obj);
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gpio_set_pin_pull_mode(self->id, pull); // hal_gpio.h
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}
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// get the strength
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bool strength = args[3].u_int;
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pin_validate_drive(strength);
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return mp_const_none;
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}
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// constructor(id, ...)
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mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
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// get the wanted pin object
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int wanted_pin = pin_find(args[0], machine_pin_obj, MP_ARRAY_SIZE(machine_pin_obj));
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const machine_pin_obj_t *self = NULL;
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if (0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(machine_pin_obj)) {
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self = (machine_pin_obj_t *)&machine_pin_obj[wanted_pin];
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}
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if (self == NULL || self->base.type == NULL) {
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mp_raise_ValueError(MP_ERROR_TEXT("invalid pin"));
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}
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if (n_args > 1 || n_kw > 0) {
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// pin mode given, so configure this GPIO
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mp_map_t kw_args;
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mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
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machine_pin_obj_init_helper(self, n_args - 1, args + 1, &kw_args);
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}
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return MP_OBJ_FROM_PTR(self);
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}
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// fast method for getting/setting pin value
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mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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mp_arg_check_num(n_args, n_kw, 0, 1, false);
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machine_pin_obj_t *self = self_in;
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if (n_args == 0) {
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// get pin
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return MP_OBJ_NEW_SMALL_INT(mp_hal_pin_read(self->id));
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} else {
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// set pin
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bool value = mp_obj_is_true(args[0]);
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if (GPIO_IS_OPEN_DRAIN(self->id)) {
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if (value == 0) {
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mp_hal_pin_od_low(self->id);
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} else {
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mp_hal_pin_od_high(self->id);
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}
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} else {
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mp_hal_pin_write(self->id, value);
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}
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return mp_const_none;
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}
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}
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// Pin.init(mode, pull)
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STATIC mp_obj_t machine_pin_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
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return machine_pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args);
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}
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MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_init_obj, 1, machine_pin_obj_init);
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// Pin.value([value])
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mp_obj_t machine_pin_value(size_t n_args, const mp_obj_t *args) {
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return machine_pin_call(args[0], n_args - 1, 0, args + 1);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_value_obj, 1, 2, machine_pin_value);
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// Pin.disable(pin)
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STATIC mp_obj_t machine_pin_disable(mp_obj_t self_in) {
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machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
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gpio_set_pin_direction(self->id, GPIO_DIRECTION_OFF); // Disables the pin (low power state)
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_disable_obj, machine_pin_disable);
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// Pin.low() Totem-pole (push-pull)
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STATIC mp_obj_t machine_pin_low(mp_obj_t self_in) {
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machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
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if (GPIO_IS_OPEN_DRAIN(self->id)) {
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mp_hal_pin_od_low(self->id);
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} else {
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mp_hal_pin_low(self->id);
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_low_obj, machine_pin_low);
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// Pin.high() Totem-pole (push-pull)
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STATIC mp_obj_t machine_pin_high(mp_obj_t self_in) {
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machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
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if (GPIO_IS_OPEN_DRAIN(self->id)) {
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mp_hal_pin_od_high(self->id);
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} else {
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mp_hal_pin_high(self->id);
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_high_obj, machine_pin_high);
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// Pin.toggle(). Only TOGGLE pins set as OUTPUT.
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STATIC mp_obj_t machine_pin_toggle(mp_obj_t self_in) {
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machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
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// Determine DIRECTION of PIN.
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bool pin_dir;
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if (GPIO_IS_OPEN_DRAIN(self->id)) {
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pin_dir = mp_hal_get_pin_direction(self->id);
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if (pin_dir) {
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// Pin is output, thus low, switch to high
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mp_hal_pin_od_high(self->id);
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} else {
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mp_hal_pin_od_low(self->id);
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}
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} else {
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gpio_toggle_pin_level(self->id);
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}
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_toggle_obj, machine_pin_toggle);
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// Pin.drive(). Normal (0) is 2mA, High (1) allows 8mA.
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STATIC mp_obj_t machine_pin_drive(size_t n_args, const mp_obj_t *args) {
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machine_pin_obj_t *self = args[0]; // Pin
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if (n_args == 1) {
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return mp_const_none;
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} else {
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bool strength = mp_obj_get_int(args[1]); // 0 or 1
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pin_validate_drive(strength);
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// Set the DRVSTR bit (ASF hri/hri_port_dxx.h
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hri_port_write_PINCFG_DRVSTR_bit(PORT,
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(enum gpio_port)GPIO_PORT(self->id),
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GPIO_PIN(self->id),
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strength);
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return mp_const_none;
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}
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_drive_obj, 1, 2, machine_pin_drive);
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// pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING, hard=False)
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STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_handler, ARG_trigger, ARG_hard };
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static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_handler, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
|
|
|
|
{ MP_QSTR_trigger, MP_ARG_INT, {.u_int = 3} },
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|
|
|
{ MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} },
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|
|
|
};
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|
|
machine_pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
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|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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|
// Get the IRQ object.
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|
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uint8_t eic_id = get_pin_af_info(self->id)->eic;
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|
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machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]);
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|
|
if (irq != NULL && irq->pin_id != self->id) {
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|
|
mp_raise_ValueError(MP_ERROR_TEXT("IRQ already used"));
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|
|
|
}
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|
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|
|
// Allocate the IRQ object if it doesn't already exist.
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|
|
|
if (irq == NULL) {
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|
|
irq = m_new_obj(machine_pin_irq_obj_t);
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|
|
|
irq->base.base.type = &mp_irq_type;
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|
|
irq->base.methods = (mp_irq_methods_t *)&machine_pin_irq_methods;
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|
|
irq->base.parent = MP_OBJ_FROM_PTR(self);
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|
|
irq->base.handler = mp_const_none;
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|
|
irq->base.ishard = false;
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|
|
irq->pin_id = 0xff;
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|
|
MP_STATE_PORT(machine_pin_irq_objects[eic_id]) = irq;
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|
|
|
}
|
|
|
|
// (Re-)configure the irq.
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|
|
|
if (n_args > 1 || kw_args->used != 0) {
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|
|
|
|
|
|
|
// set the mux config of the pin.
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|
|
mp_hal_set_pin_mux(self->id, ALT_FCT_EIC);
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|
|
|
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|
|
// Configure IRQ.
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|
|
#if defined(MCU_SAMD21)
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|
|
uint32_t irq_num = 4;
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|
|
// Disable all IRQs from the affected source while data is updated.
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|
|
NVIC_DisableIRQ(irq_num);
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|
|
// Disable EIC
|
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|
|
EIC->CTRL.bit.ENABLE = 0;
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|
|
|
while (EIC->STATUS.bit.SYNCBUSY != 0) {
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|
|
|
}
|
|
|
|
EIC->INTENCLR.reg = (1 << eic_id);
|
|
|
|
// Enable the clocks
|
|
|
|
PM->APBAMASK.bit.EIC_ |= 1;
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|
|
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK2 | EIC_GCLK_ID;
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|
|
|
|
|
|
|
#elif defined(MCU_SAMD51)
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|
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|
|
uint32_t irq_num = eic_id + 12;
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|
|
// Disable all IRQs from the affected source while data is updated.
|
|
|
|
NVIC_DisableIRQ(irq_num);
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|
|
|
// Disable EIC
|
|
|
|
EIC->CTRLA.bit.ENABLE = 0;
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|
|
|
while (EIC->SYNCBUSY.bit.ENABLE != 0) {
|
|
|
|
}
|
|
|
|
EIC->INTENCLR.reg = (1 << eic_id);
|
|
|
|
// Enable the clocks
|
|
|
|
MCLK->APBAMASK.bit.EIC_ |= 1;
|
|
|
|
GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK2;
|
|
|
|
|
|
|
|
#endif
|
|
|
|
// Clear the pending interrupts flag
|
|
|
|
EIC->INTENCLR.reg = (1 << eic_id);
|
|
|
|
|
|
|
|
// Update IRQ data.
|
|
|
|
irq->base.handler = args[ARG_handler].u_obj;
|
|
|
|
irq->base.ishard = args[ARG_hard].u_bool;
|
|
|
|
irq->flags = 0;
|
|
|
|
irq->trigger = args[ARG_trigger].u_int;
|
|
|
|
irq->pin_id = self->id;
|
|
|
|
|
|
|
|
// Enable IRQ if a handler is given.
|
|
|
|
if (args[ARG_handler].u_obj != mp_const_none) {
|
|
|
|
// Set EIC channel mode
|
|
|
|
EIC->CONFIG[eic_id / 8].reg |= irq->trigger << ((eic_id % 8) * 4);
|
|
|
|
EIC->INTENSET.reg = (1 << eic_id);
|
|
|
|
EIC->INTFLAG.reg |= (1 << eic_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Enable EIC (again)
|
|
|
|
#if defined(MCU_SAMD21)
|
|
|
|
EIC->CTRL.bit.ENABLE = 1;
|
|
|
|
while (EIC->STATUS.bit.SYNCBUSY != 0) {
|
|
|
|
}
|
|
|
|
#elif defined(MCU_SAMD51)
|
|
|
|
EIC->CTRLA.bit.ENABLE = 1;
|
|
|
|
while (EIC->SYNCBUSY.bit.ENABLE != 0) {
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
// Enable interrupt again
|
|
|
|
NVIC_EnableIRQ(irq_num);
|
|
|
|
}
|
|
|
|
return MP_OBJ_FROM_PTR(irq);
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_irq_obj, 1, machine_pin_irq);
|
|
|
|
|
|
|
|
void pin_irq_deinit_all(void) {
|
|
|
|
|
|
|
|
EIC->INTENCLR.reg = 0xffff; // Disable all interrupts from the EIC.
|
|
|
|
for (int i = 0; i < 16; i++) { // Clear all irq object pointers
|
|
|
|
MP_STATE_PORT(machine_pin_irq_objects[i]) = NULL;
|
|
|
|
}
|
|
|
|
// Disable all irq's at the NVIC controller
|
|
|
|
#if defined(MCU_SAMD21)
|
|
|
|
NVIC_DisableIRQ(4);
|
|
|
|
#elif defined(MCU_SAMD51)
|
|
|
|
for (int i = 12; i < 20; i++) {
|
|
|
|
NVIC_DisableIRQ(i);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
// Common EIC handler for all events.
|
|
|
|
void EIC_Handler() {
|
|
|
|
uint32_t mask = 1;
|
|
|
|
uint32_t isr = EIC->INTFLAG.reg;
|
|
|
|
for (int eic_id = 0; eic_id < 16; eic_id++, mask <<= 1) {
|
|
|
|
// Did the ISR fire?
|
|
|
|
if (isr & mask) {
|
|
|
|
EIC->INTFLAG.reg |= mask; // clear the ISR flag
|
|
|
|
machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]);
|
|
|
|
if (irq != NULL) {
|
|
|
|
irq->flags = irq->trigger;
|
|
|
|
mp_irq_handler(&irq->base);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-05-20 04:15:36 -04:00
|
|
|
STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
|
|
|
|
// instance methods
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_pin_init_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_pin_value_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_low), MP_ROM_PTR(&machine_pin_low_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_high), MP_ROM_PTR(&machine_pin_high_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&machine_pin_low_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&machine_pin_high_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&machine_pin_toggle_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_disable), MP_ROM_PTR(&machine_pin_disable_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_drive), MP_ROM_PTR(&machine_pin_drive_obj) },
|
2022-06-05 08:08:44 -04:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_pin_irq_obj) },
|
2021-05-20 04:15:36 -04:00
|
|
|
|
|
|
|
// class constants
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_MODE_IN) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_MODE_OUT) },
|
2022-06-04 14:33:48 -04:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_OPEN_DRAIN), MP_ROM_INT(GPIO_MODE_OPEN_DRAIN) },
|
2021-05-20 04:15:36 -04:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_PULL_OFF), MP_ROM_INT(GPIO_PULL_OFF) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PULL_UP) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PULL_DOWN) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_LOW_POWER), MP_ROM_INT(GPIO_STRENGTH_2MA) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_HIGH_POWER), MP_ROM_INT(GPIO_STRENGTH_8MA) },
|
2022-06-05 08:08:44 -04:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_IRQ_EDGE_RISE) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_IRQ_EDGE_FALL) },
|
2021-05-20 04:15:36 -04:00
|
|
|
};
|
|
|
|
STATIC MP_DEFINE_CONST_DICT(machine_pin_locals_dict, machine_pin_locals_dict_table);
|
|
|
|
|
|
|
|
STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
|
|
|
|
(void)errcode;
|
|
|
|
machine_pin_obj_t *self = self_in;
|
|
|
|
|
|
|
|
switch (request) {
|
|
|
|
case MP_PIN_READ: {
|
2022-06-05 08:08:44 -04:00
|
|
|
return mp_hal_pin_read(self->id);
|
2021-05-20 04:15:36 -04:00
|
|
|
}
|
|
|
|
case MP_PIN_WRITE: {
|
2022-06-05 08:08:44 -04:00
|
|
|
mp_hal_pin_write(self->id, arg);
|
2021-05-20 04:15:36 -04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC const mp_pin_p_t pin_pin_p = {
|
|
|
|
.ioctl = pin_ioctl,
|
|
|
|
};
|
|
|
|
|
2021-07-14 00:38:38 -04:00
|
|
|
MP_DEFINE_CONST_OBJ_TYPE(
|
|
|
|
machine_pin_type,
|
|
|
|
MP_QSTR_Pin,
|
|
|
|
MP_TYPE_FLAG_NONE,
|
2022-09-16 10:31:23 -04:00
|
|
|
make_new, mp_pin_make_new,
|
2021-07-14 00:38:38 -04:00
|
|
|
print, machine_pin_print,
|
|
|
|
call, machine_pin_call,
|
|
|
|
protocol, &pin_pin_p,
|
2022-06-24 02:27:46 -04:00
|
|
|
locals_dict, &machine_pin_locals_dict
|
2021-07-14 00:38:38 -04:00
|
|
|
);
|
2021-05-20 04:15:36 -04:00
|
|
|
|
2022-06-05 08:08:44 -04:00
|
|
|
static uint8_t find_eic_id(int pin) {
|
|
|
|
for (int eic_id = 0; eic_id < 16; eic_id++) {
|
|
|
|
machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]);
|
|
|
|
if (irq != NULL && irq->pin_id == pin) {
|
|
|
|
return eic_id;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0xff;
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC mp_uint_t machine_pin_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) {
|
|
|
|
machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
|
|
|
uint8_t eic_id = find_eic_id(self->id);
|
|
|
|
if (eic_id != 0xff) {
|
|
|
|
machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]);
|
|
|
|
EIC->INTENCLR.reg |= (1 << eic_id);
|
|
|
|
irq->flags = 0;
|
|
|
|
irq->trigger = new_trigger;
|
|
|
|
EIC->INTENSET.reg |= (1 << eic_id);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC mp_uint_t machine_pin_irq_info(mp_obj_t self_in, mp_uint_t info_type) {
|
|
|
|
machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
|
|
|
uint8_t eic_id = find_eic_id(self->id);
|
|
|
|
if (eic_id != 0xff) {
|
|
|
|
machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]);
|
|
|
|
if (info_type == MP_IRQ_INFO_FLAGS) {
|
|
|
|
return irq->flags;
|
|
|
|
} else if (info_type == MP_IRQ_INFO_TRIGGERS) {
|
|
|
|
return irq->trigger;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC const mp_irq_methods_t machine_pin_irq_methods = {
|
|
|
|
.trigger = machine_pin_irq_trigger,
|
|
|
|
.info = machine_pin_irq_info,
|
|
|
|
};
|
|
|
|
|
2021-05-20 04:15:36 -04:00
|
|
|
mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t obj) {
|
|
|
|
if (!mp_obj_is_type(obj, &machine_pin_type)) {
|
|
|
|
mp_raise_ValueError(MP_ERROR_TEXT("expecting a Pin"));
|
|
|
|
}
|
|
|
|
machine_pin_obj_t *pin = MP_OBJ_TO_PTR(obj);
|
|
|
|
return pin->id;
|
|
|
|
}
|
2022-06-05 08:08:44 -04:00
|
|
|
|
|
|
|
MP_REGISTER_ROOT_POINTER(void *machine_pin_irq_objects[16]);
|