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circuitpython/ports/mimxrt10xx/mpconfigport.mk

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Refine iMX RT memory layout and add three boards Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-08 23:32:45 -05:00
LD_FILE = $(FLASH).ld $(CHIP_FAMILY).ld imxrt10xx.ld
Add initial MIMXRT10XX port
2019-11-02 11:52:26 -04:00
INTERNAL_LIBM = 1
replace USB_MSC_MAX_PACKET_SIZE with USB_HIGHSPEED in descriptor gen tool
2020-07-29 04:38:55 -04:00
USB_HIGHSPEED = 1
Refine iMX RT memory layout and add three boards Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-08 23:32:45 -05:00
usb descriptors all set; rework of enabling for USB devices
2021-02-04 19:23:40 -05:00
# Number of USB endpoint pairs.
count in/out endpoints; allow more usb modules on low-endpoint boards
2021-05-13 21:49:04 -04:00
USB_NUM_ENDPOINT_PAIRS = 8
Improve iMX RT performance * Enable dcache for OCRAM where the VM heap lives. * Add CIRCUITPY_SWO_TRACE for pushing program counters out over the SWO pin via the ITM module in the CPU. Exempt some functions from instrumentation to reduce traffic and allow inlining. * Place more functions in ITCM to handle errors using code in RAM-only and speed up CP. * Use SET and CLEAR registers for digitalio. The SDK does read, mask and write. * Switch to 2MiB reserved for CircuitPython code. Up from 1MiB. * Run USB interrupts during flash erase and write. * Allow storage writes from CP if the USB drive is disabled. * Get perf bench tests running on CircuitPython and increase timeouts so it works when instrumentation is active.
2023-02-28 18:07:35 -05:00
# Align buffers on the cache boundary so we don't inadvertently load them early.
CIRCUITPY_TUSB_MEM_ALIGN = 32
usb descriptors all set; rework of enabling for USB devices
2021-02-04 19:23:40 -05:00
Refine iMX RT memory layout and add three boards Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-08 23:32:45 -05:00
INTERNAL_FLASH_FILESYSTEM = 1
mimxrt10xx: implement i2sout tested on metro m7 (green prototype version) with max98357a i2s amplifier and the following test code: ```py import board import time import digitalio from audiobusio import I2SOut from audiocore import RawSample from microcontroller import pin from ulab import numpy as np n = np.array(np.sin(np.linspace(0, np.pi*2, 218, endpoint=False)) * 200, dtype=np.int16) print(n) r = RawSample(n, sample_rate=8000, channel_count=2) def main(): with digitalio.DigitalInOut(board.LED) as l: l.switch_to_output(True) value = False while True: with I2SOut(pin.GPIO_06, pin.GPIO_07, pin.GPIO_04) as i: time.sleep(.01) l.value = value = not value i.play(r, loop=True) print(i.playing) time.sleep(.5) i.stop() print("STOPPED") print(i.playing) time.sleep(.5) i.play(r, loop=True) print(i.playing) print("PLAY AGAIN") time.sleep(.5) time.sleep(1) ``` Only stereo, 16-bit, raw samples were tested; the sample rate is actually fixed at 48kHz in the core right now. There is more to do, but the basics work. # Conflicts: # ports/mimxrt10xx/Makefile # ports/mimxrt10xx/mpconfigport.mk
2023-03-22 13:14:00 -04:00
CIRCUITPY_AUDIOBUSIO = 1
CIRCUITPY_AUDIOBUSIO_PDMIN = 0
CIRCUITPY_AUDIOCORE = 1
Refine iMX RT memory layout and add three boards Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-08 23:32:45 -05:00
CIRCUITPY_AUDIOIO = 0
enable audiomixer
2023-03-21 12:58:51 -04:00
CIRCUITPY_AUDIOMIXER = 1
enable MP3
2023-03-21 13:17:17 -04:00
CIRCUITPY_AUDIOMP3 = 1
mimxrt10xx: Add PWMAudioOut .. via a peripheral known as the "MQS" (medium quality sound). It uses an ~192kHz PWM signal to generate audio. It sounds OK on a small speaker with no amplifier. There's a small pop when starting/stopping audio, as is typical.
2023-03-23 15:00:14 -04:00
CIRCUITPY_AUDIOPWMIO = 1
synthio: allow increasing number of channels 12 channels works well on metro m7
2023-03-31 11:51:03 -04:00
CIRCUITPY_SYNTHIO_MAX_CHANNELS = 12
mimxrt10xx: enable adafruit_bus_device in core
2021-04-06 10:19:09 -04:00
CIRCUITPY_BUSDEVICE = 1
Switch to pin, frequency and duty_cycle PulseOut Passing in a PWMOut still works but is deprecated. It will be removed in CircuitPython 8.0.0 This also switches STM32 timer indices and channel indices to 0-based in our pin data rather than `- 1` everywhere. The latter is more bug prone. Most of the way for #3264 Tested on Metro M0, Metro M4, Feather S2, Feather nRF52840, Feather STM32F4 and Arduino RP2040.
2021-07-21 19:27:09 -04:00
CIRCUITPY_COUNTIO = 0
Refine iMX RT memory layout and add three boards Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-08 23:32:45 -05:00
CIRCUITPY_FREQUENCYIO = 0
Change I2C terminology from "peripheral" to "target"
2022-08-09 13:06:18 -04:00
CIRCUITPY_I2CTARGET = 0
Refine iMX RT memory layout and add three boards Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-08 23:32:45 -05:00
CIRCUITPY_NVM = 0
remove paralleldisplay from ports where it was unimplemented
2021-08-29 08:29:32 -04:00
CIRCUITPY_PARALLELDISPLAY = 0
Switch to pin, frequency and duty_cycle PulseOut Passing in a PWMOut still works but is deprecated. It will be removed in CircuitPython 8.0.0 This also switches STM32 timer indices and channel indices to 0-based in our pin data rather than `- 1` everywhere. The latter is more bug prone. Most of the way for #3264 Tested on Metro M0, Metro M4, Feather S2, Feather nRF52840, Feather STM32F4 and Arduino RP2040.
2021-07-21 19:27:09 -04:00
CIRCUITPY_PULSEIO = 0
Add IncrementalEncoder for mimxrt1011 .. and write a general 'pin change interrupt' facility to power it This uses the same quadrature state machine as atmel-samd, nrf, and rp2040. The 1011 doesn't have a dedicated encoder peripheral, so we go the pin-change + software route.
2023-03-06 17:04:39 -05:00
CIRCUITPY_ROTARYIO = 1
CIRCUITPY_ROTARYIO_SOFTENCODER = 1
mimxrt: Enable USB Midi Closes #2473
2021-03-18 17:51:47 -04:00
CIRCUITPY_USB_MIDI = 1
Refine iMX RT memory layout and add three boards Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-08 23:32:45 -05:00
LONGINT_IMPL = MPZ
Move build extensions to board directories - define CIRCUITPY_BUILD_EXTENSIONS to predefined values - set CIRCUITPY_BUILD_EXTENSIONS in port and board config - reuse the support matrix "get_settings_from_makefile" to get it - move the existing port and board specific values - remove the C3 specific board values because it's not the default - update build_release_files.py to use get_settings_from_makefile
2022-05-13 05:38:03 -04:00
list extensions instead of macros names ("bin,uf2" not BIN_UF2) the modules_support_matrix usees a dictionnary per board instead of a list optionally include the frozen modules URLs in it
2022-07-19 17:35:51 -04:00
CIRCUITPY_BUILD_EXTENSIONS ?= hex,uf2