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circuitpython/ports/stm/boards/STM32H743_fs.ld

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Add F7 and H7 Support to the STM32 port Restructures the STM port of Circuitpython to be more generic about the STM32 chip lines to support the F7 and H7 series of chips. Adds the new Packages directory to organize different chip layouts between lines. Makes general changes to the Makefile to condense board-level flags to the minimum and support the new chip series. Adds the new chip line to the Peripherals directory, along with new python tools used to generate peripheral text automatically in the tools/ directory.
2020-03-17 18:26:13 -04:00
/*
Linker file restructure, TCM and MPU additions
2020-04-02 16:15:12 -04:00
GNU linker script for STM32H743 with filesystem, tcm
Add F7 and H7 Support to the STM32 port Restructures the STM port of Circuitpython to be more generic about the STM32 chip lines to support the F7 and H7 series of chips. Adds the new Packages directory to organize different chip layouts between lines. Makes general changes to the Makefile to condense board-level flags to the minimum and support the new chip series. Adds the new chip line to the Peripherals directory, along with new python tools used to generate peripheral text automatically in the tools/ directory.
2020-03-17 18:26:13 -04:00
*/
/* Entry Point */
ENTRY(Reset_Handler)
Linker file restructure, TCM and MPU additions
2020-04-02 16:15:12 -04:00
_ld_default_stack_size = 24K;
Add F7 and H7 Support to the STM32 port Restructures the STM port of Circuitpython to be more generic about the STM32 chip lines to support the F7 and H7 series of chips. Adds the new Packages directory to organize different chip layouts between lines. Makes general changes to the Makefile to condense board-level flags to the minimum and support the new chip series. Adds the new chip line to the Peripherals directory, along with new python tools used to generate peripheral text automatically in the tools/ directory.
2020-03-17 18:26:13 -04:00
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* sector 0, 128K */
FLASH_FS (r) : ORIGIN = 0x08020000, LENGTH = 128K /* sector 1, 128K */
stm: Use FLASH_FIRMWARE instead of FLASH_TEXT in linker scripts for compatibility with the build_memory_info script This change was scripted: git grep -l FLASH_TEXT | xargs sed -i s/FLASH_TEXT/FLASH_FIRMWARE/
2020-04-27 09:07:28 -04:00
FLASH_FIRMWARE (rx) : ORIGIN = 0x08040000, LENGTH = 1792K /* sectors 6*128 + 8*128 */
Implement requested changes
2020-04-01 13:02:05 -04:00
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
Add F7 and H7 Support to the STM32 port Restructures the STM port of Circuitpython to be more generic about the STM32 chip lines to support the F7 and H7 series of chips. Adds the new Packages directory to organize different chip layouts between lines. Makes general changes to the Makefile to condense board-level flags to the minimum and support the new chip series. Adds the new chip line to the Peripherals directory, along with new python tools used to generate peripheral text automatically in the tools/ directory.
2020-03-17 18:26:13 -04:00
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* AXI SRAM */
Implement requested changes
2020-04-01 13:02:05 -04:00
SRAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K /* AHB1 SRAM */
SRAM_D3 (xrw) : ORIGIN = 0x30040000, LENGTH = 64K /* AHB2 SRAM */
ITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
Add F7 and H7 Support to the STM32 port Restructures the STM port of Circuitpython to be more generic about the STM32 chip lines to support the F7 and H7 series of chips. Adds the new Packages directory to organize different chip layouts between lines. Makes general changes to the Makefile to condense board-level flags to the minimum and support the new chip series. Adds the new chip line to the Peripherals directory, along with new python tools used to generate peripheral text automatically in the tools/ directory.
2020-03-17 18:26:13 -04:00
}
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
Implement requested changes
2020-04-01 13:02:05 -04:00
/* brainless copy paste for stack code. Results in ambiguous hard crash */
/* _ld_default_stack_size = 20K; */
Add F7 and H7 Support to the STM32 port Restructures the STM port of Circuitpython to be more generic about the STM32 chip lines to support the F7 and H7 series of chips. Adds the new Packages directory to organize different chip layouts between lines. Makes general changes to the Makefile to condense board-level flags to the minimum and support the new chip series. Adds the new chip line to the Peripherals directory, along with new python tools used to generate peripheral text automatically in the tools/ directory.
2020-03-17 18:26:13 -04:00
/* Define tho top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
Linker file restructure, TCM and MPU additions
2020-04-02 16:15:12 -04:00
_estack = ORIGIN(DTCM) + LENGTH(DTCM);
Add F7 and H7 Support to the STM32 port Restructures the STM port of Circuitpython to be more generic about the STM32 chip lines to support the F7 and H7 series of chips. Adds the new Packages directory to organize different chip layouts between lines. Makes general changes to the Makefile to condense board-level flags to the minimum and support the new chip series. Adds the new chip line to the Peripherals directory, along with new python tools used to generate peripheral text automatically in the tools/ directory.
2020-03-17 18:26:13 -04:00
/* RAM extents for the garbage collector */
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);