2019-11-02 11:52:26 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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2020-06-03 18:40:05 -04:00
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* SPDX-FileCopyrightText: Copyright (c) 2016 Damien P. George
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2019-11-02 11:52:26 -04:00
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* Copyright (c) 2019 Artur Pacholec
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include "py/runtime.h"
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2020-08-18 16:08:33 -04:00
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#include "common-hal/pwmio/PWMOut.h"
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#include "shared-bindings/pwmio/PWMOut.h"
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2021-04-01 10:37:39 -04:00
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#include "shared-bindings/microcontroller/Pin.h"
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2019-11-02 11:52:26 -04:00
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2023-03-21 19:21:57 -04:00
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#include "sdk/drivers/pwm/fsl_pwm.h"
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2019-11-02 11:52:26 -04:00
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2022-05-27 15:59:54 -04:00
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#include "supervisor/shared/translate/translate.h"
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2019-11-02 11:52:26 -04:00
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#include "periph.h"
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2023-02-17 19:13:18 -05:00
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static PWM_Type *const _flexpwms[] = PWM_BASE_PTRS;
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2022-04-16 12:00:45 -04:00
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2023-02-17 19:13:18 -05:00
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// 4 bits for each submodule in each FlexPWM.
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static uint16_t _pwm_never_reset[MP_ARRAY_SIZE(_flexpwms)];
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// Bitmask of whether state machines are use for variable frequency.
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static uint8_t _pwm_variable_frequency[MP_ARRAY_SIZE(_flexpwms)];
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// Configured frequency for each submodule.
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static uint32_t _pwm_sm_frequencies[MP_ARRAY_SIZE(_flexpwms)][FSL_FEATURE_PWM_SUBMODULE_COUNT];
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// Channels use is tracked using the OUTEN register.
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// The SDK gives use clocks per submodule but they all share the same value! So, ignore the
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// submodule and only turn off the clock when no other submodules are in use.
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static const clock_ip_name_t _flexpwm_clocks[][FSL_FEATURE_PWM_SUBMODULE_COUNT] = PWM_CLOCKS;
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2022-04-16 12:00:45 -04:00
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2021-04-01 10:37:39 -04:00
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static void config_periph_pin(const mcu_pwm_obj_t *periph) {
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IOMUXC_SetPinMux(
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periph->pin->mux_reg, periph->mux_mode,
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periph->input_reg, periph->input_idx,
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periph->pin->cfg_reg,
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0);
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IOMUXC_SetPinConfig(0, 0, 0, 0,
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periph->pin->cfg_reg,
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IOMUXC_SW_PAD_CTL_PAD_HYS(0)
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| IOMUXC_SW_PAD_CTL_PAD_PUS(1)
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| IOMUXC_SW_PAD_CTL_PAD_PUE(1)
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| IOMUXC_SW_PAD_CTL_PAD_PKE(1)
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| IOMUXC_SW_PAD_CTL_PAD_ODE(0)
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| IOMUXC_SW_PAD_CTL_PAD_SPEED(1)
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| IOMUXC_SW_PAD_CTL_PAD_DSE(6)
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| IOMUXC_SW_PAD_CTL_PAD_SRE(0));
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}
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2019-11-02 11:52:26 -04:00
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2023-02-17 19:13:18 -05:00
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static uint16_t _outen_mask(pwm_submodule_t submodule, pwm_channels_t channel) {
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uint16_t outen_mask = 0;
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uint8_t sm_mask = 1 << submodule;
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switch (channel) {
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case kPWM_PwmX:
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outen_mask |= PWM_OUTEN_PWMX_EN(sm_mask);
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break;
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case kPWM_PwmA:
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outen_mask |= PWM_OUTEN_PWMA_EN(sm_mask);
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break;
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case kPWM_PwmB:
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outen_mask |= PWM_OUTEN_PWMB_EN(sm_mask);
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break;
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}
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return outen_mask;
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}
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2020-08-18 16:08:33 -04:00
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void common_hal_pwmio_pwmout_never_reset(pwmio_pwmout_obj_t *self) {
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2023-02-17 19:13:18 -05:00
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common_hal_never_reset_pin(self->pin);
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_pwm_never_reset[self->flexpwm_index] |= (1 << (self->pwm->submodule * 4 + self->pwm->channel));
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2019-11-02 11:52:26 -04:00
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}
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2023-02-17 19:13:18 -05:00
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STATIC void _maybe_disable_clock(uint8_t instance) {
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if ((_flexpwms[instance]->MCTRL & PWM_MCTRL_RUN_MASK) == 0) {
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CLOCK_DisableClock(_flexpwm_clocks[instance][0]);
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}
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2019-11-02 11:52:26 -04:00
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}
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2023-02-17 19:13:18 -05:00
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void reset_all_flexpwm(void) {
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for (size_t i = 1; i < MP_ARRAY_SIZE(_pwm_never_reset); i++) {
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PWM_Type *flexpwm = _flexpwms[i];
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for (size_t submodule = 0; submodule < FSL_FEATURE_PWM_SUBMODULE_COUNT; submodule++) {
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uint8_t sm_mask = 1 << submodule;
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for (size_t channel = 0; channel < 3; channel++) {
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uint16_t channel_mask = 0x1 << (submodule * 4 + channel);
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if ((_pwm_never_reset[i] & channel_mask) != 0) {
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continue;
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}
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// Turn off the channel.
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flexpwm->OUTEN &= ~_outen_mask(submodule, channel);
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}
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uint16_t submodule_mask = 0xf << (submodule * 4);
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if ((_pwm_never_reset[i] & submodule_mask) != 0) {
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// Leave the submodule on since a channel is marked for never_reset.
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continue;
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}
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flexpwm->MCTRL &= ~(sm_mask << PWM_MCTRL_RUN_SHIFT);
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_pwm_variable_frequency[i] &= ~sm_mask;
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_pwm_sm_frequencies[i][submodule] = 0;
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}
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_maybe_disable_clock(i);
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}
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2019-11-02 11:52:26 -04:00
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}
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#define PWM_SRC_CLK_FREQ CLOCK_GetFreq(kCLOCK_IpgClk)
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2021-04-01 14:04:06 -04:00
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static int calculate_pulse_count(uint32_t frequency, uint8_t *prescaler) {
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2021-04-30 11:47:37 -04:00
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if (frequency > PWM_SRC_CLK_FREQ / 2) {
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2021-04-01 14:04:06 -04:00
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return 0;
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}
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2021-04-30 11:47:37 -04:00
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for (int shift = 0; shift < 8; shift++) {
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int pulse_count = PWM_SRC_CLK_FREQ / (1 << shift) / frequency;
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2021-04-01 14:04:06 -04:00
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if (pulse_count >= 65535) {
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continue;
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}
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*prescaler = shift;
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return pulse_count;
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}
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return 0;
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}
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2020-08-18 16:08:33 -04:00
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pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t *self,
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2021-03-15 09:57:36 -04:00
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const mcu_pin_obj_t *pin,
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uint16_t duty,
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uint32_t frequency,
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bool variable_frequency) {
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2019-11-02 11:52:26 -04:00
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self->pin = pin;
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self->variable_frequency = variable_frequency;
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2023-02-17 19:13:18 -05:00
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for (uint32_t i = 0; i < MP_ARRAY_SIZE(mcu_pwm_list); ++i) {
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2021-03-15 09:57:36 -04:00
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if (mcu_pwm_list[i].pin != pin) {
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2019-11-02 11:52:26 -04:00
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continue;
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2021-03-15 09:57:36 -04:00
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}
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2019-11-02 11:52:26 -04:00
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self->pwm = &mcu_pwm_list[i];
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break;
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}
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if (self->pwm == NULL) {
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return PWMOUT_INVALID_PIN;
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}
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2023-02-17 19:13:18 -05:00
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PWM_Type *flexpwm = self->pwm->pwm;
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pwm_submodule_t submodule = self->pwm->submodule;
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uint16_t sm_mask = 1 << submodule;
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pwm_channels_t channel = self->pwm->channel;
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2022-04-16 12:00:45 -04:00
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2023-02-17 19:13:18 -05:00
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uint8_t flexpwm_index = 1;
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for (; flexpwm_index < MP_ARRAY_SIZE(_flexpwms); flexpwm_index++) {
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if (_flexpwms[flexpwm_index] == flexpwm) {
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break;
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}
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}
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self->flexpwm_index = flexpwm_index;
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2019-11-02 11:52:26 -04:00
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2023-02-17 19:13:18 -05:00
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uint16_t outen_mask = _outen_mask(submodule, channel);
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2019-11-02 11:52:26 -04:00
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2021-04-01 14:04:06 -04:00
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self->pulse_count = calculate_pulse_count(frequency, &self->prescaler);
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2019-11-02 11:52:26 -04:00
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2021-04-01 14:04:06 -04:00
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if (self->pulse_count == 0) {
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2021-04-01 10:37:39 -04:00
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return PWMOUT_INVALID_FREQUENCY;
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}
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2019-11-02 11:52:26 -04:00
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2023-02-17 19:13:18 -05:00
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// The submodule is already running
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if (((flexpwm->MCTRL >> PWM_MCTRL_RUN_SHIFT) & sm_mask) != 0) {
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// Another output has claimed this submodule for variable frequency already.
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if ((_pwm_variable_frequency[flexpwm_index] & sm_mask) != 0) {
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return PWMOUT_ALL_TIMERS_ON_PIN_IN_USE;
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}
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2021-04-01 14:04:06 -04:00
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2023-02-17 19:13:18 -05:00
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// We want variable frequency but another class has already claim a fixed frequency.
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if (variable_frequency) {
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return PWMOUT_VARIABLE_FREQUENCY_NOT_AVAILABLE;
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}
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2019-11-02 11:52:26 -04:00
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2023-02-17 19:13:18 -05:00
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// Another pin is already using this output.
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if ((flexpwm->OUTEN & outen_mask) != 0) {
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return PWMOUT_ALL_TIMERS_ON_PIN_IN_USE;
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2022-04-16 12:00:45 -04:00
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}
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2023-02-17 19:13:18 -05:00
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if (frequency != _pwm_sm_frequencies[flexpwm_index][submodule]) {
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return PWMOUT_INVALID_FREQUENCY_ON_PIN;
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}
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2019-11-02 11:52:26 -04:00
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2023-02-17 19:13:18 -05:00
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// Submodule is already running at our target frequency and the output
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// is free.
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} else {
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pwm_config_t pwmConfig;
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/*
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* pwmConfig.enableDebugMode = false;
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* pwmConfig.enableWait = false;
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* pwmConfig.reloadSelect = kPWM_LocalReload;
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* pwmConfig.faultFilterCount = 0;
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* pwmConfig.faultFilterPeriod = 0;
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* pwmConfig.clockSource = kPWM_BusClock;
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* pwmConfig.prescale = kPWM_Prescale_Divide_1;
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* pwmConfig.initializationControl = kPWM_Initialize_LocalSync;
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* pwmConfig.forceTrigger = kPWM_Force_Local;
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* pwmConfig.reloadFrequency = kPWM_LoadEveryOportunity;
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* pwmConfig.reloadLogic = kPWM_ReloadImmediate;
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* pwmConfig.pairOperation = kPWM_Independent;
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*/
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PWM_GetDefaultConfig(&pwmConfig);
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pwmConfig.reloadLogic = kPWM_ReloadPwmFullCycle;
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pwmConfig.enableWait = true;
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pwmConfig.enableDebugMode = true;
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pwmConfig.prescale = self->prescaler;
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if (PWM_Init(flexpwm, submodule, &pwmConfig) != kStatus_Success) {
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return PWMOUT_INITIALIZATION_ERROR;
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}
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2019-11-02 11:52:26 -04:00
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2023-02-17 19:13:18 -05:00
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// Disable all fault inputs
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flexpwm->SM[submodule].DISMAP[0] = 0;
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PWM_SetPwmLdok(flexpwm, sm_mask, false);
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flexpwm->SM[submodule].CTRL = PWM_CTRL_FULL_MASK | PWM_CTRL_PRSC(self->prescaler);
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flexpwm->SM[submodule].CTRL2 = PWM_CTRL2_INDEP_MASK | PWM_CTRL2_WAITEN_MASK | PWM_CTRL2_DBGEN_MASK;
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// Set the reload value to zero so we're in unsigned mode.
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flexpwm->SM[submodule].INIT = 0;
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// Set the top/reload value.
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flexpwm->SM[submodule].VAL1 = self->pulse_count;
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// Clear the other channels.
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flexpwm->SM[submodule].VAL0 = 0;
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flexpwm->SM[submodule].VAL2 = 0;
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flexpwm->SM[submodule].VAL3 = 0;
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flexpwm->SM[submodule].VAL4 = 0;
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flexpwm->SM[submodule].VAL5 = 0;
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PWM_SetPwmLdok(flexpwm, sm_mask, true);
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PWM_StartTimer(flexpwm, sm_mask);
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_pwm_sm_frequencies[flexpwm_index][submodule] = frequency;
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if (variable_frequency) {
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_pwm_variable_frequency[flexpwm_index] = sm_mask;
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}
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}
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2019-11-02 11:52:26 -04:00
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2020-08-18 16:08:33 -04:00
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common_hal_pwmio_pwmout_set_duty_cycle(self, duty);
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2019-11-02 11:52:26 -04:00
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2023-02-17 19:13:18 -05:00
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flexpwm->OUTEN |= outen_mask;
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// Configure the IOMUX once we know everything else is working.
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config_periph_pin(self->pwm);
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2019-11-02 11:52:26 -04:00
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return PWMOUT_OK;
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}
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2021-03-15 09:57:36 -04:00
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bool common_hal_pwmio_pwmout_deinited(pwmio_pwmout_obj_t *self) {
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2019-11-02 11:52:26 -04:00
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return self->pin == NULL;
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}
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2021-03-15 09:57:36 -04:00
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void common_hal_pwmio_pwmout_deinit(pwmio_pwmout_obj_t *self) {
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2020-08-18 16:08:33 -04:00
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if (common_hal_pwmio_pwmout_deinited(self)) {
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2019-11-02 11:52:26 -04:00
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return;
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}
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2023-02-17 19:13:18 -05:00
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_pwm_never_reset[self->flexpwm_index] &= ~(1 << (self->pwm->submodule * 4 + self->pwm->channel));
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PWM_Type *flexpwm = self->pwm->pwm;
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pwm_submodule_t submodule = self->pwm->submodule;
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uint16_t sm_mask = 1 << submodule;
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// Reset the pin before we turn it off.
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2021-04-01 10:37:39 -04:00
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common_hal_reset_pin(self->pin);
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2019-11-02 11:52:26 -04:00
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self->pin = NULL;
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2023-02-17 19:13:18 -05:00
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// Always disable the output.
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flexpwm->OUTEN &= ~_outen_mask(submodule, self->pwm->channel);
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uint16_t all_sm_channels = _outen_mask(submodule, kPWM_PwmX) | _outen_mask(submodule, kPWM_PwmA) | _outen_mask(submodule, kPWM_PwmB);
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// Turn off the submodule if it doesn't have any outputs active.
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if ((flexpwm->OUTEN & all_sm_channels) == 0) {
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// Deinit ourselves because the SDK turns off the clock to the whole FlexPWM on deinit.
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flexpwm->MCTRL &= ~(sm_mask << PWM_MCTRL_RUN_SHIFT);
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_pwm_variable_frequency[self->flexpwm_index] &= ~sm_mask;
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_pwm_sm_frequencies[self->flexpwm_index][submodule] = 0;
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}
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_maybe_disable_clock(self->flexpwm_index);
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2019-11-02 11:52:26 -04:00
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}
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2020-08-18 16:08:33 -04:00
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void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t *self, uint16_t duty) {
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2021-04-01 10:37:39 -04:00
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// we do not use PWM_UpdatePwmDutycycle because ...
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// * it works in integer percents
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// * it can't set the "X" duty cycle
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2022-04-16 12:00:45 -04:00
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// As mentioned in the setting up of the frequency code
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// A - Uses VAL2 to turn on (0) and VAL3=duty to turn off
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// B - Uses VAL4 to turn on (0) and VAL5 to turn off
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2022-04-22 12:15:01 -04:00
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// X - As mentioned above VAL1 turns off, but it's set to the timing for frequency. so
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2022-04-16 12:00:45 -04:00
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// VAL0 turns on, so we set it to VAL1 - duty
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2021-04-01 10:37:39 -04:00
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self->duty_cycle = duty;
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2022-04-16 12:00:45 -04:00
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PWM_Type *base = self->pwm->pwm;
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2023-02-17 19:13:18 -05:00
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uint8_t sm_mask = 1 << self->pwm->submodule;
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uint16_t duty_scaled;
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2021-04-01 14:04:06 -04:00
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if (duty == 65535) {
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2023-02-17 19:13:18 -05:00
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// X channels can't do a full 100% duty cycle.
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if (self->pwm->channel == kPWM_PwmX) {
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mp_raise_ValueError_varg(translate("Invalid %q"), MP_QSTR_duty_cycle);
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}
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duty_scaled = self->pulse_count + 1;
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2021-04-01 14:04:06 -04:00
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} else {
|
2023-02-17 19:13:18 -05:00
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duty_scaled = ((uint32_t)duty * self->pulse_count) / 65535;
|
2021-04-01 14:04:06 -04:00
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}
|
2023-02-17 19:13:18 -05:00
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PWM_SetPwmLdok(self->pwm->pwm, sm_mask, false);
|
2021-04-01 10:37:39 -04:00
|
|
|
switch (self->pwm->channel) {
|
|
|
|
case kPWM_PwmX:
|
2023-02-17 19:13:18 -05:00
|
|
|
// PWM X Signals always having a falling edge at the reload value. (Otherwise we'd
|
|
|
|
// change the PWM frequency.) So, we adjust the rising edge to get the correct duty
|
|
|
|
// cycle.
|
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|
base->SM[self->pwm->submodule].VAL0 = self->pulse_count - duty_scaled;
|
2021-04-01 10:37:39 -04:00
|
|
|
break;
|
|
|
|
case kPWM_PwmA:
|
2023-02-17 19:13:18 -05:00
|
|
|
// The other two channels always have their rising edge at 0 and vary their falling
|
|
|
|
// edge.
|
|
|
|
base->SM[self->pwm->submodule].VAL3 = duty_scaled;
|
2021-04-01 10:37:39 -04:00
|
|
|
break;
|
|
|
|
case kPWM_PwmB:
|
2023-02-17 19:13:18 -05:00
|
|
|
base->SM[self->pwm->submodule].VAL5 = duty_scaled;
|
2021-04-01 10:37:39 -04:00
|
|
|
}
|
2023-02-17 19:13:18 -05:00
|
|
|
PWM_SetPwmLdok(self->pwm->pwm, sm_mask, true);
|
2019-11-02 11:52:26 -04:00
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
uint16_t common_hal_pwmio_pwmout_get_duty_cycle(pwmio_pwmout_obj_t *self) {
|
2023-02-17 19:13:18 -05:00
|
|
|
return self->duty_cycle;
|
2019-11-02 11:52:26 -04:00
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t *self,
|
|
|
|
uint32_t frequency) {
|
2019-11-02 11:52:26 -04:00
|
|
|
|
2021-04-01 14:04:06 -04:00
|
|
|
int pulse_count = calculate_pulse_count(frequency, &self->prescaler);
|
|
|
|
if (pulse_count == 0) {
|
2022-05-13 15:33:43 -04:00
|
|
|
mp_arg_error_invalid(MP_QSTR_frequency);
|
2021-04-01 10:37:39 -04:00
|
|
|
}
|
|
|
|
|
2021-04-01 14:04:06 -04:00
|
|
|
self->pulse_count = pulse_count;
|
2021-04-01 10:37:39 -04:00
|
|
|
|
2021-04-01 14:04:06 -04:00
|
|
|
// a small glitch can occur when adjusting the prescaler, from the setting
|
|
|
|
// of CTRL just below to the setting of the Ldok register in
|
|
|
|
// set_duty_cycle.
|
2023-02-17 19:13:18 -05:00
|
|
|
// Clear LDOK so that we can update the values.
|
|
|
|
PWM_SetPwmLdok(self->pwm->pwm, 1 << self->pwm->submodule, false);
|
2021-04-01 14:04:06 -04:00
|
|
|
uint32_t reg = self->pwm->pwm->SM[self->pwm->submodule].CTRL;
|
|
|
|
reg &= ~(PWM_CTRL_PRSC_MASK);
|
|
|
|
reg |= PWM_CTRL_PRSC(self->prescaler);
|
|
|
|
self->pwm->pwm->SM[self->pwm->submodule].CTRL = reg;
|
2021-04-01 10:37:39 -04:00
|
|
|
self->pwm->pwm->SM[self->pwm->submodule].VAL1 = self->pulse_count;
|
2021-04-01 14:04:06 -04:00
|
|
|
|
|
|
|
// we need to recalculate the duty cycle. As a side effect of this
|
2021-04-01 10:37:39 -04:00
|
|
|
common_hal_pwmio_pwmout_set_duty_cycle(self, self->duty_cycle);
|
2019-11-02 11:52:26 -04:00
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
uint32_t common_hal_pwmio_pwmout_get_frequency(pwmio_pwmout_obj_t *self) {
|
2021-04-30 11:47:37 -04:00
|
|
|
return PWM_SRC_CLK_FREQ / self->pulse_count / (1 << self->prescaler);
|
2019-11-02 11:52:26 -04:00
|
|
|
}
|
|
|
|
|
2021-03-15 09:57:36 -04:00
|
|
|
bool common_hal_pwmio_pwmout_get_variable_frequency(pwmio_pwmout_obj_t *self) {
|
2019-11-02 11:52:26 -04:00
|
|
|
return self->variable_frequency;
|
|
|
|
}
|
2021-07-21 19:27:09 -04:00
|
|
|
|
|
|
|
const mcu_pin_obj_t *common_hal_pwmio_pwmout_get_pin(pwmio_pwmout_obj_t *self) {
|
|
|
|
return self->pin;
|
|
|
|
}
|