2016-11-03 18:50:59 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Scott Shawcroft
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2016-11-30 18:08:34 -05:00
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#include "shared-bindings/microcontroller/__init__.h"
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2017-04-10 16:32:19 -04:00
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#include "common-hal/busio/SPI.h"
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2016-11-03 18:50:59 -04:00
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#include "py/nlr.h"
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#include "eagle_soc.h"
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2017-10-25 02:05:20 -04:00
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#include "ets_alt_task.h"
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2016-12-06 13:31:38 -05:00
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#include "c_types.h"
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#include "gpio.h"
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2017-10-25 02:05:20 -04:00
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#include "hspi.h"
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2016-11-03 18:50:59 -04:00
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extern const mcu_pin_obj_t pin_MTMS;
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extern const mcu_pin_obj_t pin_MTCK;
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extern const mcu_pin_obj_t pin_MTDI;
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2018-06-15 01:03:52 -04:00
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void busio_spi_init_gpio(uint8_t sysclk_as_spiclk, const mcu_pin_obj_t * clock,
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const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) {
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2017-02-19 07:15:23 -05:00
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uint32_t clock_div_flag = 0;
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2018-06-15 01:03:52 -04:00
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if (sysclk_as_spiclk) {
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clock_div_flag = 0x0001;
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}
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// Set bit 9 if 80MHz sysclock required
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WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105 | (clock_div_flag<<9));
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// GPIO12 is HSPI MISO pin (Master Data In)
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if (miso == &pin_MTDI) {
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);
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}
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// GPIO13 is HSPI MOSI pin (Master Data Out)
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if (mosi == &pin_MTCK) {
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);
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}
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// GPIO14 is HSPI CLK pin (Clock)
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);
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}
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void common_hal_busio_spi_construct(busio_spi_obj_t *self,
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const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi,
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const mcu_pin_obj_t * miso) {
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if (clock != &pin_MTMS || !((mosi == &pin_MTCK && miso == MP_OBJ_TO_PTR(mp_const_none)) ||
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(mosi == MP_OBJ_TO_PTR(mp_const_none) && miso == &pin_MTDI) ||
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(mosi == &pin_MTCK && miso == &pin_MTDI))) {
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_OSError,
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"Pins not valid for SPI"));
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}
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busio_spi_init_gpio(SPI_CLK_USE_DIV, clock, mosi, miso);
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self->clock = clock;
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self->mosi = mosi;
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self->miso = miso;
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spi_clock(HSPI, SPI_CLK_PREDIV, SPI_CLK_CNTDIV);
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2018-01-29 22:52:23 -05:00
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self->frequency = SPI_CLK_FREQ;
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spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW);
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spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW);
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SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CS_SETUP|SPI_CS_HOLD);
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CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_FLASH_MODE);
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2016-11-03 18:50:59 -04:00
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}
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2017-10-02 20:49:40 -04:00
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bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) {
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return self->deinited;
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}
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2017-04-10 16:32:19 -04:00
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void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
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if (common_hal_busio_spi_deinited(self)) {
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return;
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}
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2016-11-03 18:50:59 -04:00
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 0);
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2016-12-06 13:31:38 -05:00
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTDI_U);
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2016-11-03 18:50:59 -04:00
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 0);
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2016-12-06 13:31:38 -05:00
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTCK_U);
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2016-11-03 18:50:59 -04:00
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 0);
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2016-12-06 13:31:38 -05:00
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTMS_U);
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// Turn off outputs 12 - 14.
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gpio_output_set(0x0, 0x0, 0x0, 0x7 << 12);
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2017-10-02 20:49:40 -04:00
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self->deinited = true;
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2016-11-03 18:50:59 -04:00
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}
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2017-04-10 16:32:19 -04:00
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bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
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uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
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if (bits != 8) {
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return false;
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}
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if (baudrate == 80000000L) {
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// Special case for full speed.
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2018-06-15 01:03:52 -04:00
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busio_spi_init_gpio(SPI_CLK_80MHZ_NODIV, self->clock, self->mosi, self->miso);
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2016-11-30 18:08:34 -05:00
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spi_clock(HSPI, 0, 0);
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self->frequency = 80000000L;
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2016-11-30 18:08:34 -05:00
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} else if (baudrate > 40000000L) {
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return false;
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} else {
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uint32_t divider = 40000000L / baudrate;
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uint16_t prediv = MIN(divider, SPI_CLKDIV_PRE + 1);
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uint16_t cntdiv = (divider / prediv) * 2; // cntdiv has to be even
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if (cntdiv > SPI_CLKCNT_N + 1 || cntdiv == 0 || prediv == 0) {
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return false;
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}
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2018-06-15 01:03:52 -04:00
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busio_spi_init_gpio(SPI_CLK_USE_DIV, self->clock, self->mosi, self->miso);
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spi_clock(HSPI, prediv, cntdiv);
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self->frequency = 80000000L / (prediv * cntdiv);
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2016-11-30 18:08:34 -05:00
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}
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spi_mode(HSPI, phase, polarity);
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return true;
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}
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2017-04-10 16:32:19 -04:00
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bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
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2016-11-30 18:08:34 -05:00
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bool success = false;
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common_hal_mcu_disable_interrupts();
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if (!self->locked) {
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self->locked = true;
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success = true;
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}
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common_hal_mcu_enable_interrupts();
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return success;
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}
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2017-04-10 16:32:19 -04:00
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bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) {
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return self->locked;
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}
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2017-04-10 16:32:19 -04:00
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void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
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2016-11-30 18:08:34 -05:00
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self->locked = false;
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}
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2017-04-10 16:32:19 -04:00
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bool common_hal_busio_spi_write(busio_spi_obj_t *self,
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const uint8_t * data, size_t len) {
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size_t chunk_size = 1024;
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size_t count = len / chunk_size;
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size_t i = 0;
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for (size_t j = 0; j < count; ++j) {
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for (size_t k = 0; k < chunk_size; ++k) {
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spi_tx8fast(HSPI, data[i]);
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++i;
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}
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ets_loop_iter();
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}
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while (i < len) {
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spi_tx8fast(HSPI, data[i]);
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++i;
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}
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2017-02-15 11:25:41 -05:00
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while (spi_busy(HSPI)) {}; // Wait for SPI to finish the last byte.
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2016-11-03 18:50:59 -04:00
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return true;
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}
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2017-04-10 16:32:19 -04:00
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bool common_hal_busio_spi_read(busio_spi_obj_t *self,
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2017-01-20 19:52:53 -05:00
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uint8_t * data, size_t len, uint8_t write_value) {
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2016-11-03 18:50:59 -04:00
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// Process data in chunks, let the pending tasks run in between
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size_t chunk_size = 1024; // TODO this should depend on baudrate
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size_t count = len / chunk_size;
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size_t i = 0;
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2017-01-20 19:52:53 -05:00
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uint32_t long_write_value = ((uint32_t) write_value) << 24 |
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write_value << 16 |
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write_value << 8 |
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write_value;
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2016-11-03 18:50:59 -04:00
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for (size_t j = 0; j < count; ++j) {
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for (size_t k = 0; k < chunk_size; ++k) {
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2017-10-23 12:29:17 -04:00
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data[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, long_write_value, 8, 0);
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2016-11-03 18:50:59 -04:00
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++i;
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}
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ets_loop_iter();
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}
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while (i < len) {
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2017-10-23 12:29:17 -04:00
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data[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, long_write_value, 8, 0);
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2016-11-03 18:50:59 -04:00
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++i;
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}
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return true;
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}
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2018-01-02 21:25:41 -05:00
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) {
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// Process data in chunks, let the pending tasks run in between
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size_t chunk_size = 1024; // TODO this should depend on baudrate
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size_t count = len / chunk_size;
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size_t i = 0;
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for (size_t j = 0; j < count; ++j) {
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for (size_t k = 0; k < chunk_size; ++k) {
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data_in[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, data_out[i], 8, 0);
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++i;
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}
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ets_loop_iter();
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}
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while (i < len) {
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data_in[i] = spi_transaction(HSPI, 0, 0, 0, 0, 8, data_out[i], 8, 0);
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++i;
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}
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return true;
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}
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2018-01-29 22:52:23 -05:00
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uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) {
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return self->frequency;
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}
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