2022-04-28 21:49:44 -04:00
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/*
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* The MIT License (MIT)
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*
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2023-05-01 09:48:52 -04:00
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* Copyright (c) 2021-2023 Renesas Electronics Corporation
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2022-04-28 21:49:44 -04:00
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef RA_RA_UTILS_H_
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#define RA_RA_UTILS_H_
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#include <stdint.h>
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#include <stdbool.h>
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__attribute__((always_inline)) static inline void ra_enable_irq(__attribute__((unused)) uint32_t state) {
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__asm__ volatile ("cpsie f"
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:
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:
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: "memory");
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}
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__attribute__((always_inline)) static inline uint32_t ra_disable_irq(void) {
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uint32_t state;
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__asm__ volatile ("cpsid f"
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: "=r" (state)
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:
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: "memory");
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return state;
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}
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void ra_mstpcra_stop(uint32_t mod_mask);
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void ra_mstpcra_start(uint32_t mod_mask);
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void ra_mstpcrb_stop(uint32_t mod_mask);
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void ra_mstpcrb_start(uint32_t mod_mask);
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void ra_mstpcrc_stop(uint32_t mod_mask);
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void ra_mstpcrc_start(uint32_t mod_mask);
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void ra_mstpcrd_stop(uint32_t mod_mask);
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void ra_mstpcrd_start(uint32_t mod_mask);
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2023-03-02 11:08:31 -05:00
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void ra_mstpcre_stop(uint32_t mod_mask);
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void ra_mstpcre_start(uint32_t mod_mask);
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2022-04-28 21:49:44 -04:00
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2023-05-01 09:48:52 -04:00
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/* mask bit definition for Module Stop Control Register B */
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#ifndef R_MSTP_MSTPCRB_MSTPB7_Msk
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#define R_MSTP_MSTPCRB_MSTPB7_Msk (0x1UL << 7)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB8_Msk
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#define R_MSTP_MSTPCRB_MSTPB8_Msk (0x1UL << 8)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB9_Msk
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#define R_MSTP_MSTPCRB_MSTPB9_Msk (0x1UL << 9)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB18_Msk
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#define R_MSTP_MSTPCRB_MSTPB18_Msk (0x1UL << 18)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB19_Msk
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#define R_MSTP_MSTPCRB_MSTPB19_Msk (0x1UL << 19)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB22_Msk
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#define R_MSTP_MSTPCRB_MSTPB22_Msk (0x1UL << 22)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB23_Msk
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#define R_MSTP_MSTPCRB_MSTPB23_Msk (0x1UL << 23)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB24_Msk
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#define R_MSTP_MSTPCRB_MSTPB24_Msk (0x1UL << 24)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB25_Msk
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#define R_MSTP_MSTPCRB_MSTPB25_Msk (0x1UL << 25)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB26_Msk
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#define R_MSTP_MSTPCRB_MSTPB26_Msk (0x1UL << 26)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB27_Msk
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#define R_MSTP_MSTPCRB_MSTPB27_Msk (0x1UL << 27)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB28_Msk
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#define R_MSTP_MSTPCRB_MSTPB28_Msk (0x1UL << 28)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB29_Msk
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#define R_MSTP_MSTPCRB_MSTPB29_Msk (0x1UL << 29)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB30_Msk
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#define R_MSTP_MSTPCRB_MSTPB30_Msk (0x1UL << 30)
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#endif
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#ifndef R_MSTP_MSTPCRB_MSTPB31_Msk
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#define R_MSTP_MSTPCRB_MSTPB31_Msk (0x1UL << 31)
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#endif
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/* mask bit definition for Module Stop Control Register D */
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#ifndef R_MSTP_MSTPCRD_MSTPD2_Msk
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#define R_MSTP_MSTPCRD_MSTPD2_Msk (0x1UL << 2)
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#endif
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#ifndef R_MSTP_MSTPCRD_MSTPD3_Msk
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#define R_MSTP_MSTPCRD_MSTPD3_Msk (0x1UL << 3)
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#endif
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#ifndef R_MSTP_MSTPCRD_MSTPD5_Msk
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#define R_MSTP_MSTPCRD_MSTPD5_Msk (0x1UL << 5)
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#endif
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#ifndef R_MSTP_MSTPCRD_MSTPD6_Msk
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#define R_MSTP_MSTPCRD_MSTPD6_Msk (0x1UL << 6)
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#endif
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#ifndef R_MSTP_MSTPCRD_MSTPD15_Msk
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#define R_MSTP_MSTPCRD_MSTPD15_Msk (0x1UL << 15)
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#endif
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#ifndef R_MSTP_MSTPCRD_MSTPD16_Msk
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#define R_MSTP_MSTPCRD_MSTPD16_Msk (0x1UL << 16)
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#endif
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#ifndef R_MSTP_MSTPCRD_MSTPD20_Msk
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#define R_MSTP_MSTPCRD_MSTPD20_Msk (0x1UL << 20)
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#endif
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#ifndef R_MSTP_MSTPCRD_MSTPD22_Msk
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#define R_MSTP_MSTPCRD_MSTPD22_Msk (0x1UL << 22)
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#endif
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2022-04-28 21:49:44 -04:00
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#endif /* RA_RA_UTILS_H_ */
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