circuitpython/ports/stm32/boards/NUCLEO_F767ZI/pins.csv

A0,PA3
A1,PC0
A2,PC3
A3,PF3
A4,PF5
A5,PF10
A6,PB1
A7,PC2
A8,PF4
D0,PG9
D1,PG14
D2,PF15
D3,PE13
D4,PF14
D5,PE11
D6,PE9
D7,PF13
D8,PF12
D9,PD15
D10,PD14
D11,PA7
D12,PA6
D13,PA5
D14,PB9
D15,PB8
D16,PC6
D17,PB15
D18,PB13
D19,PB12
D20,PA15
D21,PC7
D22,PB5
D23,PB3
D24,PA4
D25,PB4
D26,PB6
D27,PB2
D28,PD13
D29,PD12
D30,PD11
D31,PE2
D32,PA0
D33,PB0
D34,PE0
D35,PB11
D36,PB10
D37,PE15
D38,PE14
D39,PE12
D40,PE10
D41,PE7
D42,PE8
D43,PC8
D44,PC9
D45,PC10
D46,PC11
D47,PC12
D48,PD2
D49,PG2
D50,PG3
D51,PD7
D52,PD6
D53,PD5
D54,PD4
D55,PD3
D56,PE2
D57,PE4
D58,PE5
D59,PE6
D60,PE3
D61,PF8
D62,PF7
D63,PF9
D64,PG1
D65,PG0
D66,PD1
D67,PD0
D68,PF0
D69,PF1
D70,PF2
D71,PA7
DAC1,PA4
DAC2,PA5
LED1,PB0
LED2,PB7
LED3,PB14
SW,PC13
SD_D0,PC8
SD_D1,PC9
SD_D2,PC10
SD_D3,PC11
SD_CMD,PD2
SD_CK,PC12
SD_SW,PG2
OTG_FS_POWER,PG6
OTG_FS_OVER_CURRENT,PG7
USB_VBUS,PA9
USB_ID,PA10
USB_DM,PA11
USB_DP,PA12
UART2_TX,PD5
UART2_RX,PD6
UART2_RTS,PD4
UART2_CTS,PD3
VCP_TX,PD8
VCP_RX,PD9
UART3_TX,PD8
UART3_RX,PD9
UART5_TX,PB6
UART5_RX,PB12
UART6_TX,PC6
UART6_RX,PC7
UART7_TX,PF7
UART7_RX,PF6
UART8_TX,PE1
UART8_RX,PE0
SPI3_NSS,PA4
SPI3_SCK,PB3
SPI3_MISO,PB4
SPI3_MOSI,PB5
I2C1_SDA,PB9
I2C1_SCL,PB8
I2C2_SDA,PF0
I2C2_SCL,PF1
I2C4_SCL,PF14
I2C4_SDA,PF15
ETH_MDC,PC1
ETH_MDIO,PA2
ETH_RMII_REF_CLK,PA1
ETH_RMII_CRS_DV,PA7
ETH_RMII_RXD0,PC4
ETH_RMII_RXD1,PC5
ETH_RMII_TX_EN,PG11
ETH_RMII_TXD0,PG13
ETH_RMII_TXD1,PB13
SWDIO,PA13
SWDCLK,PA14
stmhal/board: Fix existing and add more pin defs for NUCLEO_F767ZI. 2017-03-27 21:42:23 -04:00			`A0,PA3`
			`A1,PC0`
			`A2,PC3`
			`A3,PF3`
			`A4,PF5`
			`A5,PF10`
stm32/boards/NUCLEO_F767ZI: Update pins list to include 3 extra pins. 2018-03-05 03:55:41 -05:00			`A6,PB1`
			`A7,PC2`
			`A8,PF4`
stmhal/board: Fix existing and add more pin defs for NUCLEO_F767ZI. 2017-03-27 21:42:23 -04:00			`D0,PG9`
			`D1,PG14`
			`D2,PF15`
			`D3,PE13`
			`D4,PF14`
			`D5,PE11`
			`D6,PE9`
			`D7,PF13`
			`D8,PF12`
			`D9,PD15`
			`D10,PD14`
			`D11,PA7`
			`D12,PA6`
			`D13,PA5`
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7. 2016-12-12 00:41:38 -05:00			`D14,PB9`
			`D15,PB8`
stmhal/board: Fix existing and add more pin defs for NUCLEO_F767ZI. 2017-03-27 21:42:23 -04:00			`D16,PC6`
			`D17,PB15`
			`D18,PB13`
			`D19,PB12`
			`D20,PA15`
			`D21,PC7`
			`D22,PB5`
			`D23,PB3`
			`D24,PA4`
			`D25,PB4`
stm32/boards/NUCLEO_F767ZI: Update pins, peripherals and total flash. - Removed remarks on DFU/OCD in mpconfigboard.h because deploy-stlink works fine too. - Added more UARTs, I2C, corrected SPI, CAN, etc; verified against CubeMX. - Adapted pins.csv to remove errors, add omissions, etc. according to NUCLEO-144 User Manual. - Changed linker file stm32f767.ld to reflect correct size of the Flash. - Tested with LAN and SD card. 2019-12-11 05:43:47 -05:00			`D26,PB6`
			`D27,PB2`
			`D28,PD13`
			`D29,PD12`
			`D30,PD11`
			`D31,PE2`
			`D32,PA0`
			`D33,PB0`
			`D34,PE0`
			`D35,PB11`
			`D36,PB10`
			`D37,PE15`
			`D38,PE14`
			`D39,PE12`
			`D40,PE10`
			`D41,PE7`
			`D42,PE8`
			`D43,PC8`
			`D44,PC9`
			`D45,PC10`
			`D46,PC11`
			`D47,PC12`
			`D48,PD2`
			`D49,PG2`
			`D50,PG3`
			`D51,PD7`
			`D52,PD6`
			`D53,PD5`
			`D54,PD4`
			`D55,PD3`
			`D56,PE2`
			`D57,PE4`
			`D58,PE5`
			`D59,PE6`
			`D60,PE3`
			`D61,PF8`
			`D62,PF7`
			`D63,PF9`
			`D64,PG1`
			`D65,PG0`
			`D66,PD1`
			`D67,PD0`
			`D68,PF0`
			`D69,PF1`
			`D70,PF2`
			`D71,PA7`
			`DAC1,PA4`
			`DAC2,PA5`
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7. 2016-12-12 00:41:38 -05:00			`LED1,PB0`
			`LED2,PB7`
			`LED3,PB14`
			`SW,PC13`
stm32/boards/NUCLEO_F767ZI: Add pins and config for using an SD card. The Nucleo board does not have an SD card slot but does have the requisite pins next to each other and labelled, so provide the configuration for convenience. 2019-12-09 08:53:48 -05:00			`SD_D0,PC8`
			`SD_D1,PC9`
			`SD_D2,PC10`
			`SD_D3,PC11`
			`SD_CMD,PD2`
			`SD_CK,PC12`
			`SD_SW,PG2`
stm32/boards/NUCLEO_F767ZI: Update pins, peripherals and total flash. - Removed remarks on DFU/OCD in mpconfigboard.h because deploy-stlink works fine too. - Added more UARTs, I2C, corrected SPI, CAN, etc; verified against CubeMX. - Adapted pins.csv to remove errors, add omissions, etc. according to NUCLEO-144 User Manual. - Changed linker file stm32f767.ld to reflect correct size of the Flash. - Tested with LAN and SD card. 2019-12-11 05:43:47 -05:00			`OTG_FS_POWER,PG6`
			`OTG_FS_OVER_CURRENT,PG7`
stm32/boards: Update pins.csv to include USB pins where needed. 2018-05-01 03:38:51 -04:00			`USB_VBUS,PA9`
stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7. 2016-12-12 00:41:38 -05:00			`USB_ID,PA10`
			`USB_DM,PA11`
			`USB_DP,PA12`
			`UART2_TX,PD5`
			`UART2_RX,PD6`
			`UART2_RTS,PD4`
			`UART2_CTS,PD3`
stm32/boards/NUCLEO_F767ZI: Update pins, peripherals and total flash. - Removed remarks on DFU/OCD in mpconfigboard.h because deploy-stlink works fine too. - Added more UARTs, I2C, corrected SPI, CAN, etc; verified against CubeMX. - Adapted pins.csv to remove errors, add omissions, etc. according to NUCLEO-144 User Manual. - Changed linker file stm32f767.ld to reflect correct size of the Flash. - Tested with LAN and SD card. 2019-12-11 05:43:47 -05:00			`VCP_TX,PD8`
			`VCP_RX,PD9`
			`UART3_TX,PD8`
			`UART3_RX,PD9`
			`UART5_TX,PB6`
			`UART5_RX,PB12`
			`UART6_TX,PC6`
			`UART6_RX,PC7`
			`UART7_TX,PF7`
			`UART7_RX,PF6`
			`UART8_TX,PE1`
			`UART8_RX,PE0`
			`SPI3_NSS,PA4`
			`SPI3_SCK,PB3`
			`SPI3_MISO,PB4`
			`SPI3_MOSI,PB5`
			`I2C1_SDA,PB9`
			`I2C1_SCL,PB8`
			`I2C2_SDA,PF0`
			`I2C2_SCL,PF1`
			`I2C4_SCL,PF14`
			`I2C4_SDA,PF15`
stm32/boards/NUCLEO_F767ZI: Enable lwIP and Ethernet peripheral. 2019-02-22 06:26:54 -05:00			`ETH_MDC,PC1`
			`ETH_MDIO,PA2`
			`ETH_RMII_REF_CLK,PA1`
			`ETH_RMII_CRS_DV,PA7`
			`ETH_RMII_RXD0,PC4`
			`ETH_RMII_RXD1,PC5`
			`ETH_RMII_TX_EN,PG11`
			`ETH_RMII_TXD0,PG13`
			`ETH_RMII_TXD1,PB13`
stm32/boards/NUCLEO_F767ZI: Update pins, peripherals and total flash. - Removed remarks on DFU/OCD in mpconfigboard.h because deploy-stlink works fine too. - Added more UARTs, I2C, corrected SPI, CAN, etc; verified against CubeMX. - Adapted pins.csv to remove errors, add omissions, etc. according to NUCLEO-144 User Manual. - Changed linker file stm32f767.ld to reflect correct size of the Flash. - Tested with LAN and SD card. 2019-12-11 05:43:47 -05:00			`SWDIO,PA13`
			`SWDCLK,PA14`