stmhal: Add NUCLEO_F767ZI board, with openocd config for stm32f7.
This commit is contained in:
Rami Ali
Damien George
parent
517f347f6f
commit
e9fbc555fc
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// This board is only confirmed to operate using DFU mode and openocd.
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// DFU mode can be accessed by setting BOOT0 (see schematics)
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// To use openocd run "OPENOCD_CONFIG=boards/openocd_stm32f7.cfg" in
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// the make command.
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#define MICROPY_HW_BOARD_NAME "NUCLEO-F767ZI"
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#define MICROPY_HW_MCU_NAME "STM32F767"
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#define MICROPY_HW_HAS_SWITCH (1)
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#define MICROPY_HW_HAS_FLASH (1)
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#define MICROPY_HW_HAS_SDCARD (0)
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#define MICROPY_HW_HAS_MMA7660 (0)
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#define MICROPY_HW_HAS_LIS3DSH (0)
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#define MICROPY_HW_HAS_LCD (0)
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#define MICROPY_HW_ENABLE_RNG (1)
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#define MICROPY_HW_ENABLE_RTC (1)
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#define MICROPY_HW_ENABLE_TIMER (1)
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#define MICROPY_HW_ENABLE_SERVO (0)
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#define MICROPY_HW_ENABLE_DAC (0)
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#define MICROPY_HW_ENABLE_CAN (1)
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// HSE is 25MHz
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// VCOClock = HSE * PLLN / PLLM = 25 MHz * 432 / 25 = 432 MHz
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// SYSCLK = VCOClock / PLLP = 432 MHz / 2 = 216 MHz
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// USB/SDMMC/RNG Clock = VCOClock / PLLQ = 432 MHz / 9 = 48 MHz
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#define MICROPY_HW_CLK_PLLM (4)
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#define MICROPY_HW_CLK_PLLN (216)
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#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
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#define MICROPY_HW_CLK_PLLQ (9)
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// From the reference manual, for 2.7V to 3.6V
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// 151-180 MHz => 5 wait states
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// 181-210 MHz => 6 wait states
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// 211-216 MHz => 7 wait states
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#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_7 // 210-216 MHz needs 7 wait states
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// UART config
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#define MICROPY_HW_UART2_TX (pin_D5)
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#define MICROPY_HW_UART2_RX (pin_D6)
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#define MICROPY_HW_UART2_RTS (pin_D4)
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#define MICROPY_HW_UART2_CTS (pin_D3)
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#define MICROPY_HW_UART3_TX (pin_D8)
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#define MICROPY_HW_UART3_RX (pin_D9)
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#define MICROPY_HW_UART6_TX (pin_G14)
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#define MICROPY_HW_UART6_RX (pin_G9)
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#define MICROPY_HW_UART_REPL PYB_UART_3
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#define MICROPY_HW_UART_REPL_BAUD 115200
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// I2C busses
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#define MICROPY_HW_I2C1_SCL (pin_B8)
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#define MICROPY_HW_I2C1_SDA (pin_B9)
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#define MICROPY_HW_I2C3_SCL (pin_H7)
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#define MICROPY_HW_I2C3_SDA (pin_H8)
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// TODO These should go in i2c.c
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#define MICROPY_HW_I2C_BAUDRATE_TIMING {{100000, 0x40912732}}
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#define MICROPY_HW_I2C_BAUDRATE_DEFAULT 100000
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#define MICROPY_HW_I2C_BAUDRATE_MAX 100000
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// SPI
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#define MICROPY_HW_SPI3_NSS (pin_A4)
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#define MICROPY_HW_SPI3_SCK (pin_B3)
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#define MICROPY_HW_SPI3_MISO (pin_B4)
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#define MICROPY_HW_SPI3_MOSI (pin_B5)
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// USRSW is pulled low. Pressing the button makes the input go high.
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#define MICROPY_HW_USRSW_PIN (pin_C13)
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#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
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#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING)
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#define MICROPY_HW_USRSW_PRESSED (1)
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// LEDs
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#define MICROPY_HW_LED1 (pin_B0) // green
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#define MICROPY_HW_LED2 (pin_B7) // blue
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#define MICROPY_HW_LED3 (pin_B14) // red
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#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
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#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
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// USB config (CN13 - USB OTG FS)
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#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9)
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#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10)
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MCU_SERIES = f7
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CMSIS_MCU = STM32F767xx
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AF_FILE = boards/stm32f767_af.csv
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LD_FILE = boards/stm32f767.ld
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A0,PA0
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A1,PF10
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A2,PF9
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A3,PF8
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A4,PF7
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A5,PF6
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D0,PC7
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D1,PC6
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D2,PG6
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D3,PB4
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D4,PG7
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D5,PA8
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D6,PH6
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D7,PI3
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D8,PI2
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D9,PA15
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D10,PI0
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D11,PB15
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D12,PB14
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D13,PI1
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D14,PB9
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D15,PB8
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LED1,PB0
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LED2,PB7
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LED3,PB14
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SW,PC13
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TP1,PH2
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TP2,PI8
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TP3,PH15
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AUDIO_INT,PD6
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AUDIO_SDA,PH8
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AUDIO_SCL,PH7
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EXT_SDA,PB9
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EXT_SCL,PB8
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EXT_RST,PG3
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SD_SW,PC13
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LCD_BL_CTRL,PK3
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LCD_INT,PI13
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LCD_SDA,PH8
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LCD_SCL,PH7
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OTG_FS_POWER,PD5
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OTG_FS_OVER_CURRENT,PD4
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OTG_HS_OVER_CURRENT,PE3
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USB_VBUS,PJ12
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USB_ID,PA10
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USB_DM,PA11
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USB_DP,PA12
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VCP_TX,PD8
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VCP_RX,PD9
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UART2_TX,PD5
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UART2_RX,PD6
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UART2_RTS,PD4
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UART2_CTS,PD3
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UART6_TX,PG14
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UART6_RX,PG9
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SPI_B_NSS,PA4
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SPI_B_SCK,PB3
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SPI_B_MOSI,PB5
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@ -0,0 +1,429 @@
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/**
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******************************************************************************
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* @file stm32f7xx_hal_conf.h
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* @author MCD Application Team
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* @version V1.0.1
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* @date 25-June-2015
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* @brief HAL configuration file.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F7xx_HAL_CONF_H
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#define __STM32F7xx_HAL_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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#define USE_USB_FS
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/* ########################## Module Selection ############################## */
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/**
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* @brief This is the list of modules to be used in the HAL driver
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*/
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#define HAL_MODULE_ENABLED
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#define HAL_ADC_MODULE_ENABLED
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#define HAL_CAN_MODULE_ENABLED
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/* #define HAL_CEC_MODULE_ENABLED */
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/* #define HAL_CRC_MODULE_ENABLED */
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/* #define HAL_CRYP_MODULE_ENABLED */
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/* #define HAL_DAC_MODULE_ENABLED */
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/* #define HAL_DCMI_MODULE_ENABLED */
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#define HAL_DMA_MODULE_ENABLED
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/* #define HAL_DMA2D_MODULE_ENABLED */
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/* #define HAL_ETH_MODULE_ENABLED */
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#define HAL_FLASH_MODULE_ENABLED
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/* #define HAL_NAND_MODULE_ENABLED */
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/* #define HAL_NOR_MODULE_ENABLED */
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/* #define HAL_SRAM_MODULE_ENABLED */
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/* #define HAL_SDRAM_MODULE_ENABLED */
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/* #define HAL_HASH_MODULE_ENABLED */
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#define HAL_GPIO_MODULE_ENABLED
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#define HAL_I2C_MODULE_ENABLED
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#define HAL_I2S_MODULE_ENABLED
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/* #define HAL_IWDG_MODULE_ENABLED */
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/* #define HAL_LPTIM_MODULE_ENABLED */
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/* #define HAL_LTDC_MODULE_ENABLED */
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#define HAL_PWR_MODULE_ENABLED
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/* #define HAL_QSPI_MODULE_ENABLED */
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#define HAL_RCC_MODULE_ENABLED
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#define HAL_RNG_MODULE_ENABLED
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#define HAL_RTC_MODULE_ENABLED
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/* #define HAL_SAI_MODULE_ENABLED */
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#define HAL_SD_MODULE_ENABLED
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/* #define HAL_SPDIFRX_MODULE_ENABLED */
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#define HAL_SPI_MODULE_ENABLED
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#define HAL_TIM_MODULE_ENABLED
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#define HAL_UART_MODULE_ENABLED
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/* #define HAL_USART_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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/* #define HAL_WWDG_MODULE_ENABLED */
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#define HAL_CORTEX_MODULE_ENABLED
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#define HAL_PCD_MODULE_ENABLED
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/* #define HAL_HCD_MODULE_ENABLED */
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/* ########################## Timeout Configuration ######################### */
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/**
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* @brief This is the HAL configuration section
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*/
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#define HAL_ACCURATE_TIMEOUT_ENABLED 0
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#define HAL_TIMEOUT_VALUE 0x1FFFFFF
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/* ########################## HSE/HSI Values adaptation ##################### */
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/**
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* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSE is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSE_STARTUP_TIMEOUT)
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#define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */
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#endif /* HSE_STARTUP_TIMEOUT */
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/**
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* @brief Internal High Speed oscillator (HSI) value.
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSI is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSI_VALUE)
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#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
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#endif /* HSI_VALUE */
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/**
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* @brief Internal Low Speed oscillator (LSI) value.
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*/
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#if !defined (LSI_VALUE)
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#define LSI_VALUE ((uint32_t)32000)
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#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
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The real value may vary depending on the variations
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in voltage and temperature. */
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/**
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* @brief External Low Speed oscillator (LSE) value.
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*/
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#if !defined (LSE_VALUE)
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#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
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#endif /* LSE_VALUE */
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#if !defined (LSE_STARTUP_TIMEOUT)
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#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
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#endif /* LSE_STARTUP_TIMEOUT */
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/**
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* @brief External clock source for I2S peripheral
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* This value is used by the I2S HAL module to compute the I2S clock source
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* frequency, this source is inserted directly through I2S_CKIN pad.
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*/
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#if !defined (EXTERNAL_CLOCK_VALUE)
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#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/
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#endif /* EXTERNAL_CLOCK_VALUE */
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/* Tip: To avoid modifying this file each time you need to use different HSE,
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=== you can define the HSE value in your toolchain compiler preprocessor. */
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/* ########################### System Configuration ######################### */
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/**
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* @brief This is the HAL system configuration section
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*/
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#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
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#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */
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#define USE_RTOS 0
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#define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */
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/* ########################## Assert Selection ############################## */
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/**
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* @brief Uncomment the line below to expanse the "assert_param" macro in the
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* HAL drivers code
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*/
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/* #define USE_FULL_ASSERT 1 */
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/* ################## Ethernet peripheral configuration ##################### */
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/* Section 1 : Ethernet peripheral configuration */
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/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
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#define MAC_ADDR0 2
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#define MAC_ADDR1 1
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#define MAC_ADDR2 0
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#define MAC_ADDR3 0
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#define MAC_ADDR4 0
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#define MAC_ADDR5 0
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/* Definition of the Ethernet driver buffers size and count */
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#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
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#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
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#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */
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#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */
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/* Section 2: PHY configuration section */
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/* LAN8742A PHY Address*/
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#define LAN8742A_PHY_ADDRESS 0x00
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/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
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#define PHY_RESET_DELAY ((uint32_t)0x00000FFF)
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/* PHY Configuration delay */
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#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFF)
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#define PHY_READ_TO ((uint32_t)0x0000FFFF)
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#define PHY_WRITE_TO ((uint32_t)0x0000FFFF)
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/* Section 3: Common PHY Registers */
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#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
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#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
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#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
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#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
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#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
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#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
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#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
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#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
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#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
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#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
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#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
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#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
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#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
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#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
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#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
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/* Section 4: Extended PHY Registers */
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#define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */
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#define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */
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#define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */
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#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */
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#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */
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#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */
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#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */
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#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */
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#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
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#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
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/* Includes ------------------------------------------------------------------*/
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/**
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* @brief Include module's header file
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*/
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#ifdef HAL_RCC_MODULE_ENABLED
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#include "stm32f7xx_hal_rcc.h"
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#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F7xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger
|
||||
# and an STM32F7 target microcontroller.
|
||||
#
|
||||
# To flash your firmware:
|
||||
#
|
||||
# $ openocd -f openocd_stm32f7.cfg \
|
||||
# -c "stm_flash build-BOARD/firmware0.bin build-BOARD/firmware1.bin"
|
||||
#
|
||||
# For a gdb server on port 3333:
|
||||
#
|
||||
# $ openocd -f openocd_stm32f7.cfg
|
||||
|
||||
|
||||
source [find interface/stlink-v2-1.cfg]
|
||||
transport select hla_swd
|
||||
source [find target/stm32f7x.cfg]
|
||||
reset_config srst_only
|
||||
init
|
||||
|
||||
proc stm_flash { BIN0 ADDR0 BIN1 ADDR1 } {
|
||||
reset halt
|
||||
sleep 100
|
||||
wait_halt 2
|
||||
flash write_image erase $BIN0 $ADDR0
|
||||
sleep 100
|
||||
verify_image $BIN0 $ADDR0
|
||||
sleep 100
|
||||
flash write_image erase $BIN1 $ADDR1
|
||||
sleep 100
|
||||
verify_image $BIN1 $ADDR1
|
||||
sleep 100
|
||||
reset run
|
||||
shutdown
|
||||
}
|
||||
|
||||
proc stm_erase {} {
|
||||
reset halt
|
||||
sleep 100
|
||||
stm32f7x mass_erase 0
|
||||
sleep 100
|
||||
shutdown
|
||||
}
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
/*
|
||||
GNU linker script for STM32F767
|
||||
*/
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
|
||||
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */
|
||||
FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */
|
||||
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */
|
||||
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */
|
||||
RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 384K /* SRAM1 = 368K, SRAM2 = 16K */
|
||||
}
|
||||
|
||||
/* produce a link error if there is not this amount of RAM for these sections */
|
||||
_minimum_stack_size = 2K;
|
||||
_minimum_heap_size = 16K;
|
||||
|
||||
/* Define tho top end of the stack. The stack is full descending so begins just
|
||||
above last byte of RAM. Note that EABI requires the stack to be 8-byte
|
||||
aligned for a call. */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
||||
/* define common sections and symbols */
|
||||
INCLUDE common.ld
|
||||
|
||||
/* RAM extents for the garbage collector */
|
||||
_ram_start = ORIGIN(RAM);
|
||||
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_heap_start = _ebss; /* heap starts just after statically allocated memory */
|
||||
_heap_end = 0x20078000; /* tunable */
|
||||
|
|
@ -0,0 +1,171 @@
|
|||
Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15
|
||||
,,SYS,TIM1/2,TIM3/4/5,TIM8/9/10/11/LPTIM1/CEC,I2C1/2/3/4/CEC,SPI1/2/3/4/5/6,SPI3/SAI1,SPI2/3/USART1/2/3/UART5/SPDIFRX,SAI2/USART6/UART4/5/7/8/SPDIFRX,CAN1/2/TIM12/13/14/QUADSPI/LCD,SAI2/QUADSPI/OTG2_HS/OTG1_FS,ETH/OTG1_FS,FMC/SDMMC1/OTG2_FS,DCMI,LCD,SYS
|
||||
PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,SAI2_SD_B,ETH_MII_CRS,,,,EVENTOUT
|
||||
PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS,UART4_RX,QUADSPI_BK1_IO3,SAI2_MCK_B,ETH_MII_RX_CLK/ETH_RMII_REF_CLK,,,LCD_R2,EVENTOUT
|
||||
PortA,PA2,,TIM2_CH3,TIM5_CH3,TIM9_CH1,,,,USART2_TX,SAI2_SCK_B,,,ETH_MDIO,,,LCD_R1,EVENTOUT
|
||||
PortA,PA3,,TIM2_CH4,TIM5_CH4,TIM9_CH2,,,,USART2_RX,,,OTG_HS_ULPI_D0,ETH_MII_COL,,,LCD_B5,EVENTOUT
|
||||
PortA,PA4,,,,,,SPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,OTG_HS_SOF,DCMI_HSYNC,LCD_VSYNC,EVENTOUT
|
||||
PortA,PA5,,TIM2_CH1/TIM2_ETR,TIM8_CH1N,SPI1_SCK/I2S1_CK,,,,,,,OTG_HS_ULPI_CK,,,,LCD_R4,EVENTOUT
|
||||
PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,,,TIM13_CH1,,,,DCMI_PIXCLK,LCD_G2,EVENTOUT
|
||||
PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI/I2S1_SD,,,,TIM14_CH1,,ETH_MII_RX_DV/ETH_RMII_CRS_DV,FMC_SDNWE,,,EVENTOUT
|
||||
PortA,PA8,MCO1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,OTG_FS_SOF,,,,LCD_R6,EVENTOUT
|
||||
PortA,PA9,,TIM1_CH2,,,I2C3_SMBA,SPI2_SCK/I2S2_CK,,USART1_TX,,,,,,DCMI_D0,,EVENTOUT
|
||||
PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,,,DCMI_D1,,EVENTOUT
|
||||
PortA,PA11,,TIM1_CH4,,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,,,LCD_R4,EVENTOUT
|
||||
PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS,SAI2_FS_B,CAN1_TX,OTG_FS_DP,,,,LCD_R5,EVENTOUT
|
||||
PortA,PA13,JTMS,SWDIO,,,,,,,,,,,,,,EVENTOUT
|
||||
PortA,PA14,JTCK,SWCLK,,,,,,,,,,,,,,EVENTOUT
|
||||
PortA,PA15,JTDI,TIM2_CH1/TIM2_ETR,,,HDMICE,CSPI1_NSS/I2S1_WS,SPI3_NSS/I2S3_WS,,UART4_RTS,,,,,,,EVENTOUT
|
||||
PortB,PB0,,TIM1_CH2N,TIM3_CH3T,IM8_CH2N,,,,,UART4_CTS,LCD_R3,OTG_HS_ULPI_D1,ETH_MII_RXD2,,,,EVENTOUT
|
||||
PortB,PB1,,TIM1_CH3N,TIM3_CH4T,IM8_CH3N,,,,,,LCD_R6,OTG_HS_ULPI_D2,ETH_MII_RXD3,,,,EVENTOUT
|
||||
PortB,PB2,,,,,,,SAI1_SD_A,SPI3_MOSI/I2S3_SD,,QUADSPI_CLK,,,,,,EVENTOUT
|
||||
PortB,PB3,JTDO/TRACESWO,TIM2_CH2,,,,SPI1_SCK/I2S1_CK,SPI3_SCK/I2S3_CK,,,,,,,,,EVENTOUT
|
||||
PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,SPI2_NSS/I2S2_WS,,,,,,,,EVENTOUT
|
||||
PortB,PB5,,,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI/I2S1_SD,SPI3_MOSI/I2S3_SD,,,CAN2_RX,OTG_HS_ULPI_D7,ETH_PPS_OUT,FMC_SDCKE1,DCMI_D10,,EVENTOUT
|
||||
PortB,PB6,,,TIM4_CH1,HDMICEC,I2C1_SCL,,,USART1_TX,,CAN2_TX,QUADSPI_BK1_NCS,,FMC_SDNE1,DCMI_D5,,EVENTOUT
|
||||
PortB,PB7,,,TIM4_CH2,,I2C1_SDA,,,USART1_RX,,,,,FMC_NL,DCMI_VSYNC,,EVENTOUT
|
||||
PortB,PB8,,,TIM4_CH3,TIM10_CH1,I2C1_SCL,,,,,CAN1_RX,,ETH_MII_TXD3,SDMMC1_D4,DCMI_D6,LCD_B6,EVENTOUT
|
||||
PortB,PB9,,,TIM4_CH4,TIM11_CH1,I2C1_SDA,SPI2_NSS/I2S2_WS,,,,CAN1_TX,,,SDMMC1_D5,DCMI_D7,LCD_B7,EVENTOUT
|
||||
PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK/I2S2_CK,,USART3_TX,,,OTG_HS_ULPI_D3,ETH_MII_RX_ER,,,LCD_G4,EVENTOUT
|
||||
PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,,USART3_RX,,,OTG_HS_ULPI_D4,ETH_MII_TX_EN/ETH_RMII_TX_EN,,,LCD_G5,EVENTOUT
|
||||
PortB,PB12,,TIM1_BKIN,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,,USART3_CK,,CAN2_RX,OTG_HS_ULPI_D5,ETH_MII_TXD0/ETH_RMII_TXD0,OTG_HS_ID,,,EVENTOUT
|
||||
PortB,PB13,,TIM1_CH1N,,,,SPI2_SCK/I2S2_CK,,USART3_CTS,,CAN2_TX,OTG_HS_ULPI_D6,ETH_MII_TXD1/ETH_RMII_TXD1,,,,EVENTOUT
|
||||
PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,,SPI2_MISO,,USART3_RTS,,TIM12_CH1,,,OTG_HS_DM,,,EVENTOUT
|
||||
PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI/I2S2_SD,,,,TIM12_CH2,,,OTG_HS_DP,,,EVENTOUT
|
||||
PortC,PC0,,,,,,,,,SAI2_FS_B,,OTG_HS_ULPI_STP,,FMC_SDNWE,,LCD_R5,EVENTOUT
|
||||
PortC,PC1,TRACED0,,,,,SPI2_MOSI/I2S2_SD,SAI1_SD_A,,,,,ETH_MDC,,,,EVENTOUT
|
||||
PortC,PC2,,,,,,SPI2_MISO,,,,,OTG_HS_ULPI_DIR,ETH_MII_TXD2,FMC_SDNE0,,,EVENTOUT
|
||||
PortC,PC3,,,,,,SPI2_MOSI/I2S2_SD,,,,,OTG_HS_ULPI_NXT,ETH_MII_TX_CLK,FMC_SDCKE0,,,EVENTOUT
|
||||
PortC,PC4,,,,,,I2S1_MCK,,,SPDIFRX_IN2,,,ETH_MII_RXD0/ETH_RMII_RXD0,FMC_SDNE0,,,EVENTOUT
|
||||
PortC,PC5,,,,,,,,,SPDIFRX_IN3,,,ETH_MII_RXD1/ETH_RMII_RXD1,FMC_SDCKE0,,,EVENTOUT
|
||||
PortC,PC6,,,TIM3_CH1,TIM8_CH1,,I2S2_MCK,,,USART6_TX,,,,SDMMC1_D6,DCMI_D0,LCD_HSYNC,EVENTOUT
|
||||
PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,I2S3_MCK,,USART6_RX,,,,SDMMC1_D7,DCMI_D1,LCD_G6,EVENTOUT
|
||||
PortC,PC8,TRACED1,,TIM3_CH3,TIM8_CH3,,,,UART5_RTS,USART6_CK,,,,SDMMC1_D0,DCMI_D2,,EVENTOUT
|
||||
PortC,PC9,MCO2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,UART5_CTS,,QUADSPI_BK1_IO0,,,SDMMC1_D1,DCMI_D3,,EVENTOUT
|
||||
PortC,PC10,,,,,,,SPI3_SCK/I2S3_CK,USART3_TX,UART4_TX,QUADSPI_BK1_IO1,,,SDMMC1_D2,DCMI_D8,LCD_R2,EVENTOUT
|
||||
PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,QUADSPI_BK2_NCS,,,SDMMC1_D3,DCMI_D4,,EVENTOUT
|
||||
PortC,PC12,TRACED3,,,,,,SPI3_MOSI/I2S3_SD,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9,,EVENTOUT
|
||||
PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT
|
||||
PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT
|
||||
PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT
|
||||
PortD,PD0,,,,,,,,,,CAN1_RX,,,FMC_D2,,,EVENTOUT
|
||||
PortD,PD1,,,,,,,,,,CAN1_TX,,,FMC_D3,,,EVENTOUT
|
||||
PortD,PD2,TRACED2,,TIM3_ETR,,,,,,UART5_RX,,,,SDMMC1_CMD,DCMI_D11,,EVENTOUT
|
||||
PortD,PD3,,,,,,SPI2_SCK/I2S2_CK,,USART2_CTS,,,,,FMC_CLK,DCMI_D5,LCD_G7,EVENTOUT
|
||||
PortD,PD4,,,,,,,,USART2_RTS,,,,,FMC_NOE,,,EVENTOUT
|
||||
PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT
|
||||
PortD,PD6,,,,,,SPI3_MOSI/I2S3_SD,SAI1_SD_A,USART2_RX,,,,,FMC_NWAIT,DCMI_D10,LCD_B2,EVENTOUT
|
||||
PortD,PD7,,,,,,,,USART2_CK,SPDIFRX_IN0,,,,FMC_NE1,,,EVENTOUT
|
||||
PortD,PD8,,,,,,,,USART3_TX,SPDIFRX_IN1,,,,FMC_D13,,,EVENTOUT
|
||||
PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT
|
||||
PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,LCD_B3,EVENTOUT
|
||||
PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,QUADSPI_BK1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT
|
||||
PortD,PD12,,,TIM4_CH1,LPTIM1_IN1,I2C4_SCL,,,USART3_RTS,,QUADSPI_BK1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,,,EVENTOUT
|
||||
PortD,PD13,,,TIM4_CH2,LPTIM1_OUT,I2C4_SDA,,,,,QUADSPI_BK1_IO3,SAI2_SCK_A,,FMC_A18,,,EVENTOUT
|
||||
PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,,FMC_D0,,,EVENTOUT
|
||||
PortD,PD15,,,TIM4_CH4,,,,,,UART8_RTS,,,,FMC_D1,,,EVENTOUT
|
||||
PortE,PE0,,,TIM4_ETR,LPTIM1_ETR,,,,,UART8_RX,,SAI2_MCK_A,,FMC_NBL0,DCMI_D2,,EVENTOUT
|
||||
PortE,PE1,,,,LPTIM1_IN2,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3,,EVENTOUT
|
||||
PortE,PE2,TRACECLK,,,,,SPI4_SCK,SAI1_MCLK_A,,,QUADSPI_BK1_IO2,,ETH_MII_TXD3,FMC_A23,,,EVENTOUT
|
||||
PortE,PE3,TRACED0,,,,,,SAI1_SD_B,,,,,,FMC_A19,,,EVENTOUT
|
||||
PortE,PE4,TRACED1,,,,,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4,LCD_B0,EVENTOUT
|
||||
PortE,PE5,TRACED2,,,TIM9_CH1,,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6,LCD_G0,EVENTOUT
|
||||
PortE,PE6,TRACED3,TIM1_BKIN2,,TIM9_CH2,,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCK_B,,FMC_A22,DCMI_D7,LCD_G1,EVENTOUT
|
||||
PortE,PE7,,TIM1_ETR,,,,,,,UART7_RX,,QUADSPI_BK2_IO0,,FMC_D4,,,EVENTOUT
|
||||
PortE,PE8,,TIM1_CH1N,,,,,,,UART7_TX,,QUADSPI_BK2_IO1,,FMC_D5,,,EVENTOUT
|
||||
PortE,PE9,,TIM1_CH1,,,,,,,UART7_RTS,,QUADSPI_BK2_IO2,,FMC_D6,,,EVENTOUT
|
||||
PortE,PE10,,TIM1_CH2N,,,,,,,UART7_CTS,,QUADSPI_BK2_IO3,,FMC_D7,,,EVENTOUT
|
||||
PortE,PE11,,TIM1_CH2,,,,SPI4_NSS,,,,,SAI2_SD_B,,FMC_D8,,LCD_G3,EVENTOUT
|
||||
PortE,PE12,,TIM1_CH3N,,,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9,,LCD_B4,EVENTOUT
|
||||
PortE,PE13,,TIM1_CH3,,,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10,,LCD_DE,EVENTOUT
|
||||
PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCK_B,,FMC_D11,,LCD_CLK,EVENTOUT
|
||||
PortE,PE15,,TIM1_BKIN,,,,,,,,,,,FMC_D12,,LCD_R7,EVENTOUT
|
||||
PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT
|
||||
PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT
|
||||
PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT
|
||||
PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT
|
||||
PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT
|
||||
PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT
|
||||
PortF,PF6,,,,TIM10_CH1,,SPI5_NSS,SAI1_SD_B,,UART7_RX,QUADSPI_BK1_IO3,,,,,,EVENTOUT
|
||||
PortF,PF7,,,,TIM11_CH1,,SPI5_SCK,SAI1_MCLK_B,,UART7_TX,QUADSPI_BK1_IO2,,,,,,EVENTOUT
|
||||
PortF,PF8,,,,,,SPI5_MISO,SAI1_SCK_B,,UART7_RTS,TIM13_CH1,QUADSPI_BK1_IO0,,,,,EVENTOUT
|
||||
PortF,PF9,,,,,,SPI5_MOSI,SAI1_FS_B,,UART7_CTS,TIM14_CH1,QUADSPI_BK1_IO1,,,,,EVENTOUT
|
||||
PortF,PF10,,,,,,,,,,,,,,DCMI_D11,LCD_DE,EVENTOUT
|
||||
PortF,PF11,,,,,,SPI5_MOSI,,,,,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12,,EVENTOUT
|
||||
PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT
|
||||
PortF,PF13,,,,,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT
|
||||
PortF,PF14,,,,,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT
|
||||
PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT
|
||||
PortG,PG0,,,,,,,,,,,,,FMC_A10,,,EVENTOUT
|
||||
PortG,PG1,,,,,,,,,,,,,FMC_A11,,,EVENTOUT
|
||||
PortG,PG2,,,,,,,,,,,,,FMC_A12,,,EVENTOUT
|
||||
PortG,PG3,,,,,,,,,,,,,FMC_A13,,,EVENTOUT
|
||||
PortG,PG4,,,,,,,,,,,,,FMC_A14/FMC_BA0,,,EVENTOUT
|
||||
PortG,PG5,,,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT
|
||||
PortG,PG6,,,,,,,,,,,,,,DCMI_D12,LCD_R7,EVENTOUT
|
||||
PortG,PG7,,,,,,,,,USART6_CK,,,,FMC_INT,DCMI_D13,LCD_CLK,EVENTOUT
|
||||
PortG,PG8,,,,,,SPI6_NSS,,SPDIFRX_IN2,USART6_RTS,,,ETH_PPS_OUT,FMC_SDCLK,,,EVENTOUT
|
||||
PortG,PG9,,,,,,,,SPDIFRX_IN3,USART6_RX,QUADSPI_BK2_IO2,SAI2_FS_B,,FMC_NE2/FMC_NCE,DCMI_VSYNC,,EVENTOUT
|
||||
PortG,PG10,,,,,,,,,,LCD_G3,SAI2_SD_B,,FMC_NE3,DCMI_D2,LCD_B2,EVENTOUT
|
||||
PortG,PG11,,,,,,,,SPDIFRX_IN0,,,,ETH_MII_TX_EN/ETH_RMII_TX_EN,,DCMI_D3,LCD_B3,EVENTOUT
|
||||
PortG,PG12,,,,LPTIM1_IN1,,SPI6_MISO,,SPDIFRX_IN1,USART6_RTS,LCD_B4,,,FMC_NE4,,LCD_B1,EVENTOUT
|
||||
PortG,PG13,TRACED0,,,LPTIM1_OUT,,SPI6_SCK,,,USART6_CTS,,,ETH_MII_TXD0/ETH_RMII_TXD0,FMC_A24,,LCD_R0,EVENTOUT
|
||||
PortG,PG14,TRACED1,,,LPTIM1_ETR,,SPI6_MOSI,,,USART6_TX,QUADSPI_BK2_IO3,,ETH_MII_TXD1/ETH_RMII_TXD1,FMC_A25,,LCD_B0,EVENTOUT
|
||||
PortG,PG15,,,,,,,,,USART6_CTS,,,,FMC_SDNCAS,DCMI_D13,,EVENTOUT
|
||||
PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT
|
||||
PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT
|
||||
PortH,PH2,,,,LPTIM1_IN2,,,,,,QUADSPI_BK2_IO0,SAI2_SCK_B,ETH_MII_CRS,FMC_SDCKE0,,LCD_R0,EVENTOUT
|
||||
PortH,PH3,,,,,,,,,,QUADSPI_BK2_IO1,SAI2_MCK_B,ETH_MII_COL,FMC_SDNE0,,LCD_R1,EVENTOUT
|
||||
PortH,PH4,,,,,I2C2_SCL,,,,,,OTG_HS_ULPI_NXT,,,,,EVENTOUT
|
||||
PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT
|
||||
PortH,PH6,,,,,I2C2_SMBA,SPI5_SCK,,,,TIM12_CH1,,ETH_MII_RXD2,FMC_SDNE1,DCMI_D8,,EVENTOUT
|
||||
PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,ETH_MII_RXD3,FMC_SDCKE1,DCMI_D9,,EVENTOUT
|
||||
PortH,PH8,,,,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC,LCD_R2,EVENTOUT
|
||||
PortH,PH9,,,,,I2C3_SMBA,,,,,TIM12_CH2,,,FMC_D17,DCMI_D0,LCD_R3,EVENTOUT
|
||||
PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1,LCD_R4,EVENTOUT
|
||||
PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2,LCD_R5,EVENTOUT
|
||||
PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3,LCD_R6,EVENTOUT
|
||||
PortH,PH13,,,,TIM8_CH1N,,,,,,CAN1_TX,,,FMC_D21,,LCD_G2,EVENTOUT
|
||||
PortH,PH14,,,,TIM8_CH2N,,,,,,,,,FMC_D22,DCMI_D4,LCD_G3,EVENTOUT
|
||||
PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11,LCD_G4,EVENTOUT
|
||||
PortI,PI0,,,TIM5_CH4,,,SPI2_NSS/I2S2_WS,,,,,,,FMC_D24,DCMI_D13,LCD_G5,EVENTOUT
|
||||
PortI,PI1,,,,TIM8_BKIN2,,SPI2_SCK/I2S2_CK,,,,,,,FMC_D25,DCMI_D8,LCD_G6,EVENTOUT
|
||||
PortI,PI2,,,,TIM8_CH4,,SPI2_MISO,,,,,,,FMC_D26,DCMI_D9,LCD_G7,EVENTOUT
|
||||
PortI,PI3,,,,TIM8_ETR,,SPI2_MOSI/I2S2_SD,,,,,,,FMC_D27,DCMI_D10,,EVENTOUT
|
||||
PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCK_A,,FMC_NBL2,DCMI_D5,LCD_B4,EVENTOUT
|
||||
PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC,LCD_B5,EVENTOUT
|
||||
PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6,LCD_B6,EVENTOUT
|
||||
PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7,LCD_B7,EVENTOUT
|
||||
PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT
|
||||
PortI,PI9,,,,,,,,,,CAN1_RX,,,FMC_D30,,LCD_VSYNC,EVENTOUT
|
||||
PortI,PI10,,,,,,,,,,,,ETH_MII_RX_ER,FMC_D31,,LCD_HSYNC,EVENTOUT
|
||||
PortI,PI11,,,,,,,,,,,OTG_HS_ULPI_DIR,,,,,EVENTOUT
|
||||
PortI,PI12,,,,,,,,,,,,,,,LCD_HSYNC,EVENTOUT
|
||||
PortI,PI13,,,,,,,,,,,,,,,LCD_VSYNC,EVENTOUT
|
||||
PortI,PI14,,,,,,,,,,,,,,,LCD_CLK,EVENTOUT
|
||||
PortI,PI15,,,,,,,,,,,,,,,LCD_R0,EVENTOUT
|
||||
PortJ,PJ0,,,,,,,,,,,,,,,LCD_R1,EVENTOUT
|
||||
PortJ,PJ1,,,,,,,,,,,,,,,LCD_R2,EVENTOUT
|
||||
PortJ,PJ2,,,,,,,,,,,,,,,LCD_R3,EVENTOUT
|
||||
PortJ,PJ3,,,,,,,,,,,,,,,LCD_R4,EVENTOUT
|
||||
PortJ,PJ4,,,,,,,,,,,,,,,LCD_R5,EVENTOUT
|
||||
PortJ,PJ5,,,,,,,,,,,,,,,LCD_R6,EVENTOUT
|
||||
PortJ,PJ6,,,,,,,,,,,,,,,LCD_R7,EVENTOUT
|
||||
PortJ,PJ7,,,,,,,,,,,,,,,LCD_G0,EVENTOUT
|
||||
PortJ,PJ8,,,,,,,,,,,,,,,LCD_G1,EVENTOUT
|
||||
PortJ,PJ9,,,,,,,,,,,,,,,LCD_G2,EVENTOUT
|
||||
PortJ,PJ10,,,,,,,,,,,,,,,LCD_G3,EVENTOUT
|
||||
PortJ,PJ11,,,,,,,,,,,,,,,LCD_G4,EVENTOUT
|
||||
PortJ,PJ12,,,,,,,,,,,,,,,LCD_B0,EVENTOUT
|
||||
PortJ,PJ13,,,,,,,,,,,,,,,LCD_B1,EVENTOUT
|
||||
PortJ,PJ14,,,,,,,,,,,,,,,LCD_B2,EVENTOUT
|
||||
PortJ,PJ15,,,,,,,,,,,,,,,LCD_B3,EVENTOUT
|
||||
PortK,PK0,,,,,,,,,,,,,,,LCD_G5,EVENTOUT
|
||||
PortK,PK1,,,,,,,,,,,,,,,LCD_G6,EVENTOUT
|
||||
PortK,PK2,,,,,,,,,,,,,,,LCD_G7,EVENTOUT
|
||||
PortK,PK3,,,,,,,,,,,,,,,LCD_B4,EVENTOUT
|
||||
PortK,PK4,,,,,,,,,,,,,,,LCD_B5,EVENTOUT
|
||||
PortK,PK5,,,,,,,,,,,,,,,LCD_B6,EVENTOUT
|
||||
PortK,PK6,,,,,,,,,,,,,,,LCD_B7,EVENTOUT
|
||||
PortK,PK7,,,,,,,,,,,,,,,LCD_DE,EVENTOUT
|
||||
|
||||
|
|
|
@ -75,7 +75,7 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
|
|||
#define FLASH_MEM_SEG2_START_ADDR (0x08140000) // sector 18
|
||||
#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 18: 64k(of 128k)
|
||||
|
||||
#elif defined(STM32F746xx)
|
||||
#elif defined(STM32F746xx) || defined(STM32F767xx)
|
||||
|
||||
// The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this.
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue