2019-11-02 11:52:26 -04:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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2020-06-03 18:40:05 -04:00
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* SPDX-FileCopyrightText: Copyright (c) 2016 Damien P. George
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2019-11-02 11:52:26 -04:00
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* Copyright (c) 2019 Artur Pacholec
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2020-05-27 11:45:15 -04:00
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#include "shared-bindings/microcontroller/Pin.h"
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2019-11-02 11:52:26 -04:00
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#include "shared-bindings/microcontroller/__init__.h"
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#include "shared-bindings/busio/UART.h"
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#include "mpconfigport.h"
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#include "lib/utils/interrupt_char.h"
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#include "supervisor/shared/tick.h"
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#include "py/gc.h"
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#include "py/mperrno.h"
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#include "py/runtime.h"
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#include "py/stream.h"
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#include "periph.h"
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#include "fsl_lpuart.h"
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2020-05-21 11:18:22 -04:00
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//arrays use 0 based numbering: UART1 is stored at index 0
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2020-05-20 12:48:01 -04:00
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#define MAX_UART 8
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STATIC bool reserved_uart[MAX_UART];
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2019-11-02 11:52:26 -04:00
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#define UART_CLOCK_FREQ (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U)
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static void config_periph_pin(const mcu_periph_obj_t *periph) {
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IOMUXC_SetPinMux(
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periph->pin->mux_reg, periph->mux_mode,
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periph->input_reg, periph->input_idx,
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0,
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0);
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IOMUXC_SetPinConfig(0, 0, 0, 0,
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periph->pin->cfg_reg,
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IOMUXC_SW_PAD_CTL_PAD_HYS(0)
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2020-02-15 19:23:43 -05:00
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| IOMUXC_SW_PAD_CTL_PAD_PUS(1)
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| IOMUXC_SW_PAD_CTL_PAD_PUE(1)
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2019-11-02 11:52:26 -04:00
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| IOMUXC_SW_PAD_CTL_PAD_PKE(1)
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| IOMUXC_SW_PAD_CTL_PAD_ODE(0)
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| IOMUXC_SW_PAD_CTL_PAD_SPEED(1)
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| IOMUXC_SW_PAD_CTL_PAD_DSE(6)
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| IOMUXC_SW_PAD_CTL_PAD_SRE(0));
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}
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void LPUART_UserCallback(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *user_data)
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{
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busio_uart_obj_t *self = (busio_uart_obj_t*)user_data;
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if (status == kStatus_LPUART_RxIdle) {
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self->rx_ongoing = false;
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}
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}
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2020-05-27 11:45:15 -04:00
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void uart_reset(void) {
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for(uint i = 0; i < MP_ARRAY_SIZE(mcu_uart_banks); i++) {
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reserved_uart[i] = false;
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LPUART_Deinit(mcu_uart_banks[i]);
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}
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}
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2019-11-02 11:52:26 -04:00
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void common_hal_busio_uart_construct(busio_uart_obj_t *self,
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2020-02-15 19:23:43 -05:00
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const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
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2020-02-17 19:09:35 -05:00
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const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
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const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
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2020-06-09 21:28:02 -04:00
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uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
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2020-05-18 08:04:55 -04:00
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mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
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bool sigint_enabled) {
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2019-11-02 11:52:26 -04:00
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self->baudrate = baudrate;
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self->character_bits = bits;
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self->timeout_ms = timeout * 1000;
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2020-05-21 11:18:22 -04:00
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// We are transmitting one direction if one pin is NULL and the other isn't.
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2020-06-09 21:28:02 -04:00
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bool is_onedirection = (rx == NULL) != (tx == NULL);
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2020-05-20 12:48:01 -04:00
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bool uart_taken = false;
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2019-11-02 11:52:26 -04:00
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2020-05-20 12:48:01 -04:00
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const uint32_t rx_count = MP_ARRAY_SIZE(mcu_uart_rx_list);
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const uint32_t tx_count = MP_ARRAY_SIZE(mcu_uart_tx_list);
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2019-11-02 11:52:26 -04:00
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2020-05-20 12:48:01 -04:00
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// RX loop handles rx only, or both rx and tx
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if (rx != NULL) {
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for (uint32_t i = 0; i < rx_count; ++i) {
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if (mcu_uart_rx_list[i].pin != rx) {
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2019-11-02 11:52:26 -04:00
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continue;
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2020-05-20 12:48:01 -04:00
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}
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// If TX is on, keep looking, else stop
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if (tx != NULL) {
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for (uint32_t j = 0; j < tx_count; ++j) {
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2020-05-30 05:44:13 -04:00
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if (mcu_uart_tx_list[j].pin != tx ||
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2020-05-20 12:48:01 -04:00
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mcu_uart_tx_list[j].bank_idx != mcu_uart_rx_list[i].bank_idx) {
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continue;
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}
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// If UART is taken, break (pins never have >1 periph)
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if (reserved_uart[mcu_uart_rx_list[i].bank_idx - 1]) {
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uart_taken = true;
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break;
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}
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self->rx = &mcu_uart_rx_list[i];
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self->tx = &mcu_uart_tx_list[j];
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break;
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}
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if (self->tx != NULL || uart_taken) {
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break;
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}
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} else {
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if (reserved_uart[mcu_uart_rx_list[i].bank_idx - 1]) {
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uart_taken = true;
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break;
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}
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self->rx = &mcu_uart_rx_list[i];
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}
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}
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} else if (tx != NULL) {
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// TX only case
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for (uint32_t i = 0; i < tx_count; ++i) {
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if (mcu_uart_tx_list[i].pin != tx) {
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2019-11-02 11:52:26 -04:00
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continue;
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2020-05-20 12:48:01 -04:00
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}
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if (reserved_uart[mcu_uart_tx_list[i].bank_idx - 1]) {
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uart_taken = true;
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break;
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}
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self->tx = &mcu_uart_tx_list[i];
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2019-11-02 11:52:26 -04:00
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break;
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}
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2020-05-20 12:48:01 -04:00
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} else {
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mp_raise_ValueError(translate("Supply at least one UART pin"));
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}
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if (uart_taken) {
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2020-05-27 11:48:52 -04:00
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mp_raise_ValueError(translate("Hardware in use, try alternative pins"));
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2019-11-02 11:52:26 -04:00
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}
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2020-05-20 12:48:01 -04:00
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if(self->rx == NULL && self->tx == NULL) {
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2020-05-27 11:48:52 -04:00
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mp_raise_ValueError(translate("Invalid pins"));
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2019-11-02 11:52:26 -04:00
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}
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2020-05-20 12:48:01 -04:00
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if (is_onedirection && ((rts != NULL) || (cts != NULL))) {
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2020-05-27 11:48:52 -04:00
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mp_raise_ValueError(translate("Both RX and TX required for flow control"));
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2020-05-20 12:48:01 -04:00
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}
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2020-02-17 19:09:35 -05:00
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// Filter for sane settings for RS485
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2020-02-28 23:32:24 -05:00
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if (rs485_dir != NULL) {
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2020-05-20 12:48:01 -04:00
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if ((rts != NULL) || (cts != NULL)) {
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mp_raise_ValueError(translate("Cannot specify RTS or CTS in RS485 mode"));
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}
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// For IMXRT the RTS pin is used for RS485 direction
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rts = rs485_dir;
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2020-02-17 19:09:35 -05:00
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}
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2020-02-18 19:07:01 -05:00
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else {
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2020-05-20 12:48:01 -04:00
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if (rs485_invert) {
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mp_raise_ValueError(translate("RS485 inversion specified when not in RS485 mode"));
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}
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2020-02-18 19:07:01 -05:00
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}
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2020-02-17 19:09:35 -05:00
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// Now check for RTS/CTS (or overloaded RS485 direction) pin(s)
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2020-05-20 12:48:01 -04:00
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const uint32_t rts_count = MP_ARRAY_SIZE(mcu_uart_rts_list);
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const uint32_t cts_count = MP_ARRAY_SIZE(mcu_uart_cts_list);
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2020-02-15 19:23:43 -05:00
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2020-02-28 23:32:24 -05:00
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if (rts != NULL) {
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2020-05-20 12:48:01 -04:00
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for (uint32_t i=0; i < rts_count; ++i) {
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if (mcu_uart_rts_list[i].bank_idx == self->rx->bank_idx) {
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if (mcu_uart_rts_list[i].pin == rts) {
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self->rts = &mcu_uart_rts_list[i];
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break;
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}
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}
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}
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if (self->rts == NULL){
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mp_raise_ValueError(translate("Selected RTS pin not valid"));
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2020-02-15 19:23:43 -05:00
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}
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}
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2020-02-28 23:32:24 -05:00
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if (cts != NULL) {
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2020-05-20 12:48:01 -04:00
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for (uint32_t i=0; i < cts_count; ++i) {
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if (mcu_uart_cts_list[i].bank_idx == self->rx->bank_idx) {
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if (mcu_uart_cts_list[i].pin == cts) {
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self->cts = &mcu_uart_cts_list[i];
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break;
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}
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}
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}
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if (self->cts == NULL){
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mp_raise_ValueError(translate("Selected CTS pin not valid"));
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2020-02-15 19:23:43 -05:00
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}
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}
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2020-02-28 23:32:24 -05:00
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2020-05-20 12:48:01 -04:00
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if (self->rx) {
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self->uart = mcu_uart_banks[self->rx->bank_idx - 1];
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} else {
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self->uart = mcu_uart_banks[self->tx->bank_idx - 1];
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}
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2020-02-15 19:23:43 -05:00
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2020-05-20 12:48:01 -04:00
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if (self->rx) {
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config_periph_pin(self->rx);
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}
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if (self->tx) {
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config_periph_pin(self->tx);
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}
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if (self->rts) {
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config_periph_pin(self->rts);
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}
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if (self->cts) {
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config_periph_pin(self->cts);
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}
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2019-11-02 11:52:26 -04:00
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lpuart_config_t config = { 0 };
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LPUART_GetDefaultConfig(&config);
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config.dataBitsCount = self->character_bits == 8 ? kLPUART_EightDataBits : kLPUART_SevenDataBits;
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config.baudRate_Bps = self->baudrate;
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2020-05-20 12:48:01 -04:00
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config.enableTx = self->tx != NULL;
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config.enableRx = self->rx != NULL;
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config.enableRxRTS = self->rts != NULL;
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config.enableTxCTS = self->cts != NULL;
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if (self->rts != NULL) {
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claim_pin(self->rts->pin);
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}
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if (self->cts != NULL) {
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claim_pin(self->cts->pin);
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}
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2020-02-17 19:09:35 -05:00
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2019-11-02 11:52:26 -04:00
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LPUART_Init(self->uart, &config, UART_CLOCK_FREQ);
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2020-02-17 19:09:35 -05:00
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// Before we init, setup RS485 direction pin
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// ..unfortunately this isn't done by the driver library
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uint32_t modir = (self->uart->MODIR) & ~(LPUART_MODIR_TXRTSPOL_MASK | LPUART_MODIR_TXRTSE_MASK);
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2020-02-28 23:32:24 -05:00
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if (rs485_dir != NULL) {
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2020-05-20 12:48:01 -04:00
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modir |= LPUART_MODIR_TXRTSE_MASK;
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if (rs485_invert) {
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modir |= LPUART_MODIR_TXRTSPOL_MASK;
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}
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2020-02-17 19:09:35 -05:00
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}
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self->uart->MODIR = modir;
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2020-05-20 12:48:01 -04:00
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if (self->tx != NULL) {
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claim_pin(self->tx->pin);
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}
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2019-11-02 11:52:26 -04:00
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2020-05-20 12:48:01 -04:00
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if (self->rx != NULL) {
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2020-04-21 22:40:12 -04:00
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// The LPUART ring buffer wastes one byte to distinguish between full and empty.
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self->ringbuf = gc_alloc(receiver_buffer_size + 1, false, true /*long-lived*/);
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2019-11-02 11:52:26 -04:00
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2020-04-21 22:40:12 -04:00
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if (!self->ringbuf) {
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2019-11-02 11:52:26 -04:00
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LPUART_Deinit(self->uart);
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mp_raise_msg(&mp_type_MemoryError, translate("Failed to allocate RX buffer"));
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}
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LPUART_TransferCreateHandle(self->uart, &self->handle, LPUART_UserCallback, self);
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2020-04-21 17:37:22 -04:00
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// Pass actual allocated size; the LPUART routines are cognizant that
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// the capacity is one less than the size.
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2020-04-21 22:40:12 -04:00
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LPUART_TransferStartRingBuffer(self->uart, &self->handle, self->ringbuf, receiver_buffer_size + 1);
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2019-11-02 11:52:26 -04:00
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2020-05-20 12:48:01 -04:00
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claim_pin(self->rx->pin);
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2019-11-02 11:52:26 -04:00
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}
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}
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bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) {
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2020-05-20 12:48:01 -04:00
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return self->rx == NULL && self->tx == NULL;
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2019-11-02 11:52:26 -04:00
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}
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void common_hal_busio_uart_deinit(busio_uart_obj_t *self) {
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if (common_hal_busio_uart_deinited(self)) {
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return;
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}
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2020-05-27 11:45:15 -04:00
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if (self->rx) {
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|
|
reserved_uart[self->rx->bank_idx - 1] = false;
|
|
|
|
} else {
|
|
|
|
reserved_uart[self->tx->bank_idx - 1] = false;
|
|
|
|
}
|
2020-05-30 05:44:13 -04:00
|
|
|
|
2019-11-02 11:52:26 -04:00
|
|
|
LPUART_Deinit(self->uart);
|
2020-04-21 22:40:12 -04:00
|
|
|
gc_free(self->ringbuf);
|
2019-11-02 11:52:26 -04:00
|
|
|
|
2020-05-27 11:45:15 -04:00
|
|
|
if (self->rx) {
|
|
|
|
common_hal_reset_pin(self->rx->pin);
|
|
|
|
}
|
|
|
|
if (self->tx) {
|
|
|
|
common_hal_reset_pin(self->tx->pin);
|
|
|
|
}
|
2019-11-02 11:52:26 -04:00
|
|
|
|
2020-05-20 12:48:01 -04:00
|
|
|
self->rx = NULL;
|
|
|
|
self->tx = NULL;
|
2019-11-02 11:52:26 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Read characters.
|
|
|
|
size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) {
|
2020-05-20 12:48:01 -04:00
|
|
|
if (self->rx == NULL) {
|
2019-11-02 11:52:26 -04:00
|
|
|
mp_raise_ValueError(translate("No RX pin"));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (len == 0) {
|
|
|
|
// Nothing to read.
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
lpuart_transfer_t xfer = {
|
|
|
|
.data = data,
|
|
|
|
.dataSize = len,
|
|
|
|
};
|
|
|
|
|
|
|
|
self->rx_ongoing = true;
|
|
|
|
LPUART_TransferReceiveNonBlocking(self->uart, &self->handle, &xfer, NULL);
|
|
|
|
|
|
|
|
uint64_t start_ticks = supervisor_ticks_ms64();
|
|
|
|
|
|
|
|
// Wait for all bytes received or timeout
|
|
|
|
while (self->rx_ongoing && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) {
|
|
|
|
RUN_BACKGROUND_TASKS;
|
|
|
|
|
|
|
|
// Allow user to break out of a timeout with a KeyboardInterrupt.
|
|
|
|
if (mp_hal_is_interrupted()) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// if we timed out, stop the transfer
|
|
|
|
if (self->rx_ongoing) {
|
|
|
|
LPUART_TransferAbortReceive(self->uart, &self->handle);
|
|
|
|
}
|
|
|
|
|
2020-03-25 19:15:48 -04:00
|
|
|
// No data left, we got it all
|
|
|
|
if (self->handle.rxData == NULL) {
|
|
|
|
return len;
|
|
|
|
}
|
|
|
|
|
2020-02-15 19:23:43 -05:00
|
|
|
// The only place we can reliably tell how many bytes have been received is from the current
|
|
|
|
// wp in the handle (because the abort nukes rxDataSize, and reading it before abort is a race.)
|
2020-03-25 19:15:48 -04:00
|
|
|
return self->handle.rxData - data;
|
2019-11-02 11:52:26 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Write characters.
|
|
|
|
size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) {
|
2020-05-20 12:48:01 -04:00
|
|
|
if (self->tx == NULL) {
|
2019-11-02 11:52:26 -04:00
|
|
|
mp_raise_ValueError(translate("No TX pin"));
|
|
|
|
}
|
|
|
|
|
|
|
|
LPUART_WriteBlocking(self->uart, data, len);
|
|
|
|
|
|
|
|
return len;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) {
|
|
|
|
return self->baudrate;
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) {
|
|
|
|
if (LPUART_SetBaudRate(self->uart, baudrate, UART_CLOCK_FREQ) == kStatus_Success) {
|
|
|
|
self->baudrate = baudrate;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) {
|
|
|
|
return (mp_float_t) (self->timeout_ms / 1000.0f);
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) {
|
|
|
|
self->timeout_ms = timeout * 1000;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) {
|
|
|
|
return LPUART_TransferGetRxRingBufferLength(self->uart, &self->handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) {
|
|
|
|
self->handle.rxRingBufferHead = self->handle.rxRingBufferTail;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) {
|
2020-05-20 12:48:01 -04:00
|
|
|
if (self->tx == NULL) {
|
2019-11-02 11:52:26 -04:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return LPUART_GetStatusFlags(self->uart) & kLPUART_TxDataRegEmptyFlag;
|
|
|
|
}
|