Add UART support

This commit is contained in:
Scott Shawcroft 2020-06-09 18:28:02 -07:00
parent 6f050d7af3
commit a26102607e
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GPG Key ID: 9349BC7E64B1921E
12 changed files with 250 additions and 300 deletions

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@ -243,3 +243,12 @@ stubs:
update-frozen-libraries:
@echo "Updating all frozen libraries to latest tagged version."
cd frozen; for library in *; do cd $$library; ../../tools/git-checkout-latest-tag.sh; cd ..; done
one-of-each: all-source
make -C ports/atmel-samd BOARD=trinket_m0
make -C ports/atmel-samd BOARD=feather_m4_express
make -C ports/esp32s2 BOARD=espressif_saola_1_wroom
make -C ports/litex BOARD=fomu
make -C ports/mimxrt10xx BOARD=feather_mimxrt1011
make -C ports/nrf BOARD=feather_nrf52840_express
make -C ports/stm BOARD=feather_stm32f405_express

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@ -58,7 +58,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop,
uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
bool sigint_enabled) {
@ -195,7 +195,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
SERCOM_USART_CTRLA_FORM_Msk);
sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_TXPO(tx_pad / 2) |
SERCOM_USART_CTRLA_RXPO(rx_pad) |
(parity == PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM(1));
(parity == BUSIO_UART_PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM(1));
// Enable tx and/or rx based on whether the pins were specified.
// CHSIZE is 0 for 8 bits, 5, 6, 7 for 5, 6, 7 bits. 1 for 9 bits, but we don't support that.
@ -206,7 +206,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
SERCOM_USART_CTRLB_CHSIZE_Msk);
sercom->USART.CTRLB.reg |= (have_tx ? SERCOM_USART_CTRLB_TXEN : 0) |
(have_rx ? SERCOM_USART_CTRLB_RXEN : 0) |
(parity == PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0) |
(parity == BUSIO_UART_PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0) |
(stop > 1 ? SERCOM_USART_CTRLB_SBMODE : 0) |
SERCOM_USART_CTRLB_CHSIZE(bits % 8);

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@ -56,7 +56,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop,
uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
bool sigint_enabled) {
struct termios tio;
@ -69,7 +69,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
mp_raise_ValueError(translate("Could not initialize UART"));
}
if (parity != PARITY_NONE) {
if (parity != BUSIO_UART_PARITY_NONE) {
mp_raise_ValueError(translate("Could not initialize UART"));
}

View File

@ -3,7 +3,7 @@
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Damien P. George
* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries LLC
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@ -27,6 +27,8 @@
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/busio/UART.h"
#include "driver/uart.h"
#include "mpconfigport.h"
#include "lib/utils/interrupt_char.h"
#include "py/gc.h"
@ -36,208 +38,178 @@
#include "supervisor/shared/translate.h"
#include "supervisor/shared/tick.h"
#define UART_DEBUG(...) (void)0
// #define UART_DEBUG(...) mp_printf(&mp_plat_print __VA_OPT__(,) __VA_ARGS__)
// Do-nothing callback needed so that usart_async code will enable rx interrupts.
// See comment below re usart_async_register_callback()
// static void usart_async_rxc_callback(const struct usart_async_descriptor *const descr) {
// // Nothing needs to be done by us.
// }
void uart_reset(void) {
for (uart_port_t num = 0; num < UART_NUM_MAX; num++) {
// Ignore the UART used by the IDF.
#ifdef CONFIG_CONSOLE_UART_NUM
if (num == CONFIG_CONSOLE_UART_NUM) {
continue;
}
#endif
if (uart_is_driver_installed(num)) {
uart_driver_delete(num);
}
}
}
void common_hal_busio_uart_construct(busio_uart_obj_t *self,
const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop,
uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
bool sigint_enabled) {
// uint8_t sercom_index = 255; // Unset index
// uint32_t rx_pinmux = 0;
// uint8_t rx_pad = 255; // Unset pad
// uint32_t tx_pinmux = 0;
// uint8_t tx_pad = 255; // Unset pad
// if ((rts != NULL) || (cts != NULL) || (rs485_dir != NULL) || (rs485_invert)) {
// mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device"));
// }
// if (bits > 8) {
// mp_raise_NotImplementedError(translate("bytes > 8 bits not supported"));
// }
if (bits > 8) {
mp_raise_NotImplementedError(translate("bytes > 8 bits not supported"));
}
bool have_tx = tx != NULL;
bool have_rx = rx != NULL;
bool have_rts = rts != NULL;
bool have_cts = cts != NULL;
bool have_rs485_dir = rs485_dir != NULL;
if (!have_tx && !have_rx) {
mp_raise_ValueError(translate("tx and rx cannot both be None"));
}
self->baudrate = baudrate;
self->character_bits = bits;
// Filter for sane settings for RS485
if (have_rs485_dir) {
if (have_rts || have_cts) {
mp_raise_ValueError(translate("Cannot specify RTS or CTS in RS485 mode"));
}
} else if (rs485_invert) {
mp_raise_ValueError(translate("RS485 inversion specified when not in RS485 mode"));
}
self->timeout_ms = timeout * 1000;
// This assignment is only here because the usart_async routines take a *const argument.
// struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
self->uart_num = UART_NUM_MAX;
for (uart_port_t num = 0; num < UART_NUM_MAX; num++) {
if (!uart_is_driver_installed(num)) {
self->uart_num = num;
}
}
if (self->uart_num == UART_NUM_MAX) {
mp_raise_ValueError(translate("All UART peripherals are in use"));
}
// for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) {
// Sercom* potential_sercom = NULL;
// if (have_tx) {
// sercom_index = tx->sercom[i].index;
// if (sercom_index >= SERCOM_INST_NUM) {
// continue;
// }
// potential_sercom = sercom_insts[sercom_index];
// #ifdef SAMD21
// if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 ||
// !(tx->sercom[i].pad == 0 ||
// tx->sercom[i].pad == 2)) {
// continue;
// }
// #endif
// #ifdef SAMD51
// if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 ||
// !(tx->sercom[i].pad == 0)) {
// continue;
// }
// #endif
// tx_pinmux = PINMUX(tx->number, (i == 0) ? MUX_C : MUX_D);
// tx_pad = tx->sercom[i].pad;
// if (rx == NULL) {
// sercom = potential_sercom;
// break;
// }
// }
// for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) {
// if (((!have_tx && rx->sercom[j].index < SERCOM_INST_NUM &&
// sercom_insts[rx->sercom[j].index]->USART.CTRLA.bit.ENABLE == 0) ||
// sercom_index == rx->sercom[j].index) &&
// rx->sercom[j].pad != tx_pad) {
// rx_pinmux = PINMUX(rx->number, (j == 0) ? MUX_C : MUX_D);
// rx_pad = rx->sercom[j].pad;
// sercom = sercom_insts[rx->sercom[j].index];
// sercom_index = rx->sercom[j].index;
// break;
// }
// }
// if (sercom != NULL) {
// break;
// }
// }
// if (sercom == NULL) {
// mp_raise_ValueError(translate("Invalid pins"));
// }
// if (!have_tx) {
// tx_pad = 0;
// if (rx_pad == 0) {
// tx_pad = 2;
// }
// }
// if (!have_rx) {
// rx_pad = (tx_pad + 1) % 4;
// }
uart_mode_t mode = UART_MODE_UART;
uart_hw_flowcontrol_t flow_control = UART_HW_FLOWCTRL_DISABLE;
if (have_rs485_dir) {
mode = UART_MODE_RS485_HALF_DUPLEX;
if (!rs485_invert) {
uart_set_line_inverse(self->uart_num, UART_SIGNAL_DTR_INV);
}
} else if (have_rts && have_cts) {
flow_control = UART_HW_FLOWCTRL_CTS_RTS;
} else if (have_rts) {
flow_control = UART_HW_FLOWCTRL_RTS;
} else if (have_rts) {
flow_control = UART_HW_FLOWCTRL_CTS;
}
// // Set up clocks on SERCOM.
// samd_peripherals_sercom_clock_init(sercom, sercom_index);
if (receiver_buffer_size <= UART_FIFO_LEN) {
receiver_buffer_size = UART_FIFO_LEN + 8;
}
// if (rx && receiver_buffer_size > 0) {
// self->buffer_length = receiver_buffer_size;
// // Initially allocate the UART's buffer in the long-lived part of the
// // heap. UARTs are generally long-lived objects, but the "make long-
// // lived" machinery is incapable of moving internal pointers like
// // self->buffer, so do it manually. (However, as long as internal
// // pointers like this are NOT moved, allocating the buffer
// // in the long-lived pool is not strictly necessary)
// self->buffer = (uint8_t *) gc_alloc(self->buffer_length * sizeof(uint8_t), false, true);
// if (self->buffer == NULL) {
// common_hal_busio_uart_deinit(self);
// mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), self->buffer_length * sizeof(uint8_t));
// }
// } else {
// self->buffer_length = 0;
// self->buffer = NULL;
// }
// if (usart_async_init(usart_desc_p, sercom, self->buffer, self->buffer_length, NULL) != ERR_NONE) {
// mp_raise_ValueError(translate("Could not initialize UART"));
// }
// usart_async_init() sets a number of defaults based on a prototypical SERCOM
// which don't necessarily match what we need. After calling it, set the values
// specific to this instantiation of UART.
// Set pads computed for this SERCOM.
// TXPO:
// 0x0: TX pad 0; no RTS/CTS
// 0x1: TX pad 2; no RTS/CTS
// 0x2: TX pad 0; RTS: pad 2, CTS: pad 3 (not used by us right now)
// So divide by 2 to map pad to value.
// RXPO:
// 0x0: RX pad 0
// 0x1: RX pad 1
// 0x2: RX pad 2
// 0x3: RX pad 3
// Doing a group mask and set of the registers saves 60 bytes over setting the bitfields individually.
// sercom->USART.CTRLA.reg &= ~(SERCOM_USART_CTRLA_TXPO_Msk |
// SERCOM_USART_CTRLA_RXPO_Msk |
// SERCOM_USART_CTRLA_FORM_Msk);
// sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_TXPO(tx_pad / 2) |
// SERCOM_USART_CTRLA_RXPO(rx_pad) |
// (parity == PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM(1));
// Enable tx and/or rx based on whether the pins were specified.
// CHSIZE is 0 for 8 bits, 5, 6, 7 for 5, 6, 7 bits. 1 for 9 bits, but we don't support that.
// sercom->USART.CTRLB.reg &= ~(SERCOM_USART_CTRLB_TXEN |
// SERCOM_USART_CTRLB_RXEN |
// SERCOM_USART_CTRLB_PMODE |
// SERCOM_USART_CTRLB_SBMODE |
// SERCOM_USART_CTRLB_CHSIZE_Msk);
// sercom->USART.CTRLB.reg |= (have_tx ? SERCOM_USART_CTRLB_TXEN : 0) |
// (have_rx ? SERCOM_USART_CTRLB_RXEN : 0) |
// (parity == PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0) |
// (stop > 1 ? SERCOM_USART_CTRLB_SBMODE : 0) |
// SERCOM_USART_CTRLB_CHSIZE(bits % 8);
uint8_t rx_threshold = UART_FIFO_LEN - 8;
// Install the driver before we change the settings.
if (uart_driver_install(self->uart_num, receiver_buffer_size, 0, 0, NULL, 0) != ESP_OK ||
uart_set_mode(self->uart_num, mode) != ESP_OK) {
mp_raise_ValueError(translate("Could not initialize UART"));
}
uart_set_hw_flow_ctrl(self->uart_num, flow_control, rx_threshold);
// Set baud rate
// common_hal_busio_uart_set_baudrate(self, baudrate);
common_hal_busio_uart_set_baudrate(self, baudrate);
// Turn on rx interrupt handling. The UART async driver has its own set of internal callbacks,
// which are set up by uart_async_init(). These in turn can call user-specified callbacks.
// In fact, the actual interrupts are not enabled unless we set up a user-specified callback.
// This is confusing. It's explained in the Atmel START User Guide -> Implementation Description ->
// Different read function behavior in some asynchronous drivers. As of this writing:
// http://start.atmel.com/static/help/index.html?GUID-79201A5A-226F-4FBB-B0B8-AB0BE0554836
// Look at the ASFv4 code example for async USART.
// usart_async_register_callback(usart_desc_p, USART_ASYNC_RXC_CB, usart_async_rxc_callback);
uart_word_length_t word_length = UART_DATA_8_BITS;
switch (bits) {
// Shared bindings prevents data < 7 bits.
// case 5:
// word_length = UART_DATA_5_BITS;
// break;
// case 6:
// word_length = UART_DATA_6_BITS;
// break;
case 7:
word_length = UART_DATA_7_BITS;
break;
case 8:
word_length = UART_DATA_8_BITS;
break;
default:
// Won't hit this because shared-bindings limits to 7-9 bits. We error on 9 above.
break;
}
uart_set_word_length(self->uart_num, word_length);
uart_parity_t parity_mode = UART_PARITY_DISABLE;
switch (parity) {
case BUSIO_UART_PARITY_NONE:
parity_mode = UART_PARITY_DISABLE;
break;
case BUSIO_UART_PARITY_EVEN:
parity_mode = UART_PARITY_EVEN;
break;
case BUSIO_UART_PARITY_ODD:
parity_mode = UART_PARITY_ODD;
break;
default:
// Won't reach here because the input is an enum that is completely handled.
break;
}
uart_set_parity(self->uart_num, parity_mode);
// if (have_tx) {
// gpio_set_pin_direction(tx->number, GPIO_DIRECTION_OUT);
// gpio_set_pin_pull_mode(tx->number, GPIO_PULL_OFF);
// gpio_set_pin_function(tx->number, tx_pinmux);
// self->tx_pin = tx->number;
// claim_pin(tx);
// } else {
// self->tx_pin = NO_PIN;
// }
// Stop is 1 or 2 always.
uart_stop_bits_t stop_bits= UART_STOP_BITS_1;
if (stop == 2) {
stop_bits = UART_STOP_BITS_2;
}
uart_set_stop_bits(self->uart_num, stop_bits);
// if (have_rx) {
// gpio_set_pin_direction(rx->number, GPIO_DIRECTION_IN);
// gpio_set_pin_pull_mode(rx->number, GPIO_PULL_OFF);
// gpio_set_pin_function(rx->number, rx_pinmux);
// self->rx_pin = rx->number;
// claim_pin(rx);
// } else {
// self->rx_pin = NO_PIN;
// }
self->tx_pin = NULL;
self->rx_pin = NULL;
self->rts_pin = NULL;
self->cts_pin = NULL;
int tx_num = -1;
int rx_num = -1;
int rts_num = -1;
int cts_num = -1;
if (have_tx) {
claim_pin(tx);
self->tx_pin = tx;
tx_num = tx->number;
}
// usart_async_enable(usart_desc_p);
if (have_rx) {
claim_pin(rx);
self->rx_pin = rx;
rx_num = rx->number;
}
if (have_rts) {
claim_pin(rts);
self->rts_pin = rts;
rts_num = rts->number;
}
if (have_cts) {
claim_pin(cts);
self->cts_pin = cts;
cts_num = cts->number;
}
if (have_rs485_dir) {
claim_pin(rs485_dir);
// RTS is used for RS485 direction.
self->rts_pin = rs485_dir;
rts_num = rs485_dir->number;
}
if (uart_set_pin(self->uart_num, tx_num, rx_num, rts_num, cts_num) != ESP_OK) {
mp_raise_ValueError(translate("Invalid pins"));
}
}
bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) {
@ -248,14 +220,16 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) {
if (common_hal_busio_uart_deinited(self)) {
return;
}
// // This assignment is only here because the usart_async routines take a *const argument.
// struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
// usart_async_disable(usart_desc_p);
// usart_async_deinit(usart_desc_p);
uart_driver_delete(self->uart_num);
reset_pin(self->rx_pin);
reset_pin(self->tx_pin);
reset_pin(self->rts_pin);
reset_pin(self->cts_pin);
self->rx_pin = NULL;
self->tx_pin = NULL;
self->cts_pin = NULL;
self->rts_pin = NULL;
}
// Read characters.
@ -263,57 +237,49 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
if (self->rx_pin == NULL) {
mp_raise_ValueError(translate("No RX pin"));
}
// This assignment is only here because the usart_async routines take a *const argument.
// struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
if (len == 0) {
// Nothing to read.
return 0;
}
// struct io_descriptor *io;
// usart_async_get_io_descriptor(usart_desc_p, &io);
// size_t total_read = 0;
// uint64_t start_ticks = supervisor_ticks_ms64();
size_t total_read = 0;
uint64_t start_ticks = supervisor_ticks_ms64();
// Busy-wait until timeout or until we've read enough chars.
// while (supervisor_ticks_ms64() - start_ticks <= self->timeout_ms) {
// // Read as many chars as we can right now, up to len.
// size_t num_read = io_read(io, data, len);
while (supervisor_ticks_ms64() - start_ticks <= self->timeout_ms) {
// Read as many chars as we can right now, up to len.
size_t num_read = uart_read_bytes(self->uart_num, data, len, 0);
// // Advance pointer in data buffer, and decrease how many chars left to read.
// data += num_read;
// len -= num_read;
// total_read += num_read;
// if (len == 0) {
// // Don't need to read any more: data buf is full.
// break;
// }
// if (num_read > 0) {
// // Reset the timeout on every character read.
// start_ticks = supervisor_ticks_ms64();
// }
// RUN_BACKGROUND_TASKS;
// // Allow user to break out of a timeout with a KeyboardInterrupt.
// if (mp_hal_is_interrupted()) {
// break;
// }
// // If we are zero timeout, make sure we don't loop again (in the event
// // we read in under 1ms)
// if (self->timeout_ms == 0) {
// break;
// }
// }
// Advance pointer in data buffer, and decrease how many chars left to read.
data += num_read;
len -= num_read;
total_read += num_read;
if (len == 0) {
// Don't need to read any more: data buf is full.
break;
}
if (num_read > 0) {
// Reset the timeout on every character read.
start_ticks = supervisor_ticks_ms64();
}
RUN_BACKGROUND_TASKS;
// Allow user to break out of a timeout with a KeyboardInterrupt.
if (mp_hal_is_interrupted()) {
break;
}
// If we are zero timeout, make sure we don't loop again (in the event
// we read in under 1ms)
if (self->timeout_ms == 0) {
break;
}
}
// if (total_read == 0) {
// *errcode = EAGAIN;
// return MP_STREAM_ERROR;
// }
if (total_read == 0) {
*errcode = EAGAIN;
return MP_STREAM_ERROR;
}
// return total_read;
return 0;
return total_read;
}
// Write characters.
@ -322,49 +288,34 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data,
mp_raise_ValueError(translate("No TX pin"));
}
// This assignment is only here because the usart_async routines take a *const argument.
// struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
// struct io_descriptor *io;
// usart_async_get_io_descriptor(usart_desc_p, &io);
// // Start writing characters. This is non-blocking and will
// // return immediately after setting up the write.
// if (io_write(io, data, len) < 0) {
// *errcode = MP_EAGAIN;
// return MP_STREAM_ERROR;
// }
// // Busy-wait until all characters transmitted.
// struct usart_async_status async_status;
// while (true) {
// usart_async_get_status(usart_desc_p, &async_status);
// if (async_status.txcnt >= len) {
// break;
// }
// RUN_BACKGROUND_TASKS;
// }
while (len > 0) {
int count = uart_tx_chars(self->uart_num, (const char*) data, len);
if (count < 0) {
*errcode = MP_EAGAIN;
return MP_STREAM_ERROR;
}
len -= count;
data += count;
RUN_BACKGROUND_TASKS;
}
while (uart_wait_tx_done(self->uart_num, 0) == ESP_ERR_TIMEOUT) {
RUN_BACKGROUND_TASKS;
}
return len;
}
uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) {
return self->baudrate;
uint32_t baudrate;
uart_get_baudrate(self->uart_num, &baudrate);
return baudrate;
}
void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) {
// This assignment is only here because the usart_async routines take a *const argument.
// struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
// usart_async_set_baud_rate(usart_desc_p,
// // Samples and ARITHMETIC vs FRACTIONAL must correspond to USART_SAMPR in
// // hpl_sercom_config.h.
// _usart_async_calculate_baud_rate(baudrate, // e.g. 9600 baud
// PROTOTYPE_SERCOM_USART_ASYNC_CLOCK_FREQUENCY,
// 16, // samples
// USART_BAUDRATE_ASYNCH_ARITHMETIC,
// 0 // fraction - not used for ARITHMETIC
// ));
self->baudrate = baudrate;
if (baudrate > UART_BITRATE_MAX ||
uart_set_baudrate(self->uart_num, baudrate) != ESP_OK) {
mp_raise_ValueError(translate("Unsupported baudrate"));
}
}
mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) {
@ -376,19 +327,13 @@ void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeou
}
uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) {
// This assignment is only here because the usart_async routines take a *const argument.
// struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
// struct usart_async_status async_status;
// usart_async_get_status(usart_desc_p, &async_status);
// return async_status.rxcnt;
return 0;
size_t count;
uart_get_buffered_data_len(self->uart_num, &count);
return count;
}
void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) {
// This assignment is only here because the usart_async routines take a *const argument.
// struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
// usart_async_flush_rx_buffer(usart_desc_p);
uart_flush(self->uart_num);
}
// True if there are no characters still to be written.
@ -396,10 +341,5 @@ bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) {
if (self->tx_pin == NULL) {
return false;
}
// This assignment is only here because the usart_async routines take a *const argument.
// struct usart_async_descriptor * const usart_desc_p = (struct usart_async_descriptor * const) &self->usart_desc;
// struct usart_async_status async_status;
// usart_async_get_status(usart_desc_p, &async_status);
// return !(async_status.flags & USART_ASYNC_STATUS_BUSY);
return false;
return uart_wait_tx_done(self->uart_num, 0) != ESP_ERR_TIMEOUT;
}

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@ -29,18 +29,19 @@
#include "common-hal/microcontroller/Pin.h"
#include "esp-idf/components/soc/include/hal/uart_types.h"
#include "py/obj.h"
typedef struct {
mp_obj_base_t base;
const mcu_pin_obj_t* rx_pin;
const mcu_pin_obj_t* tx_pin;
const mcu_pin_obj_t* rts_pin;
const mcu_pin_obj_t* cts_pin;
uart_port_t uart_num;
uint8_t character_bits;
bool rx_error;
uint32_t baudrate;
uint32_t timeout_ms;
uint32_t buffer_length;
uint8_t* buffer;
} busio_uart_obj_t;
void uart_reset(void);

@ -1 +1 @@
Subproject commit 7aae7f034bab68d2dd6aaa763924c91eb697d87e
Subproject commit 648f959037896cff887a05b67105748790bfe63a

View File

@ -85,7 +85,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop,
uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
bool sigint_enabled) {
@ -94,7 +94,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
self->timeout_ms = timeout * 1000;
// We are transmitting one direction if one pin is NULL and the other isn't.
bool is_onedirection = (rx != NULL) != (tx != NULL);
bool is_onedirection = (rx == NULL) != (tx == NULL);
bool uart_taken = false;
const uint32_t rx_count = MP_ARRAY_SIZE(mcu_uart_rx_list);

View File

@ -133,7 +133,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop,
uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
bool sigint_enabled) {
@ -162,7 +162,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
mp_raise_ValueError(translate("Invalid buffer size"));
}
if ( parity == PARITY_ODD ) {
if ( parity == BUSIO_UART_PARITY_ODD ) {
mp_raise_ValueError(translate("Odd parity is not supported"));
}
@ -176,7 +176,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
.interrupt_priority = 7,
.hal_cfg = {
.hwfc = NRF_UARTE_HWFC_DISABLED,
.parity = (parity == PARITY_NONE) ? NRF_UARTE_PARITY_EXCLUDED : NRF_UARTE_PARITY_INCLUDED
.parity = (parity == BUSIO_UART_PARITY_NONE) ? NRF_UARTE_PARITY_EXCLUDED : NRF_UARTE_PARITY_INCLUDED
}
};

View File

@ -79,7 +79,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop,
uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
bool sigint_enabled) {
@ -201,8 +201,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
self->handle.Init.BaudRate = baudrate;
self->handle.Init.WordLength = (bits == 9) ? UART_WORDLENGTH_9B : UART_WORDLENGTH_8B;
self->handle.Init.StopBits = (stop > 1) ? UART_STOPBITS_2 : UART_STOPBITS_1;
self->handle.Init.Parity = (parity == PARITY_ODD) ? UART_PARITY_ODD :
(parity == PARITY_EVEN) ? UART_PARITY_EVEN :
self->handle.Init.Parity = (parity == BUSIO_UART_PARITY_ODD) ? UART_PARITY_ODD :
(parity == BUSIO_UART_PARITY_EVEN) ? UART_PARITY_EVEN :
UART_PARITY_NONE;
self->handle.Init.Mode = (self->tx != NULL && self->rx != NULL) ? UART_MODE_TX_RX :
(self->tx != NULL) ? UART_MODE_TX :

View File

@ -52,8 +52,8 @@
//| :param ~microcontroller.Pin rx: the pin to receive on, or ``None`` if this ``UART`` is transmit-only.
//| :param ~microcontroller.Pin rts: the pin for rts, or ``None`` if rts not in use.
//| :param ~microcontroller.Pin cts: the pin for cts, or ``None`` if cts not in use.
//| :param ~microcontroller.Pin rs485_dir: the pin for rs485 direction setting, or ``None`` if rs485 not in use.
//| :param bool rs485_invert: set to invert the sense of the rs485_dir pin.
//| :param ~microcontroller.Pin rs485_dir: the output pin for rs485 direction setting, or ``None`` if rs485 not in use.
//| :param bool rs485_invert: rs485_dir pin active high when set. Active low otherwise.
//| :param int baudrate: the transmit and receive speed.
//| :param int bits: the number of bits per byte, 7, 8 or 9.
//| :param Parity parity: the parity used for error checking.
@ -87,8 +87,8 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co
enum { ARG_tx, ARG_rx, ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_receiver_buffer_size,
ARG_rts, ARG_cts, ARG_rs485_dir,ARG_rs485_invert};
static const mp_arg_t allowed_args[] = {
{ MP_QSTR_tx, MP_ARG_REQUIRED | MP_ARG_OBJ },
{ MP_QSTR_rx, MP_ARG_REQUIRED | MP_ARG_OBJ },
{ MP_QSTR_tx, MP_ARG_OBJ, {.u_obj = mp_const_none} },
{ MP_QSTR_rx, MP_ARG_OBJ, {.u_obj = mp_const_none} },
{ MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 9600} },
{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
{ MP_QSTR_parity, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
@ -115,11 +115,11 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co
mp_raise_ValueError(translate("bits must be 7, 8 or 9"));
}
uart_parity_t parity = PARITY_NONE;
busio_uart_parity_t parity = BUSIO_UART_PARITY_NONE;
if (args[ARG_parity].u_obj == &busio_uart_parity_even_obj) {
parity = PARITY_EVEN;
parity = BUSIO_UART_PARITY_EVEN;
} else if (args[ARG_parity].u_obj == &busio_uart_parity_odd_obj) {
parity = PARITY_ODD;
parity = BUSIO_UART_PARITY_ODD;
}
uint8_t stop = args[ARG_stop].u_int;

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@ -34,17 +34,17 @@
extern const mp_obj_type_t busio_uart_type;
typedef enum {
PARITY_NONE,
PARITY_EVEN,
PARITY_ODD
} uart_parity_t;
BUSIO_UART_PARITY_NONE,
BUSIO_UART_PARITY_EVEN,
BUSIO_UART_PARITY_ODD
} busio_uart_parity_t;
// Construct an underlying UART object.
extern void common_hal_busio_uart_construct(busio_uart_obj_t *self,
const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
const mcu_pin_obj_t * rs485_dir, bool rs485_invert,
uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop,
uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop,
mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer,
bool sigint_enabled);

View File

@ -123,7 +123,7 @@ mp_obj_t common_hal_board_create_uart(void) {
#endif
common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485_dir, rs485_invert,
9600, 8, PARITY_NONE, 1, 1.0f, 64, NULL, false);
9600, 8, BUSIO_UART_PARITY_NONE, 1, 1.0f, 64, NULL, false);
MP_STATE_VM(shared_uart_bus) = MP_OBJ_FROM_PTR(self);
return MP_STATE_VM(shared_uart_bus);
}