2014-05-03 18:27:38 -04:00
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/*
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2017-06-30 03:22:17 -04:00
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* This file is part of the MicroPython project, http://micropython.org/
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2014-05-03 18:27:38 -04:00
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2014-08-06 17:33:31 -04:00
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#include <stdio.h>
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2014-03-24 11:15:33 -04:00
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#include <stdint.h>
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#include <string.h>
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2015-01-01 16:06:20 -05:00
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#include "py/runtime.h"
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2014-04-15 14:52:56 -04:00
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#include "timer.h"
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2014-03-24 11:15:33 -04:00
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#include "dac.h"
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2015-12-01 03:42:47 -05:00
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#include "dma.h"
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2014-10-26 17:46:06 -04:00
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#include "pin.h"
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#include "genhdr/pins.h"
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2014-03-24 11:15:33 -04:00
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2014-04-29 17:55:34 -04:00
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/// \moduleref pyb
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/// \class DAC - digital to analog conversion
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///
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2014-05-02 11:58:15 -04:00
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/// The DAC is used to output analog values (a specific voltage) on pin X5 or pin X6.
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/// The voltage will be between 0 and 3.3V.
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///
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/// *This module will undergo changes to the API.*
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///
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/// Example usage:
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///
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/// from pyb import DAC
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///
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/// dac = DAC(1) # create DAC 1 on pin X5
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/// dac.write(128) # write a value to the DAC (makes X5 1.65V)
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///
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/// To output a continuous sine-wave:
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///
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/// import math
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/// from pyb import DAC
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///
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/// # create a buffer containing a sine-wave
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/// buf = bytearray(100)
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/// for i in range(len(buf)):
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2014-05-19 14:08:12 -04:00
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/// buf[i] = 128 + int(127 * math.sin(2 * math.pi * i / len(buf)))
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2014-05-02 11:58:15 -04:00
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///
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/// # output the sine-wave at 400Hz
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/// dac = DAC(1)
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/// dac.write_timed(buf, 400 * len(buf), mode=DAC.CIRCULAR)
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2014-04-29 17:55:34 -04:00
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2016-03-22 06:28:35 -04:00
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#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC
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2014-08-05 18:35:21 -04:00
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2014-03-24 11:15:33 -04:00
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STATIC DAC_HandleTypeDef DAC_Handle;
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void dac_init(void) {
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2014-08-06 17:33:31 -04:00
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memset(&DAC_Handle, 0, sizeof DAC_Handle);
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2014-03-24 11:15:33 -04:00
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DAC_Handle.Instance = DAC;
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DAC_Handle.State = HAL_DAC_STATE_RESET;
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HAL_DAC_Init(&DAC_Handle);
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}
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2015-04-18 10:54:15 -04:00
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#if defined(TIM6)
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2014-03-24 11:15:33 -04:00
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STATIC void TIM6_Config(uint freq) {
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2014-04-15 14:52:56 -04:00
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// Init TIM6 at the required frequency (in Hz)
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2015-07-22 14:37:21 -04:00
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TIM_HandleTypeDef *tim = timer_tim6_init(freq);
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2014-03-24 11:15:33 -04:00
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// TIM6 TRGO selection
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TIM_MasterConfigTypeDef config;
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config.MasterOutputTrigger = TIM_TRGO_UPDATE;
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config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
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2015-07-22 14:37:21 -04:00
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HAL_TIMEx_MasterConfigSynchronization(tim, &config);
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2014-03-24 11:15:33 -04:00
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// TIM6 start counter
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2015-07-22 14:37:21 -04:00
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HAL_TIM_Base_Start(tim);
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2014-03-24 11:15:33 -04:00
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}
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2015-04-18 10:54:15 -04:00
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#endif
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2014-03-24 11:15:33 -04:00
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2015-07-21 18:37:45 -04:00
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STATIC uint32_t TIMx_Config(mp_obj_t timer) {
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// TRGO selection to trigger DAC
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TIM_HandleTypeDef *tim = pyb_timer_get_handle(timer);
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TIM_MasterConfigTypeDef config;
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config.MasterOutputTrigger = TIM_TRGO_UPDATE;
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config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
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HAL_TIMEx_MasterConfigSynchronization(tim, &config);
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// work out the trigger channel (only certain ones are supported)
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if (tim->Instance == TIM2) {
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return DAC_TRIGGER_T2_TRGO;
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} else if (tim->Instance == TIM4) {
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return DAC_TRIGGER_T4_TRGO;
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} else if (tim->Instance == TIM5) {
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return DAC_TRIGGER_T5_TRGO;
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#if defined(TIM6)
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} else if (tim->Instance == TIM6) {
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return DAC_TRIGGER_T6_TRGO;
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#endif
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#if defined(TIM7)
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} else if (tim->Instance == TIM7) {
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return DAC_TRIGGER_T7_TRGO;
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#endif
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#if defined(TIM8)
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} else if (tim->Instance == TIM8) {
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return DAC_TRIGGER_T8_TRGO;
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#endif
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} else {
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2017-08-09 00:40:45 -04:00
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mp_raise_ValueError("Timer does not support DAC triggering");
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2015-07-21 18:37:45 -04:00
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}
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}
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2014-03-24 11:15:33 -04:00
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/******************************************************************************/
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2017-06-30 03:22:17 -04:00
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// MicroPython bindings
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2014-03-24 11:15:33 -04:00
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2015-07-21 17:05:56 -04:00
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typedef enum {
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DAC_STATE_RESET,
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DAC_STATE_WRITE_SINGLE,
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DAC_STATE_BUILTIN_WAVEFORM,
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2015-07-21 18:37:45 -04:00
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DAC_STATE_DMA_WAVEFORM, // should be last enum since we use space beyond it
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2015-07-21 17:05:56 -04:00
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} pyb_dac_state_t;
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2014-03-24 11:15:33 -04:00
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typedef struct _pyb_dac_obj_t {
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mp_obj_base_t base;
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uint32_t dac_channel; // DAC_CHANNEL_1 or DAC_CHANNEL_2
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2016-03-22 06:28:35 -04:00
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const dma_descr_t *tx_dma_descr;
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2015-10-13 09:33:04 -04:00
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uint16_t pin; // GPIO_PIN_4 or GPIO_PIN_5
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uint8_t bits; // 8 or 12
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uint8_t state;
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2014-03-24 11:15:33 -04:00
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} pyb_dac_obj_t;
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2017-08-29 20:59:58 -04:00
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STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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2015-10-13 09:33:04 -04:00
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
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};
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// parse args
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// GPIO configuration
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.Pin = self->pin;
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GPIO_InitStructure.Mode = GPIO_MODE_ANALOG;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
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// DAC peripheral clock
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2018-03-16 19:42:50 -04:00
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#if defined(STM32F4) || defined(STM32F7)
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2015-10-13 09:33:04 -04:00
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__DAC_CLK_ENABLE();
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2018-03-16 19:42:50 -04:00
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#elif defined(STM32L4)
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2016-03-22 06:28:35 -04:00
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__HAL_RCC_DAC1_CLK_ENABLE();
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#else
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#error Unsupported Processor
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#endif
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2015-10-13 09:33:04 -04:00
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// stop anything already going on
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2016-06-13 03:54:57 -04:00
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__DMA1_CLK_ENABLE();
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DMA_HandleTypeDef DMA_Handle;
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/* Get currently configured dma */
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dma_init_handle(&DMA_Handle, self->tx_dma_descr, (void*)NULL);
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// Need to deinit DMA first
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DMA_Handle.State = HAL_DMA_STATE_READY;
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HAL_DMA_DeInit(&DMA_Handle);
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2015-10-13 09:33:04 -04:00
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HAL_DAC_Stop(&DAC_Handle, self->dac_channel);
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if ((self->dac_channel == DAC_CHANNEL_1 && DAC_Handle.DMA_Handle1 != NULL)
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|| (self->dac_channel == DAC_CHANNEL_2 && DAC_Handle.DMA_Handle2 != NULL)) {
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HAL_DAC_Stop_DMA(&DAC_Handle, self->dac_channel);
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}
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// set bit resolution
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if (args[0].u_int == 8 || args[0].u_int == 12) {
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self->bits = args[0].u_int;
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} else {
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2017-06-14 21:54:41 -04:00
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mp_raise_ValueError("unsupported bits");
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2015-10-13 09:33:04 -04:00
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}
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// reset state of DAC
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self->state = DAC_STATE_RESET;
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return mp_const_none;
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}
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2014-03-24 11:15:33 -04:00
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// create the dac object
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// currently support either DAC1 on X5 (id = 1) or DAC2 on X6 (id = 2)
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2014-10-26 17:46:06 -04:00
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/// \classmethod \constructor(port)
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2014-05-02 11:58:15 -04:00
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/// Construct a new DAC object.
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///
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2014-10-26 17:46:06 -04:00
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/// `port` can be a pin object, or an integer (1 or 2).
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/// DAC(1) is on pin X5 and DAC(2) is on pin X6.
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2017-01-04 08:10:42 -05:00
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STATIC mp_obj_t pyb_dac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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2014-03-24 11:15:33 -04:00
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// check arguments
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2015-10-13 09:33:04 -04:00
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mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
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2014-03-24 11:15:33 -04:00
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2014-10-26 17:46:06 -04:00
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// get pin/channel to output on
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mp_int_t dac_id;
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if (MP_OBJ_IS_INT(args[0])) {
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dac_id = mp_obj_get_int(args[0]);
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} else {
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const pin_obj_t *pin = pin_find(args[0]);
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if (pin == &pin_A4) {
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dac_id = 1;
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} else if (pin == &pin_A5) {
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dac_id = 2;
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} else {
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2017-06-14 22:02:14 -04:00
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%q) doesn't have DAC capabilities", pin->name));
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2014-10-26 17:46:06 -04:00
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}
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}
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2014-04-21 08:06:19 -04:00
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pyb_dac_obj_t *dac = m_new_obj(pyb_dac_obj_t);
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dac->base.type = &pyb_dac_type;
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2014-03-24 11:15:33 -04:00
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if (dac_id == 1) {
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2015-10-13 09:33:04 -04:00
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dac->pin = GPIO_PIN_4;
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2014-04-21 08:06:19 -04:00
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dac->dac_channel = DAC_CHANNEL_1;
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2016-03-22 06:28:35 -04:00
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dac->tx_dma_descr = &dma_DAC_1_TX;
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2014-03-24 11:15:33 -04:00
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} else if (dac_id == 2) {
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2015-10-13 09:33:04 -04:00
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dac->pin = GPIO_PIN_5;
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2014-04-21 08:06:19 -04:00
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dac->dac_channel = DAC_CHANNEL_2;
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2016-03-22 06:28:35 -04:00
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dac->tx_dma_descr = &dma_DAC_2_TX;
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2014-03-24 11:15:33 -04:00
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} else {
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2017-06-14 22:02:14 -04:00
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "DAC(%d) doesn't exist", dac_id));
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2014-03-24 11:15:33 -04:00
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}
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2015-10-13 09:33:04 -04:00
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// configure the peripheral
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mp_map_t kw_args;
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mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
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pyb_dac_init_helper(dac, n_args - 1, args + 1, &kw_args);
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2014-03-24 11:15:33 -04:00
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// return object
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2014-04-21 08:06:19 -04:00
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return dac;
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2014-03-24 11:15:33 -04:00
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}
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2017-08-29 20:59:58 -04:00
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STATIC mp_obj_t pyb_dac_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
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2015-10-13 09:33:04 -04:00
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return pyb_dac_init_helper(args[0], n_args - 1, args + 1, kw_args);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_dac_init_obj, 1, pyb_dac_init);
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2016-05-26 02:39:04 -04:00
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/// \method deinit()
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/// Turn off the DAC, enable other use of pin.
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STATIC mp_obj_t pyb_dac_deinit(mp_obj_t self_in) {
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pyb_dac_obj_t *self = self_in;
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if (self->dac_channel == DAC_CHANNEL_1) {
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DAC_Handle.Instance->CR &= ~DAC_CR_EN1;
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DAC_Handle.Instance->CR |= DAC_CR_BOFF1;
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} else {
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DAC_Handle.Instance->CR &= ~DAC_CR_EN2;
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DAC_Handle.Instance->CR |= DAC_CR_BOFF2;
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}
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_dac_deinit_obj, pyb_dac_deinit);
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2015-04-18 10:54:15 -04:00
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#if defined(TIM6)
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2014-05-02 11:58:15 -04:00
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/// \method noise(freq)
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/// Generate a pseudo-random noise signal. A new random sample is written
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/// to the DAC output at the given frequency.
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2014-03-24 11:15:33 -04:00
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STATIC mp_obj_t pyb_dac_noise(mp_obj_t self_in, mp_obj_t freq) {
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pyb_dac_obj_t *self = self_in;
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// set TIM6 to trigger the DAC at the given frequency
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TIM6_Config(mp_obj_get_int(freq));
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2015-07-21 17:05:56 -04:00
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if (self->state != DAC_STATE_BUILTIN_WAVEFORM) {
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2014-03-24 11:15:33 -04:00
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// configure DAC to trigger via TIM6
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DAC_ChannelConfTypeDef config;
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config.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
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|
|
config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
|
|
|
|
HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel);
|
2015-07-21 17:05:56 -04:00
|
|
|
self->state = DAC_STATE_BUILTIN_WAVEFORM;
|
2014-03-24 11:15:33 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// set noise wave generation
|
|
|
|
HAL_DACEx_NoiseWaveGenerate(&DAC_Handle, self->dac_channel, DAC_LFSRUNMASK_BITS10_0);
|
|
|
|
HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_L, 0x7ff0);
|
|
|
|
HAL_DAC_Start(&DAC_Handle, self->dac_channel);
|
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_noise_obj, pyb_dac_noise);
|
2015-04-18 10:54:15 -04:00
|
|
|
#endif
|
2014-03-24 11:15:33 -04:00
|
|
|
|
2015-04-18 10:54:15 -04:00
|
|
|
#if defined(TIM6)
|
2014-05-02 11:58:15 -04:00
|
|
|
/// \method triangle(freq)
|
|
|
|
/// Generate a triangle wave. The value on the DAC output changes at
|
|
|
|
/// the given frequency, and the frequence of the repeating triangle wave
|
|
|
|
/// itself is 256 (or 1024, need to check) times smaller.
|
2014-03-24 11:15:33 -04:00
|
|
|
STATIC mp_obj_t pyb_dac_triangle(mp_obj_t self_in, mp_obj_t freq) {
|
|
|
|
pyb_dac_obj_t *self = self_in;
|
|
|
|
|
|
|
|
// set TIM6 to trigger the DAC at the given frequency
|
|
|
|
TIM6_Config(mp_obj_get_int(freq));
|
|
|
|
|
2015-07-21 17:05:56 -04:00
|
|
|
if (self->state != DAC_STATE_BUILTIN_WAVEFORM) {
|
2014-03-24 11:15:33 -04:00
|
|
|
// configure DAC to trigger via TIM6
|
|
|
|
DAC_ChannelConfTypeDef config;
|
|
|
|
config.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
|
|
|
|
config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
|
|
|
|
HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel);
|
2015-07-21 17:05:56 -04:00
|
|
|
self->state = DAC_STATE_BUILTIN_WAVEFORM;
|
2014-03-24 11:15:33 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// set triangle wave generation
|
|
|
|
HAL_DACEx_TriangleWaveGenerate(&DAC_Handle, self->dac_channel, DAC_TRIANGLEAMPLITUDE_1023);
|
|
|
|
HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_R, 0x100);
|
|
|
|
HAL_DAC_Start(&DAC_Handle, self->dac_channel);
|
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_triangle_obj, pyb_dac_triangle);
|
2015-04-18 10:54:15 -04:00
|
|
|
#endif
|
2014-03-24 11:15:33 -04:00
|
|
|
|
2014-05-02 11:58:15 -04:00
|
|
|
/// \method write(value)
|
|
|
|
/// Direct access to the DAC output (8 bit only at the moment).
|
2014-03-24 11:15:33 -04:00
|
|
|
STATIC mp_obj_t pyb_dac_write(mp_obj_t self_in, mp_obj_t val) {
|
|
|
|
pyb_dac_obj_t *self = self_in;
|
|
|
|
|
2015-07-21 17:05:56 -04:00
|
|
|
if (self->state != DAC_STATE_WRITE_SINGLE) {
|
2014-03-24 11:15:33 -04:00
|
|
|
DAC_ChannelConfTypeDef config;
|
|
|
|
config.DAC_Trigger = DAC_TRIGGER_NONE;
|
|
|
|
config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE;
|
|
|
|
HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel);
|
2015-07-21 17:05:56 -04:00
|
|
|
self->state = DAC_STATE_WRITE_SINGLE;
|
2014-03-24 11:15:33 -04:00
|
|
|
}
|
|
|
|
|
2015-10-13 09:33:04 -04:00
|
|
|
// DAC output is always 12-bit at the hardware level, and we provide support
|
|
|
|
// for multiple bit "resolutions" simply by shifting the input value.
|
|
|
|
HAL_DAC_SetValue(&DAC_Handle, self->dac_channel, DAC_ALIGN_12B_R,
|
|
|
|
mp_obj_get_int(val) << (12 - self->bits));
|
|
|
|
|
2014-03-24 11:15:33 -04:00
|
|
|
HAL_DAC_Start(&DAC_Handle, self->dac_channel);
|
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_write_obj, pyb_dac_write);
|
|
|
|
|
2015-04-18 10:54:15 -04:00
|
|
|
#if defined(TIM6)
|
2014-05-02 11:58:15 -04:00
|
|
|
/// \method write_timed(data, freq, *, mode=DAC.NORMAL)
|
|
|
|
/// Initiates a burst of RAM to DAC using a DMA transfer.
|
|
|
|
/// The input data is treated as an array of bytes (8 bit data).
|
|
|
|
///
|
2015-07-21 18:37:45 -04:00
|
|
|
/// `freq` can be an integer specifying the frequency to write the DAC
|
|
|
|
/// samples at, using Timer(6). Or it can be an already-initialised
|
|
|
|
/// Timer object which is used to trigger the DAC sample. Valid timers
|
|
|
|
/// are 2, 4, 5, 6, 7 and 8.
|
|
|
|
///
|
2014-05-02 11:58:15 -04:00
|
|
|
/// `mode` can be `DAC.NORMAL` or `DAC.CIRCULAR`.
|
|
|
|
///
|
2014-04-21 08:06:19 -04:00
|
|
|
// TODO add callback argument, to call when transfer is finished
|
|
|
|
// TODO add double buffer argument
|
2015-07-21 18:37:45 -04:00
|
|
|
//
|
|
|
|
// TODO reconsider API, eg: write_trig(data, *, trig=None, loop=False)
|
|
|
|
// Then trigger can be timer (preinitialised with desired freq) or pin (extint9),
|
|
|
|
// and we can reuse the same timer for both DACs (and maybe also ADC) without
|
|
|
|
// setting the freq twice.
|
|
|
|
// Can still do 1-liner: dac.write_trig(buf, trig=Timer(6, freq=100), loop=True)
|
2017-08-29 20:59:58 -04:00
|
|
|
mp_obj_t pyb_dac_write_timed(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
2015-07-21 17:05:56 -04:00
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
2015-07-21 18:37:45 -04:00
|
|
|
{ MP_QSTR_freq, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
|
2015-07-21 17:05:56 -04:00
|
|
|
{ MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DMA_NORMAL} },
|
|
|
|
};
|
2014-03-24 11:15:33 -04:00
|
|
|
|
2014-04-21 08:06:19 -04:00
|
|
|
// parse args
|
2015-07-21 17:05:56 -04:00
|
|
|
pyb_dac_obj_t *self = pos_args[0];
|
|
|
|
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
|
|
|
mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
2014-03-24 11:15:33 -04:00
|
|
|
|
2014-04-21 08:06:19 -04:00
|
|
|
// get the data to write
|
2014-04-18 18:28:56 -04:00
|
|
|
mp_buffer_info_t bufinfo;
|
2015-07-21 17:05:56 -04:00
|
|
|
mp_get_buffer_raise(args[0].u_obj, &bufinfo, MP_BUFFER_READ);
|
2014-04-21 08:06:19 -04:00
|
|
|
|
2015-07-21 18:37:45 -04:00
|
|
|
uint32_t dac_trigger;
|
|
|
|
if (mp_obj_is_integer(args[1].u_obj)) {
|
|
|
|
// set TIM6 to trigger the DAC at the given frequency
|
|
|
|
TIM6_Config(mp_obj_get_int(args[1].u_obj));
|
|
|
|
dac_trigger = DAC_TRIGGER_T6_TRGO;
|
|
|
|
} else {
|
|
|
|
// set the supplied timer to trigger the DAC (timer should be initialised)
|
|
|
|
dac_trigger = TIMx_Config(args[1].u_obj);
|
|
|
|
}
|
2014-03-24 11:15:33 -04:00
|
|
|
|
|
|
|
__DMA1_CLK_ENABLE();
|
|
|
|
|
2016-03-22 06:28:35 -04:00
|
|
|
DMA_HandleTypeDef DMA_Handle;
|
|
|
|
/* Get currently configured dma */
|
|
|
|
dma_init_handle(&DMA_Handle, self->tx_dma_descr, (void*)NULL);
|
2014-03-24 11:15:33 -04:00
|
|
|
/*
|
2016-03-22 06:28:35 -04:00
|
|
|
DMA_Cmd(DMA_Handle->Instance, DISABLE);
|
|
|
|
while (DMA_GetCmdStatus(DMA_Handle->Instance) != DISABLE) {
|
2014-03-24 11:15:33 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
DAC_Cmd(self->dac_channel, DISABLE);
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
// DAC channel configuration
|
|
|
|
DAC_InitTypeDef DAC_InitStructure;
|
|
|
|
DAC_InitStructure.DAC_Trigger = DAC_Trigger_T7_TRGO;
|
|
|
|
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
|
|
|
|
DAC_InitStructure.DAC_LFSRUnmask_TriangleAmplitude = DAC_TriangleAmplitude_1; // unused, but need to set it to a valid value
|
|
|
|
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
|
|
|
|
DAC_Init(self->dac_channel, &DAC_InitStructure);
|
|
|
|
*/
|
|
|
|
|
2014-04-15 14:52:56 -04:00
|
|
|
// Need to deinit DMA first
|
|
|
|
DMA_Handle.State = HAL_DMA_STATE_READY;
|
|
|
|
HAL_DMA_DeInit(&DMA_Handle);
|
|
|
|
|
2015-10-13 09:33:04 -04:00
|
|
|
if (self->bits == 8) {
|
|
|
|
DMA_Handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
|
|
DMA_Handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
|
|
} else {
|
|
|
|
DMA_Handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
|
|
|
DMA_Handle.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
|
|
|
}
|
2015-07-21 17:05:56 -04:00
|
|
|
DMA_Handle.Init.Mode = args[2].u_int;
|
2014-03-24 11:15:33 -04:00
|
|
|
HAL_DMA_Init(&DMA_Handle);
|
|
|
|
|
2014-05-19 13:58:53 -04:00
|
|
|
if (self->dac_channel == DAC_CHANNEL_1) {
|
|
|
|
__HAL_LINKDMA(&DAC_Handle, DMA_Handle1, DMA_Handle);
|
|
|
|
} else {
|
|
|
|
__HAL_LINKDMA(&DAC_Handle, DMA_Handle2, DMA_Handle);
|
|
|
|
}
|
2014-03-24 11:15:33 -04:00
|
|
|
|
2014-04-15 14:52:56 -04:00
|
|
|
DAC_Handle.Instance = DAC;
|
|
|
|
DAC_Handle.State = HAL_DAC_STATE_RESET;
|
|
|
|
HAL_DAC_Init(&DAC_Handle);
|
|
|
|
|
2015-07-21 18:37:45 -04:00
|
|
|
if (self->state != DAC_STATE_DMA_WAVEFORM + dac_trigger) {
|
2014-04-15 14:52:56 -04:00
|
|
|
DAC_ChannelConfTypeDef config;
|
2015-07-21 18:37:45 -04:00
|
|
|
config.DAC_Trigger = dac_trigger;
|
2014-04-15 14:52:56 -04:00
|
|
|
config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
|
|
|
|
HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel);
|
2015-07-21 18:37:45 -04:00
|
|
|
self->state = DAC_STATE_DMA_WAVEFORM + dac_trigger;
|
2014-04-15 14:52:56 -04:00
|
|
|
}
|
|
|
|
|
2015-10-13 09:33:04 -04:00
|
|
|
if (self->bits == 8) {
|
|
|
|
HAL_DAC_Start_DMA(&DAC_Handle, self->dac_channel,
|
|
|
|
(uint32_t*)bufinfo.buf, bufinfo.len, DAC_ALIGN_8B_R);
|
|
|
|
} else {
|
|
|
|
HAL_DAC_Start_DMA(&DAC_Handle, self->dac_channel,
|
|
|
|
(uint32_t*)bufinfo.buf, bufinfo.len / 2, DAC_ALIGN_12B_R);
|
|
|
|
}
|
2014-03-24 11:15:33 -04:00
|
|
|
|
|
|
|
/*
|
|
|
|
// enable DMA stream
|
2016-03-22 06:28:35 -04:00
|
|
|
DMA_Cmd(DMA_Handle->Instance, ENABLE);
|
|
|
|
while (DMA_GetCmdStatus(DMA_Handle->Instance) == DISABLE) {
|
2014-03-24 11:15:33 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// enable DAC channel
|
|
|
|
DAC_Cmd(self->dac_channel, ENABLE);
|
|
|
|
|
|
|
|
// enable DMA for DAC channel
|
|
|
|
DAC_DMACmd(self->dac_channel, ENABLE);
|
|
|
|
*/
|
|
|
|
|
|
|
|
//printf("DMA: %p %lu\n", bufinfo.buf, bufinfo.len);
|
|
|
|
|
|
|
|
return mp_const_none;
|
|
|
|
}
|
2014-04-21 08:06:19 -04:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_dac_write_timed_obj, 1, pyb_dac_write_timed);
|
2015-04-18 10:54:15 -04:00
|
|
|
#endif
|
2014-03-24 11:15:33 -04:00
|
|
|
|
2017-05-06 03:03:40 -04:00
|
|
|
STATIC const mp_rom_map_elem_t pyb_dac_locals_dict_table[] = {
|
2014-04-21 08:06:19 -04:00
|
|
|
// instance methods
|
2017-05-06 03:03:40 -04:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_dac_init_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_dac_deinit_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_dac_write_obj) },
|
2015-04-18 10:54:15 -04:00
|
|
|
#if defined(TIM6)
|
2017-05-06 03:03:40 -04:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_noise), MP_ROM_PTR(&pyb_dac_noise_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_triangle), MP_ROM_PTR(&pyb_dac_triangle_obj) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_write_timed), MP_ROM_PTR(&pyb_dac_write_timed_obj) },
|
2015-04-18 10:54:15 -04:00
|
|
|
#endif
|
2014-04-21 08:06:19 -04:00
|
|
|
|
|
|
|
// class constants
|
2017-05-06 03:03:40 -04:00
|
|
|
{ MP_ROM_QSTR(MP_QSTR_NORMAL), MP_ROM_INT(DMA_NORMAL) },
|
|
|
|
{ MP_ROM_QSTR(MP_QSTR_CIRCULAR), MP_ROM_INT(DMA_CIRCULAR) },
|
2014-03-24 11:15:33 -04:00
|
|
|
};
|
|
|
|
|
2014-03-26 17:47:19 -04:00
|
|
|
STATIC MP_DEFINE_CONST_DICT(pyb_dac_locals_dict, pyb_dac_locals_dict_table);
|
|
|
|
|
2014-03-24 11:15:33 -04:00
|
|
|
const mp_obj_type_t pyb_dac_type = {
|
|
|
|
{ &mp_type_type },
|
|
|
|
.name = MP_QSTR_DAC,
|
|
|
|
.make_new = pyb_dac_make_new,
|
2017-05-06 03:03:40 -04:00
|
|
|
.locals_dict = (mp_obj_dict_t*)&pyb_dac_locals_dict,
|
2014-03-24 11:15:33 -04:00
|
|
|
};
|
2014-08-05 18:35:21 -04:00
|
|
|
|
|
|
|
#endif // MICROPY_HW_ENABLE_DAC
|