2018-06-25 17:33:39 -04:00
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#ifndef NRFX_CONFIG_H__
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#define NRFX_CONFIG_H__
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2018-07-09 15:02:52 -04:00
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// Power
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#define NRFX_POWER_ENABLED 1
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2019-12-17 09:39:52 -05:00
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#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 7
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2018-07-09 15:02:52 -04:00
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2019-10-28 21:08:53 -04:00
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// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH.
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// It doesn't work with the SoftDevice.
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// See https://devzone.nordicsemi.com/f/nordic-q-a/33982/sdk-15-software-crash-during-spi-session
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2018-09-20 20:45:30 -04:00
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// Turn on nrfx supported workarounds for errata in Rev1 of nRF52840
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#ifdef NRF52840_XXAA
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2019-03-12 08:31:03 -04:00
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// #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1
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2018-09-20 20:45:30 -04:00
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#endif
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2018-06-28 16:45:02 -04:00
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// SPI
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2018-06-25 17:33:39 -04:00
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#define NRFX_SPIM_ENABLED 1
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2018-09-20 20:45:30 -04:00
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// TWIM0 and TWIM1 are the same peripherals as SPIM0 and SPIM1.
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// The IRQ handlers for these peripherals are set up at compile time,
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// so out of the box TWIM0/SPIM0 and TWIM1/SPIM1 cannot be shared
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// between common-hal/busio/I2C.c and SPI.c.
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// We could write an interrupt handler that checks whether it's
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2019-10-28 21:08:53 -04:00
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// being used for SPI or I2C, but perhaps one I2C and two SPI or two I2C and one SPI
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// are good enough for now.
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// CIRCUITPY_NRF_NUM_I2C is 1 or 2 to choose how many I2C (TWIM) peripherals
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// to provide.
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2020-02-11 19:19:31 -05:00
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// With SPIM3 working we can have two I2C and two SPI.
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2019-10-28 21:08:53 -04:00
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#ifndef CIRCUITPY_NRF_NUM_I2C
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2020-02-11 19:19:31 -05:00
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#define CIRCUITPY_NRF_NUM_I2C 2
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2019-10-28 21:08:53 -04:00
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#endif
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2020-04-19 01:53:51 -04:00
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#if CIRCUITPY_NRF_NUM_I2C != 0 && CIRCUITPY_NRF_NUM_I2C != 1 && CIRCUITPY_NRF_NUM_I2C != 2
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# error CIRCUITPY_NRF_NUM_I2C must be 0, 1, or 2
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2019-10-28 21:08:53 -04:00
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#endif
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2018-09-20 20:45:30 -04:00
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2019-03-12 08:31:03 -04:00
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// Enable SPIM1, SPIM2 and SPIM3 (if available)
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// No conflict with TWIM0.
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2019-10-28 21:08:53 -04:00
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#if CIRCUITPY_NRF_NUM_I2C == 1
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2019-03-12 08:31:03 -04:00
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#define NRFX_SPIM1_ENABLED 1
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2019-10-28 21:08:53 -04:00
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#endif
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2018-09-19 21:59:04 -04:00
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#define NRFX_SPIM2_ENABLED 1
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2020-05-07 05:00:51 -04:00
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#ifndef NRFX_SPIM3_ENABLED
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2020-04-16 22:35:33 -04:00
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#if defined(NRF52840_XXAA) || defined(NRF52833_XXAA)
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2020-02-11 19:19:31 -05:00
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#define NRFX_SPIM_EXTENDED_ENABLED 1
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#define NRFX_SPIM3_ENABLED 1
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2020-04-19 01:53:51 -04:00
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#elif CIRCUITPY_NRF_NUM_I2C == 2
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2020-02-11 19:19:31 -05:00
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#define NRFX_SPIM3_ENABLED 0
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#endif
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2020-05-07 05:00:51 -04:00
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#endif
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2018-06-25 17:33:39 -04:00
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2018-09-19 21:59:04 -04:00
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2018-06-25 17:33:39 -04:00
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#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
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#define NRFX_SPIM_MISO_PULL_CFG 1
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2018-10-19 21:46:22 -04:00
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// QSPI
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2020-04-16 22:35:33 -04:00
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#if defined(NRF52840_XXAA)
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2018-10-19 21:46:22 -04:00
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#define NRFX_QSPI_ENABLED 1
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2020-04-16 22:35:33 -04:00
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#endif
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2018-10-19 21:46:22 -04:00
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2019-10-28 21:08:53 -04:00
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// TWI aka. I2C; always enable TWIM0 (no conflict with SPIM1 and SPIM2)
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2020-04-19 01:53:51 -04:00
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#if CIRCUITPY_NRF_NUM_I2C == 1 || CIRCUITPY_NRF_NUM_I2C == 2
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2018-06-28 16:45:02 -04:00
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#define NRFX_TWIM_ENABLED 1
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#define NRFX_TWIM0_ENABLED 1
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2020-04-19 01:53:51 -04:00
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#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
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#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY NRF_TWIM_FREQ_400K
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#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
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#endif
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2019-10-28 21:08:53 -04:00
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#if CIRCUITPY_NRF_NUM_I2C == 2
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#define NRFX_TWIM1_ENABLED 1
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#endif
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2018-06-28 16:45:02 -04:00
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2018-07-08 09:17:06 -04:00
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// UART
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2018-09-24 03:37:28 -04:00
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#define NRFX_UARTE_ENABLED 1
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#define NRFX_UARTE0_ENABLED 1
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2019-02-12 22:34:05 -05:00
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#define NRFX_UARTE1_ENABLED 1
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2018-07-04 05:40:53 -04:00
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2018-09-05 02:18:36 -04:00
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// PWM
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#define NRFX_PWM0_ENABLED 1
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#define NRFX_PWM1_ENABLED 1
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#define NRFX_PWM2_ENABLED 1
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#ifdef NRF_PWM3
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#define NRFX_PWM3_ENABLED 1
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#else
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#define NRFX_PWM3_ENABLED 0
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#endif
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2019-02-07 07:50:14 -05:00
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#define NRFX_RTC_ENABLED 1
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#define NRFX_RTC0_ENABLED 1
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2019-04-01 20:38:58 -04:00
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#define NRFX_RTC1_ENABLED 1
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#define NRFX_RTC2_ENABLED 1
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2019-02-07 07:50:14 -05:00
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2018-10-16 11:05:02 -04:00
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// TIMERS
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#define NRFX_TIMER_ENABLED 1
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// Don't enable TIMER0: it's used by the SoftDevice.
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2019-07-27 13:20:59 -04:00
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#define NRFX_TIMER0_ENABLED 0
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2018-10-16 11:05:02 -04:00
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#define NRFX_TIMER1_ENABLED 1
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#define NRFX_TIMER2_ENABLED 1
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2019-07-22 10:37:05 -04:00
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#ifdef NRF_TIMER3
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2018-10-16 11:05:02 -04:00
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#define NRFX_TIMER3_ENABLED 1
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#else
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#define NRFX_TIMER3_ENABLED 0
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#endif
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2019-07-22 10:37:05 -04:00
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#ifdef NRF_TIMER4
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2018-10-16 11:05:02 -04:00
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#define NRFX_TIMER4_ENABLED 1
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#else
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#define NRFX_TIMER4_ENABLED 0
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#endif
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#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7
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2018-12-18 10:05:17 -05:00
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// GPIO interrupt
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#define NRFX_GPIOTE_ENABLED 1
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#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
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#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 7
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2019-12-17 09:39:52 -05:00
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// NVM controller
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#define NRFX_NVMC_ENABLED 1
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2020-05-22 05:29:54 -04:00
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// Watchdog timer
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#define NRFX_WDT_ENABLED 1
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#define NRFX_WDT0_ENABLED 1
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// This IRQ indicates the system will reboot shortly, so give
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// it a high priority.
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#define NRFX_WDT_DEFAULT_CONFIG_IRQ_PRIORITY 1
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2018-09-19 21:59:04 -04:00
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#endif // NRFX_CONFIG_H__
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