458 lines
13 KiB
C
458 lines
13 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021,2022 Renesas Electronics Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hal_data.h"
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#include "ra_config.h"
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#include "ra_gpio.h"
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#include "ra_utils.h"
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#include "ra_spi.h"
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#if defined(__GNUC__)
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#pragma GCC diagnostic ignored "-Wunused-parameter"
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#pragma GCC diagnostic ignored "-Wconversion"
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// #pragma GCC diagnostic ignored "-Wshift-negative-value"
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// #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
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// #pragma GCC diagnostic ignored "-Wsequence-point"
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// #pragma GCC diagnostic ignored "-Wunused-function"
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#endif
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static R_SPI0_Type *spi_regs[] = {
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(R_SPI0_Type *)0x40072000,
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(R_SPI0_Type *)0x40072100,
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};
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static const ra_af_pin_t mosi_pins[] = {
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#if defined(RA4M1)
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{ AF_SPI, 0, P101 }, /* MOSIA */
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{ AF_SPI, 0, P411 }, /* MOSIA */
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{ AF_SPI, 1, P109 }, /* MOSIB */
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{ AF_SPI, 1, P203 }, /* MOSIB */
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#elif defined(RA4W1)
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{ AF_SPI, 0, P101 }, /* MOSIA */
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{ AF_SPI, 1, P109 }, /* MOSIB */
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#elif defined(RA6M1)
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{ AF_SPI, 0, P101 }, /* MOSIA_A */
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{ AF_SPI, 0, P411 }, /* MOSIA_B */
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{ AF_SPI, 1, P109 }, /* MOSIB_B */
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#elif defined(RA6M2)
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{ AF_SPI, 0, P101 }, /* MOSIA_A */
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{ AF_SPI, 0, P411 }, /* MOSIA_B */
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{ AF_SPI, 1, P109 }, /* MOSIB_B */
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{ AF_SPI, 1, P203 }, /* MOSIB_A */
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{ AF_SPI, 1, P701 }, /* MOSIB_C */
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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};
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#define MOSI_PINS_SIZE sizeof(mosi_pins) / sizeof(ra_af_pin_t)
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static const ra_af_pin_t miso_pins[] = {
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#if defined(RA4M1)
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{ AF_SPI, 0, P100 }, /* MISOA */
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{ AF_SPI, 0, P410 }, /* MISOA */
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{ AF_SPI, 1, P110 }, /* MISOB */
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{ AF_SPI, 1, P202 }, /* MISOB */
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#elif defined(RA4W1)
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{ AF_SPI, 0, P100 }, /* MISOA */
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{ AF_SPI, 1, P110 }, /* MISOB */
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#elif defined(RA6M1)
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{ AF_SPI, 0, P100 }, /* MISOA_A */
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{ AF_SPI, 0, P410 }, /* MISOA_B */
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{ AF_SPI, 1, P110 }, /* MISOB_B */
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#elif defined(RA6M2)
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{ AF_SPI, 0, P100 }, /* MISOA_A */
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{ AF_SPI, 0, P410 }, /* MISOA_B */
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{ AF_SPI, 1, P110 }, /* MISOB_B */
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{ AF_SPI, 1, P202 }, /* MISOB_A */
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{ AF_SPI, 1, P700 }, /* MISOB_C */
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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};
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#define MISO_PINS_SIZE sizeof(miso_pins) / sizeof(ra_af_pin_t)
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static const ra_af_pin_t sck_pins[] = {
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#if defined(RA4M1)
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{ AF_SPI, 0, P102 }, /* RSPCKA */
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{ AF_SPI, 0, P412 }, /* RSPCKA */
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{ AF_SPI, 1, P111 }, /* RSPCKB */
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{ AF_SPI, 1, P204 }, /* RSPCKB */
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#elif defined(RA4W1)
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{ AF_SPI, 0, P102 }, /* RSPCKA */
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{ AF_SPI, 1, P111 }, /* RSPCKB */
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#elif defined(RA6M1)
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{ AF_SPI, 0, P102 }, /* RSPCKA_A */
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{ AF_SPI, 0, P412 }, /* RSPCKA_B */
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{ AF_SPI, 1, P111 }, /* RSPCKB_B */
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#elif defined(RA6M2)
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{ AF_SPI, 0, P102 }, /* RSPCKA_A */
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{ AF_SPI, 0, P412 }, /* RSPCKA_B */
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{ AF_SPI, 1, P111 }, /* RSPCKB_B */
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{ AF_SPI, 1, P204 }, /* RSPCKB_A */
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{ AF_SPI, 1, P702 }, /* RSPCKB_C */
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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};
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#define SCK_PINS_SIZE sizeof(sck_pins) / sizeof(ra_af_pin_t)
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bool ra_af_find_ch(ra_af_pin_t *af_pin, uint32_t size, uint32_t pin, uint8_t *ch) {
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bool find = false;
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uint32_t i;
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for (i = 0; i < size; i++) {
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if (af_pin->pin == pin) {
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find = true;
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*ch = af_pin->ch;
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break;
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}
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af_pin++;
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}
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return find;
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}
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bool ra_spi_find_af_ch(uint32_t mosi, uint32_t miso, uint32_t sck, uint8_t *ch) {
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bool find = false;
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uint8_t mosi_ch;
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uint8_t miso_ch;
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uint8_t sck_ch;
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find = ra_af_find_ch((ra_af_pin_t *)&mosi_pins, MOSI_PINS_SIZE, mosi, &mosi_ch);
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if (find) {
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find = ra_af_find_ch((ra_af_pin_t *)&miso_pins, MISO_PINS_SIZE, miso, &miso_ch);
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if (find) {
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find = ra_af_find_ch((ra_af_pin_t *)&sck_pins, SCK_PINS_SIZE, sck, &sck_ch);
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if (find) {
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find = (mosi_ch == miso_ch) && (miso_ch == sck_ch);
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if (find) {
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*ch = mosi_ch;
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} else {
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*ch = 0;
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}
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}
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}
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}
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return find;
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}
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static void ra_spi_module_start(uint32_t ch) {
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if (ch == 0) {
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ra_mstpcrb_start(R_MSTP_MSTPCRB_MSTPB19_Msk);
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} else {
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ra_mstpcrb_start(R_MSTP_MSTPCRB_MSTPB18_Msk);
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}
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}
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static void ra_spi_module_stop(uint32_t ch) {
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if (ch == 0) {
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ra_mstpcrb_stop(R_MSTP_MSTPCRB_MSTPB19_Msk);
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} else {
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ra_mstpcrb_stop(R_MSTP_MSTPCRB_MSTPB18_Msk);
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}
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}
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static void ra_spi_set_pin(uint32_t pin, bool miso) {
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if (miso) {
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ra_gpio_config(pin, GPIO_MODE_INPUT, 1, 0, AF_SPI);
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} else {
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ra_gpio_config(pin, GPIO_MODE_AF_PP, 0, 0, AF_SPI);
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}
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}
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void ra_spi_set_bits(uint32_t ch, uint32_t bits) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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if (bits == 8) {
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spi_reg->SPDCR_b.SPBYT = 1;
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spi_reg->SPDCR_b.SPLW = 0;
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spi_reg->SPCMD_b[0].SPB = 0x7;
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} else if (bits == 16) {
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spi_reg->SPDCR_b.SPBYT = 0;
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spi_reg->SPDCR_b.SPLW = 0;
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spi_reg->SPCMD_b[0].SPB = 0xf;
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} else if (bits == 32) {
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spi_reg->SPDCR_b.SPBYT = 0;
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spi_reg->SPDCR_b.SPLW = 1;
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spi_reg->SPCMD_b[0].SPB = 0x3;
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}
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}
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void ra_spi_set_clk(uint32_t ch, uint32_t baud) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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if (baud == 0) {
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return;
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}
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spi_reg->SPCR_b.SPE = 0;
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spi_reg->SPBR = (PCLK / 2 / baud) - 1;
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spi_reg->SPCR_b.SPE = 1;
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}
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void ra_spi_set_lsb_first(uint32_t ch, uint32_t lsb_first) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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if (lsb_first) {
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spi_reg->SPCMD_b[0].LSBF = 1; // LSB first
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} else {
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spi_reg->SPCMD_b[0].LSBF = 0; // MSB first
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}
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}
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void ra_spi_set_mode(uint32_t ch, uint32_t polarity, uint32_t phase) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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if (polarity != 0) {
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// CPOL(Clock Polarity)
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spi_reg->SPCMD_b[0].CPOL = 1;
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} else {
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spi_reg->SPCMD_b[0].CPOL = 0;
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}
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if (phase != 0) {
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// CPHA(Clock Phase)
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spi_reg->SPCMD_b[0].CPHA = 1;
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} else {
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spi_reg->SPCMD_b[0].CPHA = 0;
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}
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}
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void ra_spi_set_ch(uint32_t ch) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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spi_reg->SPCR = 0x00; // disable SPI
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spi_reg->SPSR = 0xa0;
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spi_reg->SPPCR = 0x00; // fixed idle value, disable loop-back mode
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spi_reg->SPSCR = 0x00; // Disable sequence control
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spi_reg->SPDCR = 0x40; // SPBYT=1, SPLW=0 byte access
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spi_reg->SPCMD[0] = 0xe700; // LSBF=0, SPB=7, BRDV=0, CPOL=0, CPHA=0
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spi_reg->SPCR2 = 0x10;
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spi_reg->SPCR = 0x48; // Start SPI in master mode
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}
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uint8_t ra_spi_write_byte(uint32_t ch, uint8_t b) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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while (spi_reg->SPSR_b.SPTEF == 0) {
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;
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}
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spi_reg->SPDR_BY = (uint8_t)(b);
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while (spi_reg->SPSR_b.SPRF == 0) {
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;
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}
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return (uint8_t)(spi_reg->SPDR_BY);
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}
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void ra_spi_write_bytes8(uint32_t ch, uint8_t *buf, uint32_t count) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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ra_spi_set_bits(ch, 8);
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while (count-- > 0) {
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while (spi_reg->SPSR_b.SPTEF == 0) {
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;
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}
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spi_reg->SPDR_BY = (uint8_t)(*buf++);
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while (spi_reg->SPSR_b.SPRF == 0) {
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;
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}
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spi_reg->SPDR_BY;
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}
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}
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void ra_spi_read_bytes8(uint32_t ch, uint8_t *buf, uint32_t count) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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ra_spi_set_bits(ch, 8);
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while (count-- > 0) {
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while (spi_reg->SPSR_b.SPTEF == 0) {
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;
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}
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spi_reg->SPDR_BY = (uint8_t)(0);
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while (spi_reg->SPSR_b.SPRF == 0) {
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;
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}
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*buf++ = (uint8_t)spi_reg->SPDR_BY;
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}
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}
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void ra_spi_write_bytes16(uint32_t ch, uint16_t *buf, uint32_t count) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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ra_spi_set_bits(ch, 16);
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while (count-- > 0) {
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while (spi_reg->SPSR_b.SPTEF == 0) {
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;
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}
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spi_reg->SPDR_HA = (uint16_t)(*buf++);
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while (spi_reg->SPSR_b.SPRF == 0) {
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;
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}
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spi_reg->SPDR_HA;
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}
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}
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void ra_spi_write_bytes32(uint32_t ch, uint32_t *buf, uint32_t count) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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ra_spi_set_bits(ch, 32);
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while (count-- > 0) {
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while (spi_reg->SPSR_b.SPTEF == 0) {
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;
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}
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spi_reg->SPDR = (uint32_t)(*buf++);
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while (spi_reg->SPSR_b.SPRF == 0) {
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;
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}
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spi_reg->SPDR;
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}
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}
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void ra_spi_write_bytes(uint32_t ch, uint32_t bits, uint8_t *buf, uint32_t count) {
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if (bits == 8) {
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ra_spi_write_bytes8(ch, buf, count);
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} else if (bits == 16) {
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ra_spi_write_bytes16(ch, (uint16_t *)buf, count >> 1);
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} else if (bits == 32) {
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ra_spi_write_bytes32(ch, (uint32_t *)buf, count >> 2);
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}
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}
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void ra_spi_transfer8(uint32_t ch, uint8_t *dst, uint8_t *src, uint32_t count) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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ra_spi_set_bits(ch, 8);
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while (count-- > 0) {
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while (spi_reg->SPSR_b.SPTEF == 0) {
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;
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}
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spi_reg->SPDR_BY = (uint8_t)(*src++);
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while (spi_reg->SPSR_b.SPRF == 0) {
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;
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}
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*dst++ = (uint8_t)(spi_reg->SPDR_BY);
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}
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}
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void ra_spi_transfer16(uint32_t ch, uint16_t *dst, uint16_t *src, uint32_t count) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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ra_spi_set_bits(ch, 16);
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while (count-- > 0) {
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while (spi_reg->SPSR_b.SPTEF == 0) {
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;
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}
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spi_reg->SPDR_HA = (uint16_t)(*src++);
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while (spi_reg->SPSR_b.SPRF == 0) {
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;
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}
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*dst++ = (uint16_t)(spi_reg->SPDR_HA);
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}
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}
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void ra_spi_transfer32(uint32_t ch, uint32_t *dst, uint32_t *src, uint32_t count) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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ra_spi_set_bits(ch, 32);
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while (count-- > 0) {
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while (spi_reg->SPSR_b.SPTEF == 0) {
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;
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}
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spi_reg->SPDR = (uint32_t)(*src++);
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while (spi_reg->SPSR_b.SPRF == 0) {
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;
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}
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*dst++ = (uint32_t)(spi_reg->SPDR);
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}
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}
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void ra_spi_transfer(uint32_t ch, uint32_t bits, uint8_t *dst, uint8_t *src, uint32_t count, uint32_t timeout) {
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if (bits == 8) {
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ra_spi_transfer8(ch, dst, src, count);
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} else if (bits == 16) {
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ra_spi_transfer16(ch, (uint16_t *)dst, (uint16_t *)src, count >> 1);
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} else if (bits == 32) {
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ra_spi_transfer32(ch, (uint32_t *)dst, (uint32_t *)src, count >> 2);
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}
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}
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void ra_spi_start_xfer(uint32_t ch, uint16_t spcmd, uint8_t spbr) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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spi_reg->SPCR_b.SPE = 0; // disable
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spi_reg->SPCMD[0] = spcmd;
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spi_reg->SPBR = spbr;
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spi_reg->SPCR_b.SPE = 1; // enable
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}
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void ra_spi_end_xfer(uint32_t ch) {
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(void)ch;
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}
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void ra_spi_get_conf(uint32_t ch, uint16_t *spcmd, uint8_t *spbr) {
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R_SPI0_Type *spi_reg = (R_SPI0_Type *)spi_regs[ch];
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*spcmd = spi_reg->SPCMD[0];
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*spbr = spi_reg->SPBR;
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}
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void ra_spi_init(uint32_t ch, uint32_t mosi, uint32_t miso, uint32_t sck, uint32_t cs, uint32_t baud, uint32_t bits, uint32_t polarity, uint32_t phase) {
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ra_gpio_mode_output(cs);
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ra_gpio_write(cs, 1);
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ra_spi_module_start(ch);
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ra_spi_set_pin(mosi, false);
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ra_spi_set_pin(miso, true);
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ra_spi_set_pin(sck, false);
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ra_spi_set_mode(ch, polarity, phase);
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ra_spi_set_ch(ch);
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ra_spi_set_clk(ch, baud);
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ra_spi_set_bits(ch, bits);
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ra_spi_set_lsb_first(ch, 0); // MSB first
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return;
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}
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void ra_spi_deinit(uint32_t ch, uint32_t cs) {
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ra_spi_module_stop(ch);
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}
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__WEAK void spi_rxi_isr(void) {
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// dummy
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|
}
|
|
|
|
__WEAK void spi_txi_isr(void) {
|
|
// dummy
|
|
}
|
|
|
|
__WEAK void spi_tei_isr(void) {
|
|
// dummy
|
|
}
|
|
|
|
__WEAK void spi_eri_isr(void) {
|
|
// dummy
|
|
}
|