eea6cd85b3
Ensures consistent behaviour and resolves the D-Cache bug (the "exhaustive" argument being lost due to cache being turned off) when O0 is used. The changes in this commit are: - Change -O0 to -Os because "gcc is considered broken at -O0" according to https://github.com/ARM-software/CMSIS_5/issues/620#issuecomment-550235656 - Use volatile for mem_base so the compiler doesn't optimise away reads or writes to the SDRAM, which is being tested. - Use DSB to prevent any other compiler optimisations that would change the testing logic. - Use alternating pattern/antipattern in exhaustive test to catch more hardware/configuration errors. Implementation adapted by @andrewleech, taken directly from investigation by @iabdalkader and @dpgeorge. See #7841 and #7869 for further discussion. |
||
---|---|---|
.. | ||
bare-arm | ||
cc3200 | ||
esp32 | ||
esp8266 | ||
javascript | ||
mimxrt | ||
minimal | ||
nrf | ||
pic16bit | ||
powerpc | ||
qemu-arm | ||
rp2 | ||
samd | ||
stm32 | ||
teensy | ||
unix | ||
windows | ||
zephyr |