e76c7466b6
Latest versions of Sphinx (at least 3.1.0) do not need the `*` escaped and will render the `\` in the output if it is there, so remove it. Fixes issue #6209.
102 lines
3.7 KiB
ReStructuredText
102 lines
3.7 KiB
ReStructuredText
.. currentmodule:: machine
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.. _machine.SPI:
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class SPI -- a Serial Peripheral Interface bus protocol (master side)
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=====================================================================
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SPI is a synchronous serial protocol that is driven by a master. At the
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physical level, a bus consists of 3 lines: SCK, MOSI, MISO. Multiple devices
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can share the same bus. Each device should have a separate, 4th signal,
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SS (Slave Select), to select a particular device on a bus with which
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communication takes place. Management of an SS signal should happen in
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user code (via machine.Pin class).
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Constructors
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------------
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.. class:: SPI(id, ...)
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Construct an SPI object on the given bus, ``id``. Values of ``id`` depend
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on a particular port and its hardware. Values 0, 1, etc. are commonly used
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to select hardware SPI block #0, #1, etc. Value -1 can be used for
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bitbanging (software) implementation of SPI (if supported by a port).
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With no additional parameters, the SPI object is created but not
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initialised (it has the settings from the last initialisation of
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the bus, if any). If extra arguments are given, the bus is initialised.
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See ``init`` for parameters of initialisation.
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Methods
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-------
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.. method:: SPI.init(baudrate=1000000, *, polarity=0, phase=0, bits=8, firstbit=SPI.MSB, sck=None, mosi=None, miso=None, pins=(SCK, MOSI, MISO))
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Initialise the SPI bus with the given parameters:
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- ``baudrate`` is the SCK clock rate.
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- ``polarity`` can be 0 or 1, and is the level the idle clock line sits at.
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- ``phase`` can be 0 or 1 to sample data on the first or second clock edge
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respectively.
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- ``bits`` is the width in bits of each transfer. Only 8 is guaranteed to be supported by all hardware.
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- ``firstbit`` can be ``SPI.MSB`` or ``SPI.LSB``.
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- ``sck``, ``mosi``, ``miso`` are pins (machine.Pin) objects to use for bus signals. For most
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hardware SPI blocks (as selected by ``id`` parameter to the constructor), pins are fixed
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and cannot be changed. In some cases, hardware blocks allow 2-3 alternative pin sets for
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a hardware SPI block. Arbitrary pin assignments are possible only for a bitbanging SPI driver
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(``id`` = -1).
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- ``pins`` - WiPy port doesn't ``sck``, ``mosi``, ``miso`` arguments, and instead allows to
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specify them as a tuple of ``pins`` parameter.
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In the case of hardware SPI the actual clock frequency may be lower than the
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requested baudrate. This is dependant on the platform hardware. The actual
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rate may be determined by printing the SPI object.
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.. method:: SPI.deinit()
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Turn off the SPI bus.
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.. method:: SPI.read(nbytes, write=0x00)
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Read a number of bytes specified by ``nbytes`` while continuously writing
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the single byte given by ``write``.
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Returns a ``bytes`` object with the data that was read.
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.. method:: SPI.readinto(buf, write=0x00)
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Read into the buffer specified by ``buf`` while continuously writing the
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single byte given by ``write``.
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Returns ``None``.
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Note: on WiPy this function returns the number of bytes read.
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.. method:: SPI.write(buf)
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Write the bytes contained in ``buf``.
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Returns ``None``.
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Note: on WiPy this function returns the number of bytes written.
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.. method:: SPI.write_readinto(write_buf, read_buf)
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Write the bytes from ``write_buf`` while reading into ``read_buf``. The
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buffers can be the same or different, but both buffers must have the
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same length.
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Returns ``None``.
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Note: on WiPy this function returns the number of bytes written.
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Constants
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---------
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.. data:: SPI.MASTER
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for initialising the SPI bus to master; this is only used for the WiPy
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.. data:: SPI.MSB
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set the first bit to be the most significant bit
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.. data:: SPI.LSB
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set the first bit to be the least significant bit
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