120 lines
3.3 KiB
Makefile
120 lines
3.3 KiB
Makefile
ifneq ($(MKENV_INCLUDED),1)
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# We assume that mkenv is in the same directory as this file.
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THIS_MAKEFILE = $(lastword $(MAKEFILE_LIST))
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include $(dir $(THIS_MAKEFILE))mkenv.mk
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endif
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# This file expects that OBJ contains a list of all of the object files.
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# The directory portion of each object file is used to locate the source
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# and should not contain any ..'s but rather be relative to the top of the
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# tree.
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#
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# So for example, py/map.c would have an object file name py/map.o
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# The object files will go into the build directory and mantain the same
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# directory structure as the source tree. So the final dependency will look
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# like this:
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#
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# build/py/map.o: py/map.c
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#
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# We set vpath to point to the top of the tree so that the source files
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# can be located. By following this scheme, it allows a single build rule
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# to be used to compile all .c files.
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vpath %.S . $(TOP)
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$(BUILD)/%.o: %.S
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$(ECHO) "CC $<"
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$(Q)$(CC) $(CFLAGS) -c -o $@ $<
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vpath %.s . $(TOP)
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$(BUILD)/%.o: %.s
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$(ECHO) "AS $<"
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$(Q)$(AS) -o $@ $<
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define compile_c
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$(ECHO) "CC $<"
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$(Q)$(CC) $(CFLAGS) -c -MD -o $@ $<
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@# The following fixes the dependency file.
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@# See http://make.paulandlesley.org/autodep.html for details.
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@# Regex adjusted from the above to play better with Windows paths, etc.
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@$(CP) $(@:.o=.d) $(@:.o=.P); \
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$(SED) -e 's/#.*//' -e 's/^.*: *//' -e 's/ *\\$$//' \
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-e '/^$$/ d' -e 's/$$/ :/' < $(@:.o=.d) >> $(@:.o=.P); \
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$(RM) -f $(@:.o=.d)
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endef
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vpath %.c . $(TOP)
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$(BUILD)/%.o: %.c
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$(call compile_c)
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$(BUILD)/%.pp: %.c
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$(ECHO) "PreProcess $<"
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$(Q)$(CC) $(CFLAGS) -E -Wp,-C,-dD,-dI -o $@ $<
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# The following rule uses | to create an order only prereuisite. Order only
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# prerequisites only get built if they don't exist. They don't cause timestamp
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# checking to be performed.
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#
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# We don't know which source files actually need the generated.h (since
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# it is #included from str.h). The compiler generated dependencies will cause
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# the right .o's to get recompiled if the generated.h file changes. Adding
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# an order-only dependendency to all of the .o's will cause the generated .h
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# to get built before we try to compile any of them.
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$(OBJ): | $(HEADER_BUILD)/qstrdefs.generated.h $(HEADER_BUILD)/mpversion.h
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# $(sort $(var)) removes duplicates
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#
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# The net effect of this, is it causes the objects to depend on the
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# object directories (but only for existence), and the object directories
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# will be created if they don't exist.
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OBJ_DIRS = $(sort $(dir $(OBJ)))
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$(OBJ): | $(OBJ_DIRS)
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$(OBJ_DIRS):
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$(MKDIR) -p $@
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$(HEADER_BUILD):
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$(MKDIR) -p $@
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ifneq ($(PROG),)
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# Build a standalone executable (unix does this)
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all: $(PROG)
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$(PROG): $(OBJ)
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$(ECHO) "LINK $@"
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# Do not pass COPT here - it's *C* compiler optimizations. For example,
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# we may want to compile using Thumb, but link with non-Thumb libc.
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$(Q)$(CC) -o $@ $^ $(LIB) $(LDFLAGS)
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ifndef DEBUG
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$(Q)$(STRIP) $(STRIPFLAGS_EXTRA) $(PROG)
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endif
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$(Q)$(SIZE) $(PROG)
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lib: $(OBJ)
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$(AR) rcs libmicropython.a $^
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clean: clean-prog
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clean-prog:
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$(RM) -f $(PROG)
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$(RM) -f $(PROG).map
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.PHONY: clean-prog
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endif
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clean:
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$(RM) -rf $(BUILD)
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.PHONY: clean
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print-cfg:
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$(ECHO) "PY_SRC = $(PY_SRC)"
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$(ECHO) "BUILD = $(BUILD)"
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$(ECHO) "OBJ = $(OBJ)"
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.PHONY: print-cfg
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print-def:
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@$(ECHO) "The following defines are built into the $(CC) compiler"
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touch __empty__.c
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@$(CC) -E -Wp,-dM __empty__.c
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@$(RM) -f __empty__.c
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-include $(OBJ:.o=.P)
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