99 lines
2.8 KiB
Plaintext
99 lines
2.8 KiB
Plaintext
/* Memory layout for default case.
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FLASH_ISR .isr_vector
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FLASH_FIRMWARE .text
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FLASH_FIRMWARE .data
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FLASH_FS // ignored for fs use
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RAM .data
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RAM .bss
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RAM .heap
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RAM .stack
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*/
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ENTRY(Reset_Handler)
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_ld_default_stack_size = _minimum_stack_size;
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/* define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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/* This first flash block is 16K annd the isr vectors only take up
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about 400 bytes. Micropython pads this with files, but this didn't
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work with the size of Circuitpython's ff object. */
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. = ALIGN(4);
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} >FLASH_ISR
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text*) /* .text* sections (code) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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/* *(.glue_7) */ /* glue arm to thumb code */
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/* *(.glue_7t) */ /* glue thumb to arm code */
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. = ALIGN(4);
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_etext = .; /* define a global symbol at end of code */
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} >FLASH_FIRMWARE
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* This is the initialized data section
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The program executes knowing that the data is in the RAM
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but the loader puts the initial values in the FLASH (inidata).
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It is one task of the startup to copy the initial values from FLASH to RAM. */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
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} >RAM AT> FLASH_FIRMWARE
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/* Uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .; /* define a global symbol at bss start; used by startup code */
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
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} >RAM
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/* this is to define the start of the heap, and make sure we have a minimum size */
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.heap :
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{
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. = ALIGN(4);
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_ld_heap_start = .;
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. = . + _minimum_heap_size;
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. = ALIGN(4);
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} >RAM
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_ld_heap_end = ORIGIN(RAM) + LENGTH(RAM);
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/* this just checks there is enough RAM for the stack */
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.stack :
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{
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. = ALIGN(4);
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_ld_stack_bottom = .;
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. = . + _minimum_stack_size;
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. = ALIGN(4);
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} >RAM
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_ld_stack_top = ORIGIN(RAM) + LENGTH(RAM);
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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