e4d43401eb
This is in preparation for supporting other MCU series, such as
STM32F2xx. Directory structure for the HAL is now hal/f4/{inc,src},
where "f4" will in the future be different for other series.
HAL source/header files that are not use are removed to reduce the size
of the code.
338 lines
13 KiB
C
338 lines
13 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_hal_pwr.h
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* @author MCD Application Team
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* @version V1.1.0
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* @date 19-June-2014
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* @brief Header file of PWR HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_HAL_PWR_H
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#define __STM32F4xx_HAL_PWR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup PWR
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief PWR PVD configuration structure definition
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*/
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typedef struct
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{
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uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
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This parameter can be a value of @ref PWR_PVD_detection_level */
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uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
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This parameter can be a value of @ref PWR_PVD_Mode */
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}PWR_PVDTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/* ------------- PWR registers bit address in the alias region ---------------*/
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#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
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/* --- CR Register ---*/
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/* Alias word address of DBP bit */
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#define CR_OFFSET (PWR_OFFSET + 0x00)
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#define DBP_BitNumber 0x08
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#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
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/* Alias word address of PVDE bit */
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#define PVDE_BitNumber 0x04
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#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
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/* Alias word address of PMODE bit */
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#define PMODE_BitNumber 0x0E
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#define CR_PMODE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PMODE_BitNumber * 4))
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/* --- CSR Register ---*/
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/* Alias word address of EWUP bit */
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#define CSR_OFFSET (PWR_OFFSET + 0x04)
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#define EWUP_BitNumber 0x08
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#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
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/** @defgroup PWR_Exported_Constants
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* @{
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*/
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/** @defgroup PWR_WakeUp_Pins
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* @{
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*/
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#define PWR_WAKEUP_PIN1 PWR_CSR_EWUP
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#define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
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/**
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* @}
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*/
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/** @defgroup PWR_PVD_detection_level
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* @{
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*/
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#define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
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#define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
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#define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
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#define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
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#define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
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#define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
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#define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
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#define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
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#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
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((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
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((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
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((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
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/**
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* @}
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*/
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/** @defgroup PWR_PVD_Mode
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* @{
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*/
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#define PWR_MODE_EVT ((uint32_t)0x00000000) /*!< No Interrupt */
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#define PWR_MODE_IT_RISING ((uint32_t)0x00000001) /*!< External Interrupt Mode with Rising edge trigger detection */
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#define PWR_MODE_IT_FALLING ((uint32_t)0x00000002) /*!< External Interrupt Mode with Falling edge trigger detection */
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#define PWR_MODE_IT_RISING_FALLING ((uint32_t)0x00000003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
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#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_MODE_EVT) || ((MODE) == PWR_MODE_IT_RISING)|| \
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((MODE) == PWR_MODE_IT_FALLING) || ((MODE) == PWR_MODE_IT_RISING_FALLING))
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/**
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* @}
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*/
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/** @defgroup PWR_Regulator_state_in_STOP_mode
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* @{
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*/
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#define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
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#define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
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#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
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((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
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/**
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* @}
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*/
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/** @defgroup PWR_SLEEP_mode_entry
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* @{
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*/
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#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
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#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
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#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
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/**
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* @}
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*/
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/** @defgroup PWR_STOP_mode_entry
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* @{
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*/
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#define PWR_STOPENTRY_WFI ((uint8_t)0x01)
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#define PWR_STOPENTRY_WFE ((uint8_t)0x02)
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#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
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/**
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* @}
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*/
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/** @defgroup PWR_Regulator_Voltage_Scale
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* @{
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*/
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#define PWR_REGULATOR_VOLTAGE_SCALE1 ((uint32_t)0x0000C000)
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#define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00008000)
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#define PWR_REGULATOR_VOLTAGE_SCALE3 ((uint32_t)0x00004000)
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#define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
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((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
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((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
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/**
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* @}
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*/
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/** @defgroup PWR_Flag
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* @{
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*/
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#define PWR_FLAG_WU PWR_CSR_WUF
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#define PWR_FLAG_SB PWR_CSR_SBF
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#define PWR_FLAG_PVDO PWR_CSR_PVDO
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#define PWR_FLAG_BRR PWR_CSR_BRR
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#define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @brief macros configure the main internal regulator output voltage.
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* @param __REGULATOR__: specifies the regulator output voltage to achieve
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* a tradeoff between performance and power consumption when the device does
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* not operate at the maximum frequency (refer to the datasheets for more details).
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* This parameter can be one of the following values:
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* @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
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* @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
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* @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
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* @retval None
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*/
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#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
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/** @brief Check PWR flag is set or not.
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* @param __FLAG__: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
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* was received from the WKUP pin or from the RTC alarm (Alarm A
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* or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
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* An additional wakeup event is detected if the WKUP pin is enabled
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* (by setting the EWUP bit) when the WKUP pin level is already high.
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* @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
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* resumed from StandBy mode.
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* @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
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* by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
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* For this reason, this bit is equal to 0 after Standby or reset
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* until the PVDE bit is set.
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* @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
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* when the device wakes up from Standby mode or by a system reset
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* or power reset.
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* @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
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* scaling output selection is ready.
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* @retval The new state of __FLAG__ (TRUE or FALSE).
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*/
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#define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
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/** @brief Clear the PWR's pending flags.
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* @param __FLAG__: specifies the flag to clear.
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* This parameter can be one of the following values:
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* @arg PWR_FLAG_WU: Wake Up flag
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* @arg PWR_FLAG_SB: StandBy flag
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*/
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#define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2)
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#define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
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/**
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* @brief Enable the PVD Exti Line.
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* @param __EXTILINE__: specifies the PVD Exti sources to be enabled.
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* This parameter can be:
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* @arg PWR_EXTI_LINE_PVD
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* @retval None.
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*/
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#define __HAL_PVD_EXTI_ENABLE_IT(__EXTILINE__) (EXTI->IMR |= (__EXTILINE__))
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/**
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* @brief Disable the PVD EXTI Line.
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* @param __EXTILINE__: specifies the PVD EXTI sources to be disabled.
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* This parameter can be:
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* @arg PWR_EXTI_LINE_PVD
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* @retval None.
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*/
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#define __HAL_PVD_EXTI_DISABLE_IT(__EXTILINE__) (EXTI->IMR &= ~(__EXTILINE__))
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/**
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* @brief checks whether the specified PVD Exti interrupt flag is set or not.
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* @param __EXTILINE__: specifies the PVD Exti sources to be cleared.
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* This parameter can be:
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* @arg PWR_EXTI_LINE_PVD
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* @retval EXTI PVD Line Status.
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*/
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#define __HAL_PVD_EXTI_GET_FLAG(__EXTILINE__) (EXTI->PR & (__EXTILINE__))
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/**
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* @brief Clear the PVD Exti flag.
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* @param __EXTILINE__: specifies the PVD Exti sources to be cleared.
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* This parameter can be:
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* @arg PWR_EXTI_LINE_PVD
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* @retval None.
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*/
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#define __HAL_PVD_EXTI_CLEAR_FLAG(__EXTILINE__) (EXTI->PR = (__EXTILINE__))
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/**
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* @brief Generates a Software interrupt on selected EXTI line.
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* @param __EXTILINE__: specifies the PVD EXTI sources to be disabled.
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* This parameter can be:
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* @arg PWR_EXTI_LINE_PVD
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* @retval None
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*/
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#define __HAL_PVD_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
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/* Include PWR HAL Extension module */
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#include "stm32f4xx_hal_pwr_ex.h"
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/* Exported functions --------------------------------------------------------*/
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/* Initialization and de-initialization functions *****************************/
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void HAL_PWR_DeInit(void);
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void HAL_PWR_EnableBkUpAccess(void);
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void HAL_PWR_DisableBkUpAccess(void);
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/* Peripheral Control functions **********************************************/
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/* PVD configuration */
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void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
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void HAL_PWR_EnablePVD(void);
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void HAL_PWR_DisablePVD(void);
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/* WakeUp pins configuration */
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void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
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void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
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/* Low Power modes entry */
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void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
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void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
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void HAL_PWR_EnterSTANDBYMode(void);
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void HAL_PWR_PVD_IRQHandler(void);
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void HAL_PWR_PVDCallback(void);
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32F4xx_HAL_PWR_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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