e4d43401eb
This is in preparation for supporting other MCU series, such as
STM32F2xx. Directory structure for the HAL is now hal/f4/{inc,src},
where "f4" will in the future be different for other series.
HAL source/header files that are not use are removed to reduce the size
of the code.
446 lines
18 KiB
C
446 lines
18 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_hal_i2s.h
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* @author MCD Application Team
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* @version V1.1.0
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* @date 19-June-2014
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* @brief Header file of I2S HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_HAL_I2S_H
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#define __STM32F4xx_HAL_I2S_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup I2S
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief I2S Init structure definition
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*/
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typedef struct
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{
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uint32_t Mode; /*!< Specifies the I2S operating mode.
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This parameter can be a value of @ref I2S_Mode */
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uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
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This parameter can be a value of @ref I2S_Standard */
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uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
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This parameter can be a value of @ref I2S_Data_Format */
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uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
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This parameter can be a value of @ref I2S_MCLK_Output */
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uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
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This parameter can be a value of @ref I2S_Audio_Frequency */
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uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
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This parameter can be a value of @ref I2S_Clock_Polarity */
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uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
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This parameter can be a value of @ref I2S_Clock_Source */
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uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
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This parameter can be a value of @ref I2S_FullDuplex_Mode */
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}I2S_InitTypeDef;
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/**
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* @brief HAL State structures definition
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*/
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typedef enum
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{
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HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
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HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
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HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
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HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
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HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
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HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
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HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
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HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
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}HAL_I2S_StateTypeDef;
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/**
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* @brief HAL I2S Error Code structure definition
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*/
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typedef enum
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{
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HAL_I2S_ERROR_NONE = 0x00, /*!< No error */
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HAL_I2S_ERROR_UDR = 0x01, /*!< I2S Underrun error */
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HAL_I2S_ERROR_OVR = 0x02, /*!< I2S Overrun error */
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HAL_I2SEX_ERROR_UDR = 0x04, /*!< I2S extended Underrun error */
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HAL_I2SEX_ERROR_OVR = 0x08, /*!< I2S extended Overrun error */
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HAL_I2S_ERROR_FRE = 0x10, /*!< I2S Frame format error */
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HAL_I2S_ERROR_DMA = 0x20 /*!< DMA transfer error */
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}HAL_I2S_ErrorTypeDef;
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/**
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* @brief I2S handle Structure definition
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*/
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typedef struct
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{
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SPI_TypeDef *Instance; /* I2S registers base address */
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I2S_InitTypeDef Init; /* I2S communication parameters */
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uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
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__IO uint16_t TxXferSize; /* I2S Tx transfer size */
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__IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
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uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
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__IO uint16_t RxXferSize; /* I2S Rx transfer size */
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__IO uint16_t RxXferCount; /* I2S Rx transfer counter */
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DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
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DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
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__IO HAL_LockTypeDef Lock; /* I2S locking object */
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__IO HAL_I2S_StateTypeDef State; /* I2S communication state */
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__IO HAL_I2S_ErrorTypeDef ErrorCode; /* I2S Error code */
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}I2S_HandleTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup I2S_Exported_Constants
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* @{
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*/
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#define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
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/** @defgroup I2S_Clock_Source
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* @{
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*/
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#define I2S_CLOCK_PLL ((uint32_t)0x00000000)
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#define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001)
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#define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
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((CLOCK) == I2S_CLOCK_PLL))
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/**
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* @}
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*/
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/** @defgroup I2S_Mode
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* @{
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*/
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#define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
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#define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
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#define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
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#define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
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#define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
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((MODE) == I2S_MODE_SLAVE_RX) || \
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((MODE) == I2S_MODE_MASTER_TX) || \
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((MODE) == I2S_MODE_MASTER_RX))
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/**
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* @}
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*/
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/** @defgroup I2S_Standard
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* @{
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*/
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#define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
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#define I2S_STANDARD_MSB ((uint32_t)0x00000010)
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#define I2S_STANDARD_LSB ((uint32_t)0x00000020)
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#define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
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#define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
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#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
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((STANDARD) == I2S_STANDARD_MSB) || \
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((STANDARD) == I2S_STANDARD_LSB) || \
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((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
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((STANDARD) == I2S_STANDARD_PCM_LONG))
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/** @defgroup I2S_Legacy
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* @{
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*/
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#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @defgroup I2S_Data_Format
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* @{
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*/
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#define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
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#define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
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#define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
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#define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
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#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
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((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
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((FORMAT) == I2S_DATAFORMAT_24B) || \
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((FORMAT) == I2S_DATAFORMAT_32B))
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/**
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* @}
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*/
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/** @defgroup I2S_MCLK_Output
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* @{
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*/
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#define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
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#define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
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#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
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((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
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/**
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* @}
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*/
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/** @defgroup I2S_Audio_Frequency
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* @{
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*/
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#define I2S_AUDIOFREQ_192K ((uint32_t)192000)
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#define I2S_AUDIOFREQ_96K ((uint32_t)96000)
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#define I2S_AUDIOFREQ_48K ((uint32_t)48000)
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#define I2S_AUDIOFREQ_44K ((uint32_t)44100)
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#define I2S_AUDIOFREQ_32K ((uint32_t)32000)
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#define I2S_AUDIOFREQ_22K ((uint32_t)22050)
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#define I2S_AUDIOFREQ_16K ((uint32_t)16000)
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#define I2S_AUDIOFREQ_11K ((uint32_t)11025)
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#define I2S_AUDIOFREQ_8K ((uint32_t)8000)
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#define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
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#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
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((FREQ) <= I2S_AUDIOFREQ_192K)) || \
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((FREQ) == I2S_AUDIOFREQ_DEFAULT))
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/**
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* @}
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*/
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/** @defgroup I2S_FullDuplex_Mode
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* @{
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*/
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#define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000)
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#define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001)
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#define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
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((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
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/**
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* @}
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*/
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/** @defgroup I2S_Clock_Polarity
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* @{
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*/
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#define I2S_CPOL_LOW ((uint32_t)0x00000000)
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#define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
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#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
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((CPOL) == I2S_CPOL_HIGH))
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/**
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* @}
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*/
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/** @defgroup I2S_Interrupt_configuration_definition
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* @{
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*/
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#define I2S_IT_TXE SPI_CR2_TXEIE
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#define I2S_IT_RXNE SPI_CR2_RXNEIE
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#define I2S_IT_ERR SPI_CR2_ERRIE
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/**
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* @}
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*/
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/** @defgroup I2S_Flag_definition
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* @{
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*/
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#define I2S_FLAG_TXE SPI_SR_TXE
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#define I2S_FLAG_RXNE SPI_SR_RXNE
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#define I2S_FLAG_UDR SPI_SR_UDR
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#define I2S_FLAG_OVR SPI_SR_OVR
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#define I2S_FLAG_FRE SPI_SR_FRE
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#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
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#define I2S_FLAG_BSY SPI_SR_BSY
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @brief Reset I2S handle state
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* @param __HANDLE__: specifies the I2S Handle.
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* @retval None
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*/
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#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
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/** @brief Enable or disable the specified SPI peripheral (in I2S mode).
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* @param __HANDLE__: specifies the I2S Handle.
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* @retval None
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*/
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#define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
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#define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
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/** @brief Enable or disable the specified I2S interrupts.
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* @param __HANDLE__: specifies the I2S Handle.
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* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
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* This parameter can be one of the following values:
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* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
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* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
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* @arg I2S_IT_ERR: Error interrupt enable
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* @retval None
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*/
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#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
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#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
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/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
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* @param __HANDLE__: specifies the I2S Handle.
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* This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
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* @param __INTERRUPT__: specifies the I2S interrupt source to check.
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* This parameter can be one of the following values:
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* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
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* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
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* @arg I2S_IT_ERR: Error interrupt enable
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* @retval The new state of __IT__ (TRUE or FALSE).
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*/
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#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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/** @brief Checks whether the specified I2S flag is set or not.
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* @param __HANDLE__: specifies the I2S Handle.
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* @param __FLAG__: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
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* @arg I2S_FLAG_TXE: Transmit buffer empty flag
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* @arg I2S_FLAG_UDR: Underrun flag
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* @arg I2S_FLAG_OVR: Overrun flag
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* @arg I2S_FLAG_FRE: Frame error flag
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* @arg I2S_FLAG_CHSIDE: Channel Side flag
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* @arg I2S_FLAG_BSY: Busy flag
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* @retval The new state of __FLAG__ (TRUE or FALSE).
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*/
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#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
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/** @brief Clears the I2S OVR pending flag.
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* @param __HANDLE__: specifies the I2S Handle.
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* @retval None
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*/
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#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
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(__HANDLE__)->Instance->SR;}while(0)
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/** @brief Clears the I2S UDR pending flag.
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* @param __HANDLE__: specifies the I2S Handle.
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* @retval None
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*/
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#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR)
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/* Include I2S Extension module */
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#include "stm32f4xx_hal_i2s_ex.h"
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/* Exported functions --------------------------------------------------------*/
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/* Initialization/de-initialization functions **********************************/
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HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
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HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
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void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
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void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
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/* I/O operation functions *****************************************************/
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/* Blocking mode: Polling */
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HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
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HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
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/* Non-Blocking mode: Interrupt */
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HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
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HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
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void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
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/* Non-Blocking mode: DMA */
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HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
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HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
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HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
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HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
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HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
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/* Peripheral Control and State functions **************************************/
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HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
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HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
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/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
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void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
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void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
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void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
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void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
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void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
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void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
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void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
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void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
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void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
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void I2S_DMAError(DMA_HandleTypeDef *hdma);
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HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32F4xx_HAL_I2S_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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