e4d43401eb
This is in preparation for supporting other MCU series, such as
STM32F2xx. Directory structure for the HAL is now hal/f4/{inc,src},
where "f4" will in the future be different for other series.
HAL source/header files that are not use are removed to reduce the size
of the code.
289 lines
15 KiB
C
289 lines
15 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_hal_adc.h
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* @author MCD Application Team
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* @version V1.1.0
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* @date 19-June-2014
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* @brief Header file of ADC HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_ADC_EX_H
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#define __STM32F4xx_ADC_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup ADCEx
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief ADC Configuration injected Channel structure definition
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*/
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typedef struct
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{
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uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
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This parameter can be a value of @ref ADC_channels */
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uint32_t InjectedRank; /*!< The rank in the injected group sequencer
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This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
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uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel.
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This parameter can be a value of @ref ADC_sampling_times */
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uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
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This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
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uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for
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injected channel group.
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This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
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uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group
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conversion after regular one */
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uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
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This parameter can be set to ENABLE or DISABLE. */
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uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels.
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This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
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uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels.
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This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
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}ADC_InjectionConfTypeDef;
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/**
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* @brief ADC Configuration multi-mode structure definition
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*/
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typedef struct
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{
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uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
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This parameter can be a value of @ref ADCEx_Common_mode */
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uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
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This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
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uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
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This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
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}ADC_MultiModeTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup ADCEx_Exported_Constants
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* @{
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*/
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/** @defgroup ADCEx_Common_mode
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* @{
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*/
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#define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000)
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#define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
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#define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
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#define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
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#define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
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#define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
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#define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
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#define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
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#define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
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#define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
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#define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
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#define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
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#define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
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#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
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((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
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((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
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((MODE) == ADC_DUALMODE_INJECSIMULT) || \
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((MODE) == ADC_DUALMODE_REGSIMULT) || \
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((MODE) == ADC_DUALMODE_INTERL) || \
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((MODE) == ADC_DUALMODE_ALTERTRIG) || \
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((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
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((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
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((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
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((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
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((MODE) == ADC_TRIPLEMODE_INTERL) || \
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((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
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/**
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* @}
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*/
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/** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode
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* @{
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*/
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#define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */
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#define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
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#define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
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#define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
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#define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
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((MODE) == ADC_DMAACCESSMODE_1) || \
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((MODE) == ADC_DMAACCESSMODE_2) || \
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((MODE) == ADC_DMAACCESSMODE_3))
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/**
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* @}
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*/
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/** @defgroup ADCEx_External_trigger_edge_Injected
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* @{
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*/
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#define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000)
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#define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
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#define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
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#define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
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#define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
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((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
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((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
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((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
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/**
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* @}
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*/
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/** @defgroup ADCEx_External_trigger_Source_Injected
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* @{
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*/
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#define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000)
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#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
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#define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
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#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
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#define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
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#define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
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#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
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#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
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#define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
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#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
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#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15))
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/**
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* @}
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*/
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/** @defgroup ADCEx_injected_channel_selection
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* @{
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*/
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#define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
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#define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
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#define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
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#define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
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/**
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* @}
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*/
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/** @defgroup ADCEx_injected_length
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* @{
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*/
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#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
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/**
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* @}
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*/
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/** @defgroup ADCEx_injected_rank
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* @{
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*/
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#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/**
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* @brief Set the selected injected Channel rank.
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* @param _CHANNELNB_: Channel number.
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* @param _RANKNB_: Rank number.
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* @param _JSQR_JL_: Sequence length.
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* @retval None
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*/
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#define __HAL_ADC_JSQR(_CHANNELNB_, _RANKNB_,_JSQR_JL_) \
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((_CHANNELNB_) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
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/* Exported functions --------------------------------------------------------*/
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/* I/O operation functions ******************************************************/
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HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
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HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
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HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
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HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
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HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
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uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
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HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
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HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
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uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
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void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
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/* Peripheral Control functions *************************************************/
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HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
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HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /*__STM32F4xx_ADC_EX_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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