circuitpython/extmod/webrepl
stijn 40ad8f1666 all: Rename "sys" module to "usys".
This is consistent with the other 'micro' modules and allows implementing
additional features in Python via e.g. micropython-lib's sys.

Note this is a breaking change (not backwards compatible) for ports which
do not enable weak links, as "import sys" must now be replaced with
"import usys".
2020-09-04 00:10:24 +10:00
..
manifest.py all: Update Python code to conform to latest black formatting. 2020-08-29 15:18:01 +10:00
webrepl.py all: Reformat C and Python source code with tools/codeformat.py. 2020-02-28 10:33:03 +11:00
webrepl_setup.py all: Reformat C and Python source code with tools/codeformat.py. 2020-02-28 10:33:03 +11:00
websocket_helper.py all: Rename "sys" module to "usys". 2020-09-04 00:10:24 +10:00