82fe6b0526
This patch add basic building blocks for nrf9P60. It also includes a secure bootloader which forwards all possible peripherals that are user selectable to become non-secure. After configuring Flash, RAM and peripherals the secure bootloader will jump to the non-secure domain where MicroPython is placed. The minimum size of a secure boot has to be a flash block of 32Kb, hence why the linker scripts are offsetting the main application this much. The RAM offset is set to 128K, to allow for later integration of Nordic Semiconductor's BSD socket library which reserves the range 0x20010000 - 0x2001FFFF.
70 lines
2.0 KiB
C
70 lines
2.0 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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* Copyright (c) 2016 Glenn Ruben Bakke
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// This file contains pin definitions that are specific to the nrf port.
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// This file should only ever be #included by pin.h and not directly.
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#include "nrf_gpio.h"
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enum {
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PORT_A,
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PORT_B,
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};
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enum {
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AF_FN_UART,
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AF_FN_SPI,
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};
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enum {
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AF_PIN_TYPE_UART_TX = 0,
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AF_PIN_TYPE_UART_RX,
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AF_PIN_TYPE_UART_CTS,
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AF_PIN_TYPE_UART_RTS,
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AF_PIN_TYPE_SPI_MOSI = 0,
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AF_PIN_TYPE_SPI_MISO,
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AF_PIN_TYPE_SPI_SCK,
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AF_PIN_TYPE_SPI_NSS,
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};
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#if defined(NRF51) || defined(NRF52_SERIES)
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#define PIN_DEFS_PORT_AF_UNION \
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NRF_UART_Type *UART;
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// NRF_SPI_Type *SPIM;
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// NRF_SPIS_Type *SPIS;
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#elif defined(NRF91_SERIES)
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#define PIN_DEFS_PORT_AF_UNION \
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NRF_UARTE_Type *UART;
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#endif
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enum {
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PIN_ADC1 = (1 << 0),
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};
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typedef NRF_GPIO_Type pin_gpio_t;
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