995f9cfdfc
On this port the GIL is enabled and everything works under the assumption of the GIL, ie that a given task has exclusive access to the uPy state, and any ISRs interrupt the current task and therefore the ISR inherits exclusive access to the uPy state for the duration of its execution. If the MicroPython tasks are not pinned to a specific core then an ISR may be executed on a different core to the task, making it possible for the main task and an ISR to execute in parallel, breaking the assumption of the GIL. The easiest and safest fix for this is to pin all MicroPython related code to the same CPU core, as done by this patch. Then any ISR that accesses MicroPython state must be registered from a MicroPython task, to ensure it is invoked on the same core. See issue #4895.
98 lines
3.4 KiB
C
98 lines
3.4 KiB
C
/*
|
|
* This file is part of the MicroPython project, http://micropython.org/
|
|
*
|
|
* Development of the code in this file was sponsored by Microbric Pty Ltd
|
|
*
|
|
* The MIT License (MIT)
|
|
*
|
|
* Copyright (c) 2014 Damien P. George
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
* in the Software without restriction, including without limitation the rights
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
* furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
* THE SOFTWARE.
|
|
*/
|
|
|
|
#ifndef INCLUDED_MPHALPORT_H
|
|
#define INCLUDED_MPHALPORT_H
|
|
|
|
#include "py/ringbuf.h"
|
|
#include "lib/utils/interrupt_char.h"
|
|
|
|
#include "freertos/FreeRTOS.h"
|
|
#include "freertos/task.h"
|
|
|
|
// The core that the MicroPython task(s) are pinned to
|
|
#define MP_TASK_COREID (1)
|
|
|
|
extern TaskHandle_t mp_main_task_handle;
|
|
|
|
extern ringbuf_t stdin_ringbuf;
|
|
|
|
uint32_t mp_hal_ticks_us(void);
|
|
__attribute__((always_inline)) static inline uint32_t mp_hal_ticks_cpu(void) {
|
|
uint32_t ccount;
|
|
__asm__ __volatile__("rsr %0,ccount":"=a" (ccount));
|
|
return ccount;
|
|
}
|
|
|
|
void mp_hal_delay_us(uint32_t);
|
|
#define mp_hal_delay_us_fast(us) ets_delay_us(us)
|
|
void mp_hal_set_interrupt_char(int c);
|
|
uint32_t mp_hal_get_cpu_freq(void);
|
|
|
|
#define mp_hal_quiet_timing_enter() MICROPY_BEGIN_ATOMIC_SECTION()
|
|
#define mp_hal_quiet_timing_exit(irq_state) MICROPY_END_ATOMIC_SECTION(irq_state)
|
|
|
|
// Wake up the main task if it is sleeping
|
|
void mp_hal_wake_main_task_from_isr(void);
|
|
|
|
// C-level pin HAL
|
|
#include "py/obj.h"
|
|
#include "driver/gpio.h"
|
|
#define MP_HAL_PIN_FMT "%u"
|
|
#define mp_hal_pin_obj_t gpio_num_t
|
|
mp_hal_pin_obj_t machine_pin_get_id(mp_obj_t pin_in);
|
|
#define mp_hal_get_pin_obj(o) machine_pin_get_id(o)
|
|
#define mp_obj_get_pin(o) machine_pin_get_id(o) // legacy name; only to support esp8266/modonewire
|
|
#define mp_hal_pin_name(p) (p)
|
|
static inline void mp_hal_pin_input(mp_hal_pin_obj_t pin) {
|
|
gpio_pad_select_gpio(pin);
|
|
gpio_set_direction(pin, GPIO_MODE_INPUT);
|
|
}
|
|
static inline void mp_hal_pin_output(mp_hal_pin_obj_t pin) {
|
|
gpio_pad_select_gpio(pin);
|
|
gpio_set_direction(pin, GPIO_MODE_INPUT_OUTPUT);
|
|
}
|
|
static inline void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin) {
|
|
gpio_pad_select_gpio(pin);
|
|
gpio_set_direction(pin, GPIO_MODE_INPUT_OUTPUT_OD);
|
|
}
|
|
static inline void mp_hal_pin_od_low(mp_hal_pin_obj_t pin) {
|
|
gpio_set_level(pin, 0);
|
|
}
|
|
static inline void mp_hal_pin_od_high(mp_hal_pin_obj_t pin) {
|
|
gpio_set_level(pin, 1);
|
|
}
|
|
static inline int mp_hal_pin_read(mp_hal_pin_obj_t pin) {
|
|
return gpio_get_level(pin);
|
|
}
|
|
static inline void mp_hal_pin_write(mp_hal_pin_obj_t pin, int v) {
|
|
gpio_set_level(pin, v);
|
|
}
|
|
|
|
#endif // INCLUDED_MPHALPORT_H
|