circuitpython/ports/litex
Scott Shawcroft 40118bcf57
Add `board_deinit` for use with sleep
This changes lots of files to unify `board.h` across ports. It adds
`board_deinit` when CIRCUITPY_ALARM is set. `main.c` uses it to
deinit the board before deep sleeping (even when pretending.)

Deep sleep is now a two step process for the port. First, the
port should prepare to deep sleep based on the given alarms. It
should set alarms for both deep and pretend sleep. In particular,
the pretend versions should be set immediately so that we don't
miss an alarm as we shutdown. These alarms should also wake from
`port_idle_until_interrupt` which is used when pretending to deep
sleep.

Second, when real deep sleeping, `alarm_enter_deep_sleep` is called.
The port should set any alarms it didn't during prepare based on
data it saved internally during prepare.

ESP32-S2 sleep is a bit reorganized to locate more logic with
TimeAlarm. This will help it scale to more alarm types.

Fixes #3786
2020-12-08 10:52:25 -08:00
..
boards/fomu Add `board_deinit` for use with sleep 2020-12-08 10:52:25 -08:00
common-hal address review comments 2020-12-01 20:01:14 -05:00
hw Fix up end of file and trailing whitespace. 2020-06-03 10:56:35 +01:00
supervisor Add `board_deinit` for use with sleep 2020-12-08 10:52:25 -08:00
.gitignore Update LiteX APIs for new tick 2020-03-31 17:52:23 -07:00
Makefile Changes to optimization option 2020-07-23 19:27:02 -05:00
README.rst Update the supported ports 2020-03-31 18:27:55 -07:00
background.c supervisor: factor supervisor_background_tasks from sundry ports 2020-07-15 11:49:44 -05:00
background.h supervisor: factor supervisor_background_tasks from sundry ports 2020-07-15 11:49:44 -05:00
crt0-vexriscv.S ports: litex: add port and fomu board 2020-03-31 09:40:38 +08:00
fatfs_port.c Add license to some obvious files. 2020-07-06 19:16:25 +01:00
irq.h Fix up end of file and trailing whitespace. 2020-06-03 10:56:35 +01:00
mpconfigport.h Moved ORDEREDDICT define to central location 2020-10-13 18:52:27 -05:00
mpconfigport.mk Removing from smaller builds 2020-11-11 10:24:33 -06:00
mphalport.c supervisor: factor out, Handle USB via background callback 2020-07-15 11:49:44 -05:00
mphalport.h ports: litex: add port and fomu board 2020-03-31 09:40:38 +08:00
qstrdefsport.h ports: litex: add port and fomu board 2020-03-31 09:40:38 +08:00

README.rst

LiteX (FPGA)
============

`LiteX <https://github.com/enjoy-digital/litex>`_ is a Python-based System on a Chip (SoC) designer
for open source supported Field Programmable Gate Array (FPGA) chips. This means that the CPU
core(s) and peripherals are not defined by the physical chip. Instead, they are loaded as separate
"gateware". Once this gateware is loaded, CircuitPython can be loaded on top of it to work as
expected.

Installation
-------------

You'll need ``dfu-util`` to install CircuitPython on the Fomu.

Make sure the foboot bootloader is updated. Instructions are here: https://github.com/im-tomu/fomu-workshop/blob/master/docs/bootloader.rst

Once you've updated the bootloader, you should know how to use ``dfu-util``. It's pretty easy!

To install CircuitPython do:

.. code-block:: shell

  dfu-util -D adafruit-circuitpython-fomu-en_US-<version>.dfu

It will install and then restart. CIRCUITPY should appear as it usually does and work the same.