51 lines
1.4 KiB
ReStructuredText
51 lines
1.4 KiB
ReStructuredText
Arithmetic instructions
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=======================
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Document conventions
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--------------------
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Notation: ``Rd, Rm, Rn`` denote ARM registers R0-R7. ``immN`` denotes an immediate
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value having a width of N bits e.g. ``imm8``, ``imm3``. ``carry`` denotes
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the carry condition flag, ``not(carry)`` denotes its complement. In the case of instructions
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with more than one register argument, it is permissible for some to be identical. For example
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the following will add the contents of R0 to itself, placing the result in R0:
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* add(r0, r0, r0)
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Arithmetic instructions affect the condition flags except where stated.
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Addition
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--------
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* add(Rdn, imm8) ``Rdn = Rdn + imm8``
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* add(Rd, Rn, imm3) ``Rd = Rn + imm3``
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* add(Rd, Rn, Rm) ``Rd = Rn +Rm``
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* adc(Rd, Rn) ``Rd = Rd + Rn + carry``
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Subtraction
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-----------
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* sub(Rdn, imm8) ``Rdn = Rdn - imm8``
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* sub(Rd, Rn, imm3) ``Rd = Rn - imm3``
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* sub(Rd, Rn, Rm) ``Rd = Rn - Rm``
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* sbc(Rd, Rn) ``Rd = Rd - Rn - not(carry)``
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Negation
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--------
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* neg(Rd, Rn) ``Rd = -Rn``
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Multiplication and division
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---------------------------
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* mul(Rd, Rn) ``Rd = Rd * Rn``
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This produces a 32 bit result with overflow lost. The result may be treated as
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signed or unsigned according to the definition of the operands.
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* sdiv(Rd, Rn, Rm) ``Rd = Rn / Rm``
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* udiv(Rd, Rn, Rm) ``Rd = Rn / Rm``
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These functions perform signed and unsigned division respectively. Condition flags
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are not affected.
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