e8f5cfe0e1
So that it doesn't clash with the extmod version. Also make the default for this enabled, so that most boards do not need to configure it. Signed-off-by: Damien George <damien@micropython.org>
240 lines
7.8 KiB
C
240 lines
7.8 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Glenn Ruben Bakke
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* Copyright (c) 2018 Ayke van Laethem
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef NRFX_CONFIG_H
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#define NRFX_CONFIG_H
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#include "py/mpconfig.h"
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#include "nrf.h"
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// Port specific defines
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#ifndef NRFX_LOG_ENABLED
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#define NRFX_LOG_ENABLED 0
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#endif
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#define NRFX_LOG_UART_DISABLED 1
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// NRFX configurations
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#if NRF51 || NRF52832
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#define GPIO_COUNT 1
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#elif NRF52840 || NRF52840_XXAA
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#define GPIO_COUNT 2
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#elif NRF9160_XXAA
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#define GPIO_COUNT 1
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#endif
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#if defined(NRF52840)
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// for tinyusb
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// #define NRFX_IRQ_IS_ENABLED 1
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#define NRFX_POWER_ENABLED 1
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#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY 2
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#define NRFX_SYSTICK_ENABLED 1
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#endif
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#define NRFX_GPIOTE_ENABLED 1
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#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
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#if NRF51
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#define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY 3
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#else
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#define NRFX_GPIOTE_DEFAULT_CONFIG_IRQ_PRIORITY 6
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#endif
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#if defined(NRF51) || defined(NRF52_SERIES)
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#define NRFX_TEMP_ENABLED 1
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#if NRF51
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#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 3
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#else
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#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
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#endif
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#endif
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#if defined(NRF51) || defined(NRF52_SERIES)
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#define NRFX_UART_ENABLED 1
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#define NRFX_UART0_ENABLED 1
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#define NRFX_UART1_ENABLED 1
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#else
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#define NRFX_UARTE_ENABLED 1
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#define NRFX_UARTE0_ENABLED 1
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#define NRFX_UARTE1_ENABLED 1
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#define NRFX_UARTE2_ENABLED 1
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#define NRFX_UARTE3_ENABLED 1
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#endif
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#if defined(NRF51) || defined(NRF52_SERIES)
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#define NRFX_TWI_ENABLED (MICROPY_PY_MACHINE_I2C)
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#define NRFX_TWI0_ENABLED 1
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#define NRFX_TWI1_ENABLED 1
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#elif defined(NRF9160_XXAA)
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#define NRFX_TWIM_ENABLED (MICROPY_PY_MACHINE_I2C)
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#define NRFX_TWIM0_ENABLED 1
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#define NRFX_TWIM1_ENABLED 1
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#endif
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#if defined(NRF51) || defined(NRF52832)
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#define NRFX_SPI_ENABLED (MICROPY_PY_MACHINE_HW_SPI)
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#define NRFX_SPI0_ENABLED 1
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#define NRFX_SPI1_ENABLED 1
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#if defined(NRF52832)
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#define NRFX_SPI2_ENABLED 1
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#endif
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#elif defined(NRF52840)
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#define NRFX_SPIM_ENABLED (MICROPY_PY_MACHINE_HW_SPI)
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#define NRFX_SPIM0_ENABLED 1
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#define NRFX_SPIM1_ENABLED 1
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#define NRFX_SPIM2_ENABLED 1
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#define NRFX_SPIM3_ENABLED (NRF52840)
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#elif defined(NRF9160_XXAA)
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#define NRFX_SPIM_ENABLED (MICROPY_PY_MACHINE_HW_SPI)
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#define NRFX_SPIM0_ENABLED 1
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#define NRFX_SPIM1_ENABLED 1
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// 0 NRF_GPIO_PIN_NOPULL
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// 1 NRF_GPIO_PIN_PULLDOWN
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// 3 NRF_GPIO_PIN_PULLUP
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#define NRFX_SPIM_MISO_PULL_CFG 1
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#endif // NRF51
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// 0 NRF_GPIO_PIN_NOPULL
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// 1 NRF_GPIO_PIN_PULLDOWN
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// 3 NRF_GPIO_PIN_PULLUP
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#define NRFX_SPI_MISO_PULL_CFG 1
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#define NRFX_SPIM_MISO_PULL_CFG 1
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#define NRFX_RTC_ENABLED (MICROPY_PY_MACHINE_RTCOUNTER)
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#define NRFX_RTC0_ENABLED 1
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#define NRFX_RTC1_ENABLED 1
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#define NRFX_RTC2_ENABLED (!NRF51) && (!NRF9160_XXAA)
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#define NRFX_TIMER_ENABLED (MICROPY_PY_MACHINE_TIMER_NRF)
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#define NRFX_TIMER0_ENABLED 1
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#define NRFX_TIMER1_ENABLED (!MICROPY_PY_MACHINE_SOFT_PWM)
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#define NRFX_TIMER2_ENABLED 1
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#define NRFX_TIMER3_ENABLED (!NRF51) && (!NRF9160_XXAA)
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#define NRFX_TIMER4_ENABLED (!NRF51) && (!NRF9160_XXAA)
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#define NRFX_PWM_ENABLED (!NRF51) && MICROPY_PY_MACHINE_HW_PWM
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#define NRFX_PWM0_ENABLED 1
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#define NRFX_PWM1_ENABLED 1
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#define NRFX_PWM2_ENABLED 1
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#define NRFX_PWM3_ENABLED (NRF52840)
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#define NRFX_NVMC_ENABLED 1
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// Peripheral Resource Sharing
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#if defined(NRF51) || defined(NRF52832)
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#define NRFX_PRS_BOX_0_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI0_ENABLED && NRFX_SPI_ENABLED && NRFX_SPI0_ENABLED)
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#define NRFX_PRS_BOX_1_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI1_ENABLED && NRFX_SPI_ENABLED && NRFX_SPI1_ENABLED)
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#if defined(NRF52832)
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#define NRFX_PRS_BOX_2_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI1_ENABLED && NRFX_SPI_ENABLED && NRFX_SPI1_ENABLED)
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#endif
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#elif defined(NRF52840)
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#define NRFX_PRS_BOX_0_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI0_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM0_ENABLED)
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#define NRFX_PRS_BOX_1_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI1_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM1_ENABLED)
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#define NRFX_PRS_BOX_2_ENABLED (NRFX_TWI_ENABLED && NRFX_TWI2_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM2_ENABLED)
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#elif defined(NRF9160_XXAA)
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#define NRFX_PRS_BOX_0_ENABLED (NRFX_TWIM_ENABLED && NRFX_TWIM0_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM0_ENABLED)
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#define NRFX_PRS_BOX_1_ENABLED (NRFX_TWIM_ENABLED && NRFX_TWIM1_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM1_ENABLED)
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#define NRFX_PRS_BOX_2_ENABLED (NRFX_TWIM_ENABLED && NRFX_TWIM2_ENABLED && NRFX_SPIM_ENABLED && NRFX_SPIM2_ENABLED)
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#endif
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#define NRFX_PRS_ENABLED (NRFX_PRS_BOX_0_ENABLED || NRFX_PRS_BOX_1_ENABLED || NRFX_PRS_BOX_2_ENABLED)
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#define NRFX_SAADC_ENABLED !(NRF51) && (MICROPY_PY_MACHINE_ADC)
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#define NRFX_ADC_ENABLED (NRF51) && (MICROPY_PY_MACHINE_ADC)
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#if defined(NRF9160_XXAA)
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#define NRF_CLOCK NRF_CLOCK_NS
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#define NRF_DPPIC NRF_DPPIC_NS
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#define NRF_EGU0 NRF_EGU0_NS
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#define NRF_EGU1 NRF_EGU1_NS
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#define NRF_EGU2 NRF_EGU2_NS
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#define NRF_EGU3 NRF_EGU3_NS
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#define NRF_EGU4 NRF_EGU4_NS
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#define NRF_EGU5 NRF_EGU5_NS
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#define NRF_FPU NRF_FPU_NS
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#define NRF_P0 NRF_P0_NS
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#define NRF_I2S NRF_I2S_NS
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#define NRF_KMU NRF_KMU_NS
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#define NRF_NVMC NRF_NVMC_NS
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#define NRF_PDM NRF_PDM_NS
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#define NRF_POWER NRF_POWER_NS
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#define NRF_PWM0 NRF_PWM0_NS
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#define NRF_PWM1 NRF_PWM1_NS
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#define NRF_PWM2 NRF_PWM2_NS
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#define NRF_PWM3 NRF_PWM3_NS
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#define NRF_REGULATORS NRF_REGULATORS_NS
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#define NRF_RTC0 NRF_RTC0_NS
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#define NRF_RTC1 NRF_RTC1_NS
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#define NRF_SAADC NRF_SAADC_NS
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#define NRF_SPIM0 NRF_SPIM0_NS
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#define NRF_SPIM1 NRF_SPIM1_NS
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#define NRF_SPIM2 NRF_SPIM2_NS
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#define NRF_SPIM3 NRF_SPIM3_NS
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#define NRF_SPIS0 NRF_SPIS0_NS
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#define NRF_SPIS1 NRF_SPIS1_NS
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#define NRF_SPIS2 NRF_SPIS2_NS
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#define NRF_SPIS3 NRF_SPIS3_NS
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#define NRF_TIMER0 NRF_TIMER0_NS
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#define NRF_TIMER1 NRF_TIMER1_NS
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#define NRF_TIMER2 NRF_TIMER2_NS
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#define NRF_TWIM0 NRF_TWIM0_NS
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#define NRF_TWIM1 NRF_TWIM1_NS
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#define NRF_TWIM2 NRF_TWIM2_NS
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#define NRF_TWIM3 NRF_TWIM3_NS
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#define NRF_TWIS0 NRF_TWIS0_NS
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#define NRF_TWIS1 NRF_TWIS1_NS
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#define NRF_TWIS2 NRF_TWIS2_NS
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#define NRF_TWIS3 NRF_TWIS3_NS
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#define NRF_UARTE0 NRF_UARTE0_NS
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#define NRF_UARTE1 NRF_UARTE1_NS
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#define NRF_UARTE2 NRF_UARTE2_NS
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#define NRF_UARTE3 NRF_UARTE3_NS
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#define NRF_VMC NRF_VMC_NS
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#define NRF_WDT NRF_WDT_NS
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#define NRF_IPC NRF_IPC_NS
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#define NRF_CRYPTOCELL NRF_CRYPTOCELL_S
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#define NRF_FICR NRF_FICR_S
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#define NRF_GPIOTE0 NRF_GPIOTE0_S
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#define NRF_GPIOTE1 NRF_GPIOTE1_NS
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#define NRF_SPU NRF_SPU_S
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#define NRF_UICR NRF_UICR_S
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#define NRF_GPIOTE NRF_GPIOTE1_NS
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#define GPIOTE_IRQn GPIOTE1_IRQn
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#define GPIOTE_IRQHandler GPIOTE1_IRQHandler
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#endif
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#endif // NRFX_CONFIG_H
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