circuitpython/ports/esp32s2/common-hal
2020-10-13 14:22:02 +05:30
..
analogio Merge branch 'esp32-analogin' into esp32-analogout 2020-10-08 12:42:00 -04:00
board Initial ESP32S2 port. 2020-05-15 15:36:16 -07:00
busio change idf to espressif 2020-10-08 00:52:00 +07:00
digitalio change idf to espressif 2020-10-08 00:52:00 +07:00
displayio Switch SPI to polling DMA and enable displayio 2020-06-24 13:10:08 -07:00
microcontroller change idf to espressif 2020-10-08 00:52:00 +07:00
neopixel_write Change submodule, rework all includes 2020-09-30 11:26:07 -04:00
os Add random to ESP32-S2, fix it on STM32 2020-08-25 14:00:29 -04:00
pulseio Change submodule, rework all includes 2020-09-30 11:26:07 -04:00
pwmio Change submodule, rework all includes 2020-09-30 11:26:07 -04:00
rtc Change submodule, rework all includes 2020-09-30 11:26:07 -04:00
socketpool Remove logging from shared-bindings, fix translations, revert config target macro 2020-10-06 13:29:12 -04:00
ssl Change submodule, rework all includes 2020-09-30 11:26:07 -04:00
supervisor Fix up end of file and trailing whitespace. 2020-06-03 10:56:35 +01:00
time Initial ESP32S2 port. 2020-05-15 15:36:16 -07:00
wifi Add method to set custom hostname 2020-10-13 14:22:02 +05:30