726dcdb60a
I have a function where it should be impossible to reach the end, so I put in a safe-mode reset at the bottom:
```
int find_unused_slot(void) {
// precondition: you already verified that a slot was available
for (int i=0; i<NUM_SLOTS; i++) {
if( slot_free(i)) {
return i;
}
}
safe_mode_reset(MICROPY_FATAL_ERROR);
}
```
However, the compiler still gave a diagnostic, because safe_mode_reset was not declared NORETURN.
So I started by teaching the compiler that reset_into_safe_mode never returned. This leads at least one level deeper due to reset_cpu needing to be a NORETURN function. Each port is a little different in this area. I also marked reset_to_bootloader as NORETURN.
Additional notes:
* stm32's reset_to_bootloader was not implemented, but now does a bare reset. Most stm32s are not fitted with uf2 bootloaders anyway.
* ditto cxd56
* esp32s2 did not implement reset_cpu at all. I used esp_restart(). (not tested)
* litex did not implement reset_cpu at all. I used reboot_ctrl_write. But notably this is what reset_to_bootloader already did, so one or the other must be incorrect (not tested). reboot_ctrl_write cannot be declared NORETURN, as it returns unless the special value 0xac is written), so a new unreachable forever-loop is added.
* cxd56's reset is via a boardctl() call which can't generically be declared NORETURN, so a new unreacahble "for(;;)" forever-loop is added.
* In several places, NVIC_SystemReset is redeclared with NORETURN applied. This is accepted just fine by gcc. I chose this as preferable to editing the multiple copies of CMSIS headers where it is normally declared.
* the stub safe_mode reset simply aborts. This is used in mpy-cross.
148 lines
4.0 KiB
C
148 lines
4.0 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include "supervisor/port.h"
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#include "supervisor/shared/tick.h"
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#include "boards/board.h"
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#include "irq.h"
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#include "csr.h"
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// Global millisecond tick count. 1024 per second because most RTCs are clocked with 32.768khz
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// crystals.
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volatile uint64_t raw_ticks = 0;
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volatile int subsecond = 0;
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__attribute__((section(".ramtext")))
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void SysTick_Handler(void) {
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timer0_ev_pending_write(1);
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raw_ticks += 1;
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subsecond += 1;
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// We track subsecond ticks so that we can increment raw_ticks one extra every 40 ms. We do this
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// every 40 except 0 to make it 24 increments and not 25.
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if (subsecond == 1000) {
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subsecond = 0;
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} else if (subsecond % 40 == 0) {
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raw_ticks += 1;
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}
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supervisor_tick();
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}
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static void tick_init(void) {
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int t;
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timer0_en_write(0);
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t = CONFIG_CLOCK_FREQUENCY / 1000; // 1000 kHz tick
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timer0_reload_write(t);
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timer0_load_write(t);
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timer0_en_write(1);
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timer0_ev_enable_write(1);
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timer0_ev_pending_write(1);
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irq_setmask(irq_getmask() | (1 << TIMER0_INTERRUPT));
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}
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safe_mode_t port_init(void) {
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irq_setmask(0);
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irq_setie(1);
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tick_init();
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return NO_SAFE_MODE;
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}
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extern uint32_t _ebss;
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extern uint32_t _heap_start;
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extern uint32_t _estack;
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void reset_port(void) {
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// reset_all_pins();
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// i2c_reset();
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// spi_reset();
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// uart_reset();
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// pwmout_reset();
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}
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void reset_to_bootloader(void) {
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reboot_ctrl_write(0xac);
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for(;;) {}
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}
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void reset_cpu(void) {
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// "You can reset Fomu by writing a special value to the CSR_REBOOT_CTRL
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// register at 0xe0006000L. All writes to this register must start with
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// 0xac, to ensure random values aren’t written. We can reboot Fomu by
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// simply writing this value" --
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// https://workshop.fomu.im/en/latest/riscv.html
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reboot_ctrl_write(0xac);
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for(;;) {}
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}
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supervisor_allocation* port_fixed_stack(void) {
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return NULL;
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}
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uint32_t *port_heap_get_bottom(void) {
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return port_stack_get_limit();
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}
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uint32_t *port_heap_get_top(void) {
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return port_stack_get_top();
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}
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uint32_t *port_stack_get_limit(void) {
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return &_ebss;
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}
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uint32_t *port_stack_get_top(void) {
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return &_estack;
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}
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// Place the word to save just after our BSS section that gets blanked.
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void port_set_saved_word(uint32_t value) {
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_ebss = value;
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}
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uint32_t port_get_saved_word(void) {
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return _ebss;
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}
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uint64_t port_get_raw_ticks(uint8_t* subticks) {
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return raw_ticks;
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}
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// Enable 1/1024 second tick.
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void port_enable_tick(void) {
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}
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// Disable 1/1024 second tick.
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void port_disable_tick(void) {
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}
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void port_interrupt_after_ticks(uint32_t ticks) {
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}
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// TODO: Add sleep support if the SoC supports sleep.
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void port_sleep_until_interrupt(void) {
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}
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