ccbb5e84f9
Docs are here: http://tannewt-micropython.readthedocs.io/en/microcontroller/ It differs from upstream's machine in the following ways: * Python API is identical across ports due to code structure. (Lives in shared-bindings) * Focuses on abstracting common functionality (AnalogIn) and not representing structure (ADC). * Documentation lives with code making it easy to ensure they match. * Pin is split into references (board.D13 and microcontroller.pin.PA17) and functionality (DigitalInOut). * All nativeio classes claim underlying hardware resources when inited on construction, support Context Managers (aka with statements) and have deinit methods which release the claimed hardware. * All constructors take pin references rather than peripheral ids. Its up to the implementation to find hardware or throw and exception.
274 lines
7.3 KiB
Makefile
274 lines
7.3 KiB
Makefile
include ../py/mkenv.mk
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# Select the board to build for: if not given on the command line,
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# then default to PYBV10.
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BOARD ?= feather_huzzah
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ifeq ($(wildcard boards/$(BOARD)/.),)
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$(error Invalid BOARD specified)
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endif
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# If the build directory is not given, make it reflect the board name.
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BUILD ?= build-$(BOARD)
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# qstr definitions (must come before including py.mk)
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QSTR_DEFS = qstrdefsport.h #$(BUILD)/pins_qstr.h
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MICROPY_PY_USSL = 1
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MICROPY_SSL_AXTLS = 1
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MICROPY_FATFS = 1
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MICROPY_PY_BTREE = 1
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FROZEN_DIR = scripts
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FROZEN_MPY_DIR = modules
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# include py core make definitions
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include ../py/py.mk
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PORT ?= /dev/ttyACM0
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BAUD ?= 115200
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FLASH_MODE ?= qio
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FLASH_SIZE ?= detect
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CROSS_COMPILE = xtensa-lx106-elf-
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ESP_SDK = $(shell $(CC) -print-sysroot)/usr
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INC += -I.
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INC += -I..
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INC += -I../stmhal
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INC += -I../lib/mp-readline
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INC += -I../lib/netutils
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INC += -I../lib/timeutils
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INC += -I$(BUILD)
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INC += -I$(ESP_SDK)/include
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# UART for "os" messages. 0 is normal UART as used by MicroPython REPL,
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# 1 is debug UART (tx only), -1 to disable.
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UART_OS = 0
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CFLAGS_XTENSA = -fsingle-precision-constant -Wdouble-promotion \
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-D__ets__ -DICACHE_FLASH \
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-fno-inline-functions \
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-Wl,-EL -mlongcalls -mtext-section-literals -mforce-l32 \
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-DLWIP_OPEN_SRC
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CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -ansi -std=gnu99 -nostdlib -DUART_OS=$(UART_OS) \
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$(CFLAGS_XTENSA) $(CFLAGS_MOD) $(COPT) $(CFLAGS_EXTRA)
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LDSCRIPT = esp8266.ld
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LDFLAGS = -nostdlib -T $(LDSCRIPT) -Map=$(@:.elf=.map) --cref
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LIBS = -L$(ESP_SDK)/lib -lmain -ljson -llwip_open -lpp -lnet80211 -lwpa -lphy -lnet80211 $(LDFLAGS_MOD)
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LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
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LIBS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc
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# Debugging/Optimization
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ifeq ($(DEBUG), 1)
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CFLAGS += -g
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COPT = -O0
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else
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CFLAGS += -fdata-sections -ffunction-sections
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COPT += -Os -DNDEBUG
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LDFLAGS += --gc-sections
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endif
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SRC_C = \
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strtoll.c \
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main.c \
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help.c \
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esp_mphal.c \
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esp_init_data.c \
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gccollect.c \
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lexerstr32.c \
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uart.c \
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esppwm.c \
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esponewire.c \
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espneopixel.c \
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espapa102.c \
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intr.c \
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modpyb.c \
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modmachine.c \
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machine_pin.c \
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machine_pwm.c \
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machine_rtc.c \
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machine_adc.c \
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machine_uart.c \
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machine_wdt.c \
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machine_spi.c \
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machine_hspi.c \
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modesp.c \
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modnetwork.c \
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modutime.c \
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moduos.c \
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modonewire.c \
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ets_alt_task.c \
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fatfs_port.c \
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axtls_helpers.c \
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hspi.c \
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boards/$(BOARD)/pins.c \
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$(SRC_MOD)
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SRC_COMMON_HAL = \
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microcontroller/__init__.c \
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microcontroller/Pin.c \
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nativeio/__init__.c \
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nativeio/AnalogIn.c \
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nativeio/AnalogOut.c \
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nativeio/DigitalInOut.c \
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nativeio/I2C.c \
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nativeio/PWMOut.c \
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nativeio/SPI.c \
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neopixel_write/__init__.c \
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time/__init__.c \
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board/__init__.c
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SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \
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$(addprefix common-hal/, $(SRC_COMMON_HAL))
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SRC_SHARED_MODULE = \
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bitbangio/__init__.c \
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bitbangio/I2C.c \
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bitbangio/SPI.c \
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SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \
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$(addprefix shared-module/, $(SRC_SHARED_MODULE))
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STM_SRC_C = $(addprefix stmhal/,\
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pybstdio.c \
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input.c \
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)
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EXTMOD_SRC_C = $(addprefix extmod/,\
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modlwip.c \
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)
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LIB_SRC_C = $(addprefix lib/,\
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libc/string0.c \
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libm/math.c \
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libm/fmodf.c \
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libm/roundf.c \
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libm/ef_sqrt.c \
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libm/kf_rem_pio2.c \
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libm/kf_sin.c \
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libm/kf_cos.c \
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libm/kf_tan.c \
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libm/ef_rem_pio2.c \
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libm/sf_sin.c \
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libm/sf_cos.c \
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libm/sf_tan.c \
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libm/sf_frexp.c \
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libm/sf_modf.c \
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libm/sf_ldexp.c \
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libm/asinfacosf.c \
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libm/atanf.c \
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libm/atan2f.c \
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mp-readline/readline.c \
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netutils/netutils.c \
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timeutils/timeutils.c \
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utils/pyexec.c \
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utils/pyhelp.c \
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utils/interrupt_char.c \
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)
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ifeq ($(MICROPY_FATFS), 1)
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LIB_SRC_C += \
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lib/fatfs/ff.c \
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lib/fatfs/option/ccsbcs.c
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endif
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DRIVERS_SRC_C = $(addprefix drivers/,\
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dht/dht.c \
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)
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SRC_S = \
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gchelper.s \
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OBJ =
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OBJ += $(PY_O)
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OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(STM_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(EXTMOD_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
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#OBJ += $(BUILD)/pins_$(BOARD).o
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# List of sources for qstr extraction
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SRC_QSTR += $(SRC_C) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) $(STM_SRC_C) $(EXTMOD_SRC_C) $(DRIVERS_SRC_C)
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# Append any auto-generated sources that are needed by sources listed in SRC_QSTR
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SRC_QSTR_AUTO_DEPS +=
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all: $(BUILD)/libaxtls.a $(BUILD)/firmware-combined.bin
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CONFVARS_FILE = $(BUILD)/confvars
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ifeq ($(wildcard $(CONFVARS_FILE)),)
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$(shell $(MKDIR) -p $(BUILD))
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$(shell echo $(FROZEN_DIR) $(UART_OS) > $(CONFVARS_FILE))
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else ifneq ($(shell cat $(CONFVARS_FILE)), $(FROZEN_DIR) $(UART_OS))
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$(shell echo $(FROZEN_DIR) $(UART_OS) > $(CONFVARS_FILE))
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endif
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$(BUILD)/uart.o: $(CONFVARS_FILE)
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FROZEN_EXTRA_DEPS = $(CONFVARS_FILE)
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.PHONY: deploy
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deploy: $(BUILD)/firmware-combined.bin
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$(ECHO) "Writing $< to the board"
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$(Q)esptool.py --port $(PORT) --baud $(BAUD) write_flash --verify --flash_size=$(FLASH_SIZE) --flash_mode=$(FLASH_MODE) 0 $<
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reset:
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echo -e "\r\nimport machine; machine.reset()\r\n" >$(PORT)
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$(BUILD)/firmware-combined.bin: $(BUILD)/firmware.elf
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$(ECHO) "Create $@"
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$(Q)esptool.py elf2image $^
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$(Q)$(PYTHON) makeimg.py $(BUILD)/firmware.elf-0x00000.bin $(BUILD)/firmware.elf-0x0[1-f]000.bin $@
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$(BUILD)/firmware.elf: $(OBJ)
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$(ECHO) "LINK $@"
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$(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS)
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$(Q)$(SIZE) $@
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512k:
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$(MAKE) LDSCRIPT=esp8266_512k.ld CFLAGS_EXTRA='-DMP_CONFIGFILE="<mpconfigport_512k.h>"' MICROPY_FATFS=0 MICROPY_PY_BTREE=0
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#MAKE_PINS = boards/make-pins.py
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#BOARD_PINS = boards/$(BOARD)/pins.csv
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#AF_FILE = boards/stm32f4xx_af.csv
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#PREFIX_FILE = boards/stm32f4xx_prefix.c
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#GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
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#GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
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#GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
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#GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
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#GEN_PINS_AF_PY = $(BUILD)/pins_af.py
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# Making OBJ use an order-only depenedency on the generated pins.h file
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# has the side effect of making the pins.h file before we actually compile
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# any of the objects. The normal dependency generation will deal with the
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# case when pins.h is modified. But when it doesn't exist, we don't know
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# which source files might need it.
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#$(OBJ): | $(HEADER_BUILD)/pins.h
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# Use a pattern rule here so that make will only call make-pins.py once to make
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# both pins_$(BOARD).c and pins.h
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#$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
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# $(ECHO) "Create $@"
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# $(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
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#
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#$(BUILD)/pins_$(BOARD).o: $(BUILD)/pins_$(BOARD).c
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# $(call compile_c)
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include ../py/mkrules.mk
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axtls: $(BUILD)/libaxtls.a
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$(BUILD)/libaxtls.a:
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cd ../lib/axtls; cp config/upyconfig config/.config
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cd ../lib/axtls; make oldconfig -B
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cd ../lib/axtls; make clean
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cd ../lib/axtls; make all CC="$(CC)" LD="$(LD)" AR="$(AR)" CFLAGS_EXTRA="$(CFLAGS_XTENSA) -Dabort=abort_ -DRT_MAX_PLAIN_LENGTH=1024 -DRT_EXTRA=3072"
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cp ../lib/axtls/_stage/libaxtls.a $@
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