66edcf5d03
PicoDVI in CP support 640x480 and 800x480 on Feather DVI, Pico and Pico W. 1 and 2 bit grayscale are full resolution. 8 and 16 bit color are half resolution. Memory layout is modified to give the top most 4k of ram to the second core. Its MPU is used to prevent flash access after startup. The port saved word is moved to a watchdog scratch register so that it doesn't get overwritten by other things in RAM. Right align status bar and scroll area. This normally gives a few pixels of padding on the left hand side and improves the odds it is readable in a case. Fixes #7562 Fixes c stack checking. The length was correct but the top was being set to the current stack pointer instead of the correct top. Fixes #7643 This makes Bitmap subscr raise IndexError instead of ValueError when the index arguments are wrong.
303 lines
8.1 KiB
Plaintext
303 lines
8.1 KiB
Plaintext
/* Based on GCC ARM embedded samples.
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Defines the following symbols for use by code:
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__exidx_start
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__exidx_end
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__etext
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__data_start__
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__preinit_array_start
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__preinit_array_end
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__init_array_start
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__init_array_end
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__fini_array_start
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__fini_array_end
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__data_end__
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__bss_start__
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__bss_end__
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__end__
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end
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__HeapLimit
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__StackLimit
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__StackTop
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__stack (== StackTop)
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*/
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firmware_size = DEFINED(firmware_size) ? firmware_size : 1020K ;
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MEMORY
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{
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FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = firmware_size
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/* Followed by: 4kB of NVRAM and at least 1024kB of CIRCUITPY */
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256k
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SCRATCH_Y (rwx) : ORIGIN = 0x20040000, LENGTH = 4k
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/* X is used by core 1 so we put it last. */
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SCRATCH_X (rwx) : ORIGIN = 0x20041000, LENGTH = 4k
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}
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ENTRY(_entry_point)
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SECTIONS
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{
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/* Second stage bootloader is prepended to the image. It must be 256 bytes big
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and checksummed. It is usually built by the boot_stage2 target
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in the Pico SDK
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*/
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.flash_begin : {
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__flash_binary_start = .;
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} > FLASH_FIRMWARE
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.boot2 : {
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__boot2_start__ = .;
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KEEP (*(.boot2))
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__boot2_end__ = .;
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} > FLASH_FIRMWARE
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ASSERT(__boot2_end__ - __boot2_start__ == 256,
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"ERROR: Pico second stage bootloader must be 256 bytes in size")
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/* The second stage will always enter the image at the start of .text.
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The debugger will use the ELF entry point, which is the _entry_point
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symbol if present, otherwise defaults to start of .text.
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This can be used to transfer control back to the bootrom on debugger
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launches only, to perform proper flash setup.
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*/
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.text : {
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__logical_binary_start = .;
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KEEP (*(.vectors))
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KEEP (*(.binary_info_header))
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__binary_info_header_end = .;
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KEEP (*(.reset))
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/* TODO revisit this now memset/memcpy/float in ROM */
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/* bit of a hack right now to exclude all floating point and time critical (e.g. memset, memcpy) code from
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* FLASH ... we will include any thing excluded here in .data below by default */
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*(.init)
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__property_getter_start = .;
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*(.property_getter)
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__property_getter_end = .;
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__property_getset_start = .;
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*(.property_getset)
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__property_getset_end = .;
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*(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a: *interp.o *divider.o) .text*)
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*(.fini)
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/* Pull all c'tors into .text */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* Followed by destructors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.eh_frame*)
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. = ALIGN(4);
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} > FLASH_FIRMWARE
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.rodata : {
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*(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .rodata*)
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. = ALIGN(4);
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.flashdata*)))
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. = ALIGN(4);
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} > FLASH_FIRMWARE
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH_FIRMWARE
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH_FIRMWARE
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__exidx_end = .;
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/* Machine inspectable binary information */
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. = ALIGN(4);
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__binary_info_start = .;
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.binary_info :
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{
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KEEP(*(.binary_info.keep.*))
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*(.binary_info.*)
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} > FLASH_FIRMWARE
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__binary_info_end = .;
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. = ALIGN(4);
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/* End of .text-like segments */
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__etext = .;
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.ram_vector_table (COPY): {
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*(.ram_vector_table)
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} > RAM
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.data : {
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__data_start__ = .;
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*(vtable)
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*(EXCLUDE_FILE(*tmds_encode.o) .time_critical*)
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/* remaining .text and .rodata; i.e. stuff we exclude above because we want it in RAM */
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*(.text*)
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. = ALIGN(4);
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*(.rodata*)
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. = ALIGN(4);
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*(.data*)
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. = ALIGN(4);
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*(.after_data.*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__mutex_array_start = .);
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KEEP(*(SORT(.mutex_array.*)))
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KEEP(*(.mutex_array))
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PROVIDE_HIDDEN (__mutex_array_end = .);
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(SORT(.preinit_array.*)))
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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*(SORT(.fini_array.*))
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*(.fini_array)
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PROVIDE_HIDDEN (__fini_array_end = .);
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*(.jcr)
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM AT> FLASH_FIRMWARE
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.itcm :
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{
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. = ALIGN(4);
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*(.itcm.*)
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. = ALIGN(4);
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} > RAM AT> FLASH_FIRMWARE
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_ld_itcm_destination = ADDR(.itcm);
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_ld_itcm_flash_copy = LOADADDR(.itcm);
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_ld_itcm_size = SIZEOF(.itcm);
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.dtcm_data :
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{
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. = ALIGN(4);
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*(.dtcm_data.*)
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. = ALIGN(4);
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} > RAM AT> FLASH_FIRMWARE
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_ld_dtcm_data_destination = ADDR(.dtcm_data);
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_ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data);
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_ld_dtcm_data_size = SIZEOF(.dtcm_data);
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.dtcm_bss :
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{
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. = ALIGN(4);
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*(.dtcm_bss.*)
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. = ALIGN(4);
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} > RAM AT> RAM
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_ld_dtcm_bss_start = ADDR(.dtcm_bss);
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_ld_dtcm_bss_size = SIZEOF(.dtcm_bss);
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.uninitialized_data (COPY): {
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. = ALIGN(4);
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*(.uninitialized_data*)
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} > RAM
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.bss : {
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. = ALIGN(4);
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__bss_start__ = .;
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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} > RAM
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.heap (COPY):
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{
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__end__ = .;
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end = __end__;
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_ld_cp_dynamic_mem_start = .;
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*(.heap*)
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__HeapLimit = .;
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} > RAM
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/* Start and end symbols must be word-aligned */
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.scratch_x : {
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__scratch_x_start__ = .;
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*(.scratch_x.*)
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*tmds_encode.o (.time_critical*)
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. = ALIGN(4);
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__scratch_x_end__ = .;
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} > SCRATCH_X AT > FLASH_FIRMWARE
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__scratch_x_source__ = LOADADDR(.scratch_x);
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.scratch_y : {
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__scratch_y_start__ = .;
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/* Don't put anything into scratch y because CircuitPython manages it and uses it for core 0 stack.
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/* *(.scratch_y.*) */
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. = ALIGN(4);
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__scratch_y_end__ = .;
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} > SCRATCH_Y AT > FLASH_FIRMWARE
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__scratch_y_source__ = LOADADDR(.scratch_y);
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/* .stack*_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later
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*
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* stack1 section may be empty/missing if platform_launch_core1 is not used */
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/* by default we put core 0 stack at the end of scratch Y, so that if core 1
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* stack is not used then all of SCRATCH_X is free.
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*/
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.stack1_dummy (COPY):
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{
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*(.stack1*)
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} > SCRATCH_X
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.stack_dummy (COPY):
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{
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*(.stack*)
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} > SCRATCH_Y
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.flash_end : {
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__flash_binary_end = .;
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} > FLASH_FIRMWARE
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/* stack limit is poorly named, but historically is maximum heap ptr */
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__StackLimit = ORIGIN(RAM) + LENGTH(RAM);
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__StackOneTop = ORIGIN(SCRATCH_X) + LENGTH(SCRATCH_X);
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__StackTop = ORIGIN(SCRATCH_Y) + LENGTH(SCRATCH_Y);
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_ld_cp_dynamic_mem_end = __StackTop;
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__StackOneBottom = __StackOneTop - SIZEOF(.stack1_dummy);
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__StackBottom = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed")
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ASSERT( __binary_info_header_end - __logical_binary_start <= 256, "Binary info must be in first 256 bytes of the binary")
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/* todo assert on extra code */
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}
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