332 lines
11 KiB
C
332 lines
11 KiB
C
/******************************************************************************
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* Copyright 2013-2014 Espressif Systems (Wuxi)
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*
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* FileName: uart.c
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*
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* Description: Two UART mode configuration and interrupt handler.
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* Check your hardware connection while use this mode.
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*
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* Modification history:
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* 2014/3/12, v1.0 create this file.
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*******************************************************************************/
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#include "ets_sys.h"
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#include "osapi.h"
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#include "uart.h"
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#include "osapi.h"
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#include "uart_register.h"
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#include "etshal.h"
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#include "c_types.h"
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#include "user_interface.h"
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#include "esp_mphal.h"
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// seems that this is missing in the Espressif SDK
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#define FUNC_U0RXD 0
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#define UART_REPL UART0
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev;
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// the uart to which OS messages go; -1 to disable
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static int uart_os = UART_OS;
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#if MICROPY_REPL_EVENT_DRIVEN
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static os_event_t uart_evt_queue[16];
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#endif
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// A small, static ring buffer for incoming chars
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// This will only be populated if the UART is not attached to dupterm
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uint8 uart_ringbuf_array[UART0_STATIC_RXBUF_LEN];
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static ringbuf_t uart_ringbuf = {uart_ringbuf_array, sizeof(uart_ringbuf_array), 0, 0};
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static void uart0_rx_intr_handler(void *para);
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void soft_reset(void);
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void mp_sched_keyboard_interrupt(void);
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/******************************************************************************
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* FunctionName : uart_config
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* Description : Internal used function
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* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
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* UART1 just used for debug output
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* Parameters : uart_no, use UART0 or UART1 defined ahead
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* Returns : NONE
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR uart_config(uint8 uart_no) {
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if (uart_no == UART1) {
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
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} else {
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ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, NULL);
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);
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}
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uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
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WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity
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| UartDev.parity
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| (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
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| (UartDev.data_bits << UART_BIT_NUM_S));
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// clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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if (uart_no == UART0) {
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// set rx fifo trigger
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((0x10 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
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((0x10 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
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UART_RX_FLOW_EN |
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(0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
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UART_RX_TOUT_EN);
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA |
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UART_FRM_ERR_INT_ENA);
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} else {
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
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}
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// clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
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// enable rx_interrupt
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
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}
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/******************************************************************************
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* FunctionName : uart1_tx_one_char
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* Description : Internal used function
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* Use uart1 interface to transfer one char
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* Parameters : uint8 TxChar - character to tx
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* Returns : OK
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*******************************************************************************/
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void uart_tx_one_char(uint8 uart, uint8 TxChar) {
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while (true) {
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uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S);
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if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
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break;
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}
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}
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WRITE_PERI_REG(UART_FIFO(uart), TxChar);
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}
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int uart_txdone(uint8 uart) {
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uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S);
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if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) == 0) {
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return true;
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} else {
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return false;
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}
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}
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void uart_flush(uint8 uart) {
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while (true) {
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uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S);
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if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) == 0) {
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break;
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}
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}
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}
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/******************************************************************************
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* FunctionName : uart1_write_char
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* Description : Internal used function
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* Do some special deal while tx char is '\r' or '\n'
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* Parameters : char c - character to tx
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* Returns : NONE
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR
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uart_os_write_char(char c) {
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if (uart_os == -1) {
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return;
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}
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if (c == '\n') {
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uart_tx_one_char(uart_os, '\r');
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uart_tx_one_char(uart_os, '\n');
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} else if (c == '\r') {
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} else {
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uart_tx_one_char(uart_os, c);
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}
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}
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void ICACHE_FLASH_ATTR
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uart_os_config(int uart) {
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uart_os = uart;
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}
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/******************************************************************************
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* FunctionName : uart0_rx_intr_handler
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* Description : Internal used function
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* UART0 interrupt handler, add self handle code inside
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* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
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* Returns : NONE
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*******************************************************************************/
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static void uart0_rx_intr_handler(void *para) {
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/* uart0 and uart1 intr combine together, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
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* uart1 and uart0 respectively
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*/
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uint8 uart_no = UART_REPL;
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if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) {
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// frame error
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WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR);
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}
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if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) {
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// fifo full
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goto read_chars;
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} else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) {
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read_chars:
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ETS_UART_INTR_DISABLE();
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while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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uint8 RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff;
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// For efficiency, when connected to dupterm we put incoming chars
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// directly on stdin_ringbuf, rather than going via uart_ringbuf
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if (uart_attached_to_dupterm) {
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if (RcvChar == mp_interrupt_char) {
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mp_sched_keyboard_interrupt();
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} else {
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ringbuf_put(&stdin_ringbuf, RcvChar);
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}
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} else {
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ringbuf_put(&uart_ringbuf, RcvChar);
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}
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}
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// Clear pending FIFO interrupts
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WRITE_PERI_REG(UART_INT_CLR(UART_REPL), UART_RXFIFO_TOUT_INT_CLR | UART_RXFIFO_FULL_INT_ST);
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ETS_UART_INTR_ENABLE();
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if (uart_attached_to_dupterm) {
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mp_hal_signal_input();
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}
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}
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}
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// Waits at most timeout microseconds for at least 1 char to become ready for reading.
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// Returns true if something available, false if not.
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bool ICACHE_FLASH_ATTR uart_rx_wait(uint32_t timeout_us) {
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uint32_t start = system_get_time();
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for (;;) {
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if (uart_ringbuf.iget != uart_ringbuf.iput) {
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return true; // have at least 1 char ready for reading
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}
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if (system_get_time() - start >= timeout_us) {
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return false; // timeout
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}
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ets_event_poll();
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}
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}
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int uart_rx_any(uint8 uart) {
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if (uart_ringbuf.iget != uart_ringbuf.iput) {
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return true; // have at least 1 char ready for reading
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}
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return false;
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}
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int uart_tx_any_room(uint8 uart) {
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uint32_t fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S);
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if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) >= 126) {
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return false;
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}
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return true;
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}
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// Returns char from the input buffer, else -1 if buffer is empty.
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int uart_rx_char(void) {
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return ringbuf_get(&uart_ringbuf);
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}
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int uart_rx_one_char(uint8 uart_no) {
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if (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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return READ_PERI_REG(UART_FIFO(uart_no)) & 0xff;
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}
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return -1;
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}
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/******************************************************************************
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* FunctionName : uart_init
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* Description : user interface for init uart
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* Parameters : UartBautRate uart0_br - uart0 bautrate
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* UartBautRate uart1_br - uart1 bautrate
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR uart_init(UartBautRate uart0_br, UartBautRate uart1_br) {
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// rom use 74880 baut_rate, here reinitialize
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UartDev.baut_rate = uart0_br;
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uart_config(UART0);
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UartDev.baut_rate = uart1_br;
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uart_config(UART1);
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ETS_UART_INTR_ENABLE();
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// install handler for "os" messages
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os_install_putc1((void *)uart_os_write_char);
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}
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void ICACHE_FLASH_ATTR uart_reattach() {
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uart_init(UART_BIT_RATE_74880, UART_BIT_RATE_74880);
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}
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void ICACHE_FLASH_ATTR uart_setup(uint8 uart) {
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ETS_UART_INTR_DISABLE();
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uart_config(uart);
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ETS_UART_INTR_ENABLE();
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}
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int ICACHE_FLASH_ATTR uart0_get_rxbuf_len(void) {
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return uart_ringbuf.size;
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}
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void ICACHE_FLASH_ATTR uart0_set_rxbuf(uint8 *buf, int len) {
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ETS_UART_INTR_DISABLE();
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uart_ringbuf.buf = buf;
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uart_ringbuf.size = len;
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uart_ringbuf.iget = 0;
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uart_ringbuf.iput = 0;
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ETS_UART_INTR_ENABLE();
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}
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// Task-based UART interface
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#include "py/obj.h"
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#include "shared/runtime/pyexec.h"
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#if MICROPY_REPL_EVENT_DRIVEN
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void ICACHE_FLASH_ATTR uart_task_handler(os_event_t *evt) {
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if (pyexec_repl_active) {
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// TODO: Just returning here isn't exactly right.
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// What really should be done is something like
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// enquing delayed event to itself, for another
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// chance to feed data to REPL. Otherwise, there
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// can be situation when buffer has bunch of data,
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// and sits unprocessed, because we consumed all
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// processing signals like this.
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return;
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}
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int c, ret = 0;
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while ((c = ringbuf_get(&stdin_ringbuf)) >= 0) {
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if (c == mp_interrupt_char) {
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mp_sched_keyboard_interrupt();
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}
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ret = pyexec_event_repl_process_char(c);
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if (ret & PYEXEC_FORCED_EXIT) {
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break;
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}
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}
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if (ret & PYEXEC_FORCED_EXIT) {
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soft_reset();
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}
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}
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void uart_task_init() {
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system_os_task(uart_task_handler, UART_TASK_ID, uart_evt_queue, sizeof(uart_evt_queue) / sizeof(*uart_evt_queue));
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}
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#endif
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