0096041c99
STM32F0 has PCLK=48MHz and maximum ADC clock is 14MHz so use PCLK/4=12MHz to stay within spec of the ADC peripheral. In pyb.ADC set common sampling time to approx 4uS for internal and external sources. In machine.ADC reduce sample time to approx 1uS for external source, leave internal at maximum sampling time.
451 lines
14 KiB
C
451 lines
14 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/runtime.h"
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#include "py/mphal.h"
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#if defined(STM32F0) || defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32WB)
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#define ADC_V2 (1)
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#else
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#define ADC_V2 (0)
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#endif
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#if defined(STM32F4) || defined(STM32L4)
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#define ADCx_COMMON ADC_COMMON_REGISTER(0)
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#elif defined(STM32F7)
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#define ADCx_COMMON ADC123_COMMON
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#endif
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#if defined(STM32F0) || defined(STM32L0)
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#define ADC_STAB_DELAY_US (1)
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#define ADC_TEMPSENSOR_DELAY_US (10)
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#elif defined(STM32L4)
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#define ADC_STAB_DELAY_US (10)
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#elif defined(STM32WB)
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#define ADC_STAB_DELAY_US (1)
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#endif
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#if defined(STM32F0)
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#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_13CYCLES_5
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#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_239CYCLES_5
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#elif defined(STM32F4) || defined(STM32F7)
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#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_15CYCLES
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#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_480CYCLES
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#elif defined(STM32H7)
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#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_8CYCLES_5
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#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_387CYCLES_5
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#elif defined(STM32L0)
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#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_12CYCLES_5
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#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_160CYCLES_5
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#elif defined(STM32L4) || defined(STM32WB)
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#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_12CYCLES_5
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#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_247CYCLES_5
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#endif
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// Timeout for waiting for end-of-conversion
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#define ADC_EOC_TIMEOUT_MS (10)
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// This is a synthesised channel representing the maximum ADC reading (useful to scale other channels)
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#define ADC_CHANNEL_VREF (0xffff)
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static inline void adc_stabilisation_delay_us(uint32_t us) {
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mp_hal_delay_us(us + 1);
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}
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STATIC void adc_wait_eoc(ADC_TypeDef *adc, int32_t timeout_ms) {
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uint32_t t0 = mp_hal_ticks_ms();
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#if ADC_V2
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while (!(adc->ISR & ADC_ISR_EOC))
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#else
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while (!(adc->SR & ADC_SR_EOC))
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#endif
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{
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if (mp_hal_ticks_ms() - t0 > timeout_ms) {
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break; // timeout
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}
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}
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}
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#if defined(STM32H7)
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STATIC const uint8_t adc_cr_to_bits_table[] = {16, 14, 12, 10, 8, 8, 8, 8};
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#else
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STATIC const uint8_t adc_cr_to_bits_table[] = {12, 10, 8, 6};
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#endif
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STATIC void adc_config(ADC_TypeDef *adc, uint32_t bits) {
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// Configure ADC clock source and enable ADC clock
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#if defined(STM32L4) || defined(STM32WB)
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__HAL_RCC_ADC_CONFIG(RCC_ADCCLKSOURCE_SYSCLK);
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__HAL_RCC_ADC_CLK_ENABLE();
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#else
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if (adc == ADC1) {
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#if defined(STM32H7)
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__HAL_RCC_ADC12_CLK_ENABLE();
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#else
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__HAL_RCC_ADC1_CLK_ENABLE();
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#endif
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}
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#if defined(ADC2)
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if (adc == ADC2) {
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#if defined(STM32H7)
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__HAL_RCC_ADC12_CLK_ENABLE();
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#else
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__HAL_RCC_ADC2_CLK_ENABLE();
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#endif
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}
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#endif
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#if defined(ADC3)
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if (adc == ADC3) {
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__HAL_RCC_ADC3_CLK_ENABLE();
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}
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#endif
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#endif
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// Configure clock mode
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#if defined(STM32F0)
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adc->CFGR2 = 2 << ADC_CFGR2_CKMODE_Pos; // PCLK/4 (synchronous clock mode)
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#elif defined(STM32F4) || defined(STM32F7) || defined(STM32L4)
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ADCx_COMMON->CCR = 0; // ADCPR=PCLK/2
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#elif defined(STM32H7)
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ADC12_COMMON->CCR = 3 << ADC_CCR_CKMODE_Pos;
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ADC3_COMMON->CCR = 3 << ADC_CCR_CKMODE_Pos;
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#elif defined(STM32L0) || defined(STM32WB)
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ADC1_COMMON->CCR = 0; // ADCPR=PCLK/2
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#endif
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#if defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
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if (adc->CR & ADC_CR_DEEPPWD) {
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adc->CR = 0; // disable deep powerdown
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}
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#endif
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#if defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32WB)
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if (!(adc->CR & ADC_CR_ADVREGEN)) {
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adc->CR = ADC_CR_ADVREGEN; // enable VREG
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#if defined(STM32H7)
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mp_hal_delay_us(10); // T_ADCVREG_STUP
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#elif defined(STM32L4) || defined(STM32WB)
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mp_hal_delay_us(20); // T_ADCVREG_STUP
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#endif
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}
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#endif
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#if ADC_V2
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if (adc->CR == 0) {
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// ADC hasn't been enabled so calibrate it
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adc->CR |= ADC_CR_ADCAL;
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while (adc->CR & ADC_CR_ADCAL) {
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}
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}
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if (adc->CR & ADC_CR_ADEN) {
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// ADC enabled, need to disable it to change configuration
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if (adc->CR & ADC_CR_ADSTART) {
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adc->CR |= ADC_CR_ADSTP;
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while (adc->CR & ADC_CR_ADSTP) {
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}
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}
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adc->CR |= ADC_CR_ADDIS;
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while (adc->CR & ADC_CR_ADDIS) {
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}
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}
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#endif
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// Find resolution, defaulting to last element in table
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uint32_t res;
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for (res = 0; res <= MP_ARRAY_SIZE(adc_cr_to_bits_table); ++res) {
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if (adc_cr_to_bits_table[res] == bits) {
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break;
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}
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}
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#if defined(STM32F0) || defined(STM32L0)
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uint32_t cfgr1_clr = ADC_CFGR1_CONT | ADC_CFGR1_EXTEN | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | ADC_CFGR1_DMAEN;
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uint32_t cfgr1 = res << ADC_CFGR1_RES_Pos;
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adc->CFGR1 = (adc->CFGR1 & ~cfgr1_clr) | cfgr1;
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#elif defined(STM32F4) || defined(STM32F7)
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uint32_t cr1_clr = ADC_CR1_RES;
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uint32_t cr1 = res << ADC_CR1_RES_Pos;
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adc->CR1 = (adc->CR1 & ~cr1_clr) | cr1;
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uint32_t cr2_clr = ADC_CR2_EXTEN | ADC_CR2_ALIGN | ADC_CR2_DMA | ADC_CR2_CONT;
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uint32_t cr2 = 0;
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adc->CR2 = (adc->CR2 & ~cr2_clr) | cr2;
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adc->SQR1 = 1 << ADC_SQR1_L_Pos; // 1 conversion in regular sequence
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#elif defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
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uint32_t cfgr_clr = ADC_CFGR_CONT | ADC_CFGR_EXTEN | ADC_CFGR_RES;
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#if defined(STM32H7)
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cfgr_clr |= ADC_CFGR_DMNGT;
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#else
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cfgr_clr |= ADC_CFGR_ALIGN | ADC_CFGR_DMAEN;
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#endif
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uint32_t cfgr = res << ADC_CFGR_RES_Pos;
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adc->CFGR = (adc->CFGR & ~cfgr_clr) | cfgr;
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#endif
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}
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STATIC int adc_get_bits(ADC_TypeDef *adc) {
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#if defined(STM32F0) || defined(STM32L0)
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uint32_t res = (adc->CFGR1 & ADC_CFGR1_RES) >> ADC_CFGR1_RES_Pos;
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#elif defined(STM32F4) || defined(STM32F7)
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uint32_t res = (adc->CR1 & ADC_CR1_RES) >> ADC_CR1_RES_Pos;
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#elif defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
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uint32_t res = (adc->CFGR & ADC_CFGR_RES) >> ADC_CFGR_RES_Pos;
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#endif
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return adc_cr_to_bits_table[res];
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}
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STATIC void adc_config_channel(ADC_TypeDef *adc, uint32_t channel, uint32_t sample_time) {
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#if ADC_V2
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if (!(adc->CR & ADC_CR_ADEN)) {
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if (adc->CR & 0x3f) {
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// Cannot enable ADC with CR!=0
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return;
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}
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adc->ISR = ADC_ISR_ADRDY; // clear ADRDY
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adc->CR |= ADC_CR_ADEN;
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adc_stabilisation_delay_us(ADC_STAB_DELAY_US);
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while (!(adc->ISR & ADC_ISR_ADRDY)) {
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}
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}
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#else
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if (!(adc->CR2 & ADC_CR2_ADON)) {
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adc->CR2 |= ADC_CR2_ADON;
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adc_stabilisation_delay_us(ADC_STAB_DELAY_US);
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}
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#endif
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#if defined(STM32F0) || defined(STM32L0)
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if (channel == ADC_CHANNEL_VREFINT) {
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ADC1_COMMON->CCR |= ADC_CCR_VREFEN;
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} else if (channel == ADC_CHANNEL_TEMPSENSOR) {
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ADC1_COMMON->CCR |= ADC_CCR_TSEN;
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adc_stabilisation_delay_us(ADC_TEMPSENSOR_DELAY_US);
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#if defined(ADC_CHANNEL_VBAT)
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} else if (channel == ADC_CHANNEL_VBAT) {
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ADC1_COMMON->CCR |= ADC_CCR_VBATEN;
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#endif
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}
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adc->SMPR = sample_time << ADC_SMPR_SMP_Pos; // select sample time
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adc->CHSELR = 1 << channel; // select channel for conversion
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#elif defined(STM32F4) || defined(STM32F7)
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if (channel == ADC_CHANNEL_VREFINT || channel == ADC_CHANNEL_TEMPSENSOR) {
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ADCx_COMMON->CCR = (ADCx_COMMON->CCR & ~ADC_CCR_VBATE) | ADC_CCR_TSVREFE;
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if (channel == ADC_CHANNEL_TEMPSENSOR) {
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adc_stabilisation_delay_us(ADC_TEMPSENSOR_DELAY_US);
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}
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} else if (channel == ADC_CHANNEL_VBAT) {
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ADCx_COMMON->CCR |= ADC_CCR_VBATE;
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}
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adc->SQR3 = (channel & 0x1f) << ADC_SQR3_SQ1_Pos; // select channel for first conversion
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__IO uint32_t *smpr;
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if (channel <= 9) {
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smpr = &adc->SMPR2;
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} else {
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smpr = &adc->SMPR1;
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channel -= 10;
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}
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*smpr = (*smpr & ~(7 << (channel * 3))) | sample_time << (channel * 3); // select sample time
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#elif defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
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#if defined(STM32H7)
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adc->PCSEL |= 1 << channel;
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ADC_Common_TypeDef *adc_common = adc == ADC3 ? ADC3_COMMON : ADC12_COMMON;
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#elif defined(STM32L4)
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ADC_Common_TypeDef *adc_common = ADCx_COMMON;
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#elif defined(STM32WB)
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ADC_Common_TypeDef *adc_common = ADC1_COMMON;
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#endif
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if (channel == ADC_CHANNEL_VREFINT) {
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adc_common->CCR |= ADC_CCR_VREFEN;
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} else if (channel == ADC_CHANNEL_TEMPSENSOR) {
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adc_common->CCR |= ADC_CCR_TSEN;
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adc_stabilisation_delay_us(ADC_TEMPSENSOR_DELAY_US);
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} else if (channel == ADC_CHANNEL_VBAT) {
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adc_common->CCR |= ADC_CCR_VBATEN;
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}
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adc->SQR1 = (channel & 0x1f) << ADC_SQR1_SQ1_Pos | (1 - 1) << ADC_SQR1_L_Pos;
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__IO uint32_t *smpr;
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if (channel <= 9) {
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smpr = &adc->SMPR1;
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} else {
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smpr = &adc->SMPR2;
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channel -= 10;
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}
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*smpr = (*smpr & ~(7 << (channel * 3))) | sample_time << (channel * 3); // select sample time
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#endif
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}
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STATIC uint32_t adc_read_channel(ADC_TypeDef *adc) {
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#if ADC_V2
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adc->CR |= ADC_CR_ADSTART;
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#else
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adc->CR2 |= ADC_CR2_SWSTART;
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#endif
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adc_wait_eoc(adc, ADC_EOC_TIMEOUT_MS);
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uint32_t value = adc->DR;
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return value;
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}
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STATIC uint32_t adc_config_and_read_u16(ADC_TypeDef *adc, uint32_t channel, uint32_t sample_time) {
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if (channel == ADC_CHANNEL_VREF) {
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return 0xffff;
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}
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adc_config_channel(adc, channel, sample_time);
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uint32_t raw = adc_read_channel(adc);
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uint32_t bits = adc_get_bits(adc);
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// Scale raw reading to 16 bit value using a Taylor expansion (for 8 <= bits <= 16)
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#if defined(STM32H7)
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if (bits < 8) {
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// For 6 and 7 bits
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return raw << (16 - bits) | raw << (16 - 2 * bits) | raw >> (3 * bits - 16);
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}
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#endif
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return raw << (16 - bits) | raw >> (2 * bits - 16);
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}
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/******************************************************************************/
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// MicroPython bindings for machine.ADC
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const mp_obj_type_t machine_adc_type;
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typedef struct _machine_adc_obj_t {
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mp_obj_base_t base;
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ADC_TypeDef *adc;
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uint32_t channel;
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uint32_t sample_time;
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} machine_adc_obj_t;
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STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
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unsigned adc_id = 1;
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#if defined(ADC2)
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if (self->adc == ADC2) {
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adc_id = 2;
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}
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#endif
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#if defined(ADC3)
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if (self->adc == ADC3) {
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adc_id = 3;
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}
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#endif
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mp_printf(print, "<ADC%u channel=%u>", adc_id, self->channel);
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}
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// ADC(id)
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STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
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// Check number of arguments
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mp_arg_check_num(n_args, n_kw, 1, 1, false);
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mp_obj_t source = all_args[0];
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uint32_t channel;
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uint32_t sample_time = ADC_SAMPLETIME_DEFAULT;
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ADC_TypeDef *adc;
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if (mp_obj_is_int(source)) {
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adc = ADC1;
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channel = mp_obj_get_int(source);
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if (channel == ADC_CHANNEL_VREFINT
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|| channel == ADC_CHANNEL_TEMPSENSOR
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#if defined(ADC_CHANNEL_VBAT)
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|| channel == ADC_CHANNEL_VBAT
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#endif
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) {
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sample_time = ADC_SAMPLETIME_DEFAULT_INT;
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}
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} else {
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const pin_obj_t *pin = pin_find(source);
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if (pin->adc_num & PIN_ADC1) {
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adc = ADC1;
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#if defined(ADC2)
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} else if (pin->adc_num & PIN_ADC2) {
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adc = ADC2;
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#endif
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#if defined(ADC2)
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} else if (pin->adc_num & PIN_ADC3) {
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adc = ADC3;
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#endif
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} else {
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// No ADC function on given pin
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "Pin(%q) does not have ADC capabilities", pin->name));
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}
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channel = pin->adc_channel;
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// Configure the GPIO pin in ADC mode
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mp_hal_pin_config(pin, MP_HAL_PIN_MODE_ADC, MP_HAL_PIN_PULL_NONE, 0);
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}
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adc_config(adc, 12);
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machine_adc_obj_t *o = m_new_obj(machine_adc_obj_t);
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o->base.type = &machine_adc_type;
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o->adc = adc;
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o->channel = channel;
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o->sample_time = sample_time;
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return MP_OBJ_FROM_PTR(o);
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}
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// read_u16()
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STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
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machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
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return MP_OBJ_NEW_SMALL_INT(adc_config_and_read_u16(self->adc, self->channel, self->sample_time));
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}
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MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
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STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
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{ MP_ROM_QSTR(MP_QSTR_VREF), MP_ROM_INT(ADC_CHANNEL_VREF) },
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{ MP_ROM_QSTR(MP_QSTR_CORE_VREF), MP_ROM_INT(ADC_CHANNEL_VREFINT) },
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{ MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(ADC_CHANNEL_TEMPSENSOR) },
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#if defined(ADC_CHANNEL_VBAT)
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{ MP_ROM_QSTR(MP_QSTR_CORE_VBAT), MP_ROM_INT(ADC_CHANNEL_VBAT) },
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#endif
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};
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STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table);
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const mp_obj_type_t machine_adc_type = {
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{ &mp_type_type },
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.name = MP_QSTR_ADC,
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.print = machine_adc_print,
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.make_new = machine_adc_make_new,
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.locals_dict = (mp_obj_dict_t*)&machine_adc_locals_dict,
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};
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