111 lines
4.3 KiB
C
111 lines
4.3 KiB
C
/*
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* This file is part of the Micro Python project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Blues Wireless Contributors
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "stm32l4xx_hal.h"
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#include "supervisor/shared/safe_mode.h"
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#include <stdbool.h>
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// L4 Series
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#ifdef STM32L4R5xx
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#include "stm32l4/stm32l4r5xx/clocks.h"
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#else
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#error Please add other MCUs here so that they are not silently ignored due to #define typos
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#endif
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#if BOARD_HAS_HIGH_SPEED_CRYSTAL
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#error HSE support needs to be added for the L4 family.
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#elif !BOARD_HAS_LOW_SPEED_CRYSTAL
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#error LSE clock source required
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#endif
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void Error_Handler(void) {
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for (;;) {
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}
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}
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#define HAL_CHECK(x) if (x != HAL_OK) Error_Handler()
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void stm32_peripherals_clocks_init(void) {
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
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// Configure LSE Drive
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HAL_PWR_EnableBkUpAccess();
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__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
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__HAL_RCC_PWR_CLK_ENABLE();
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/** Configure the main internal regulator output voltage
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*/
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if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) {
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Error_Handler();
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}
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/* Activate PLL with MSI , stabilizied via PLL by LSE */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
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RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
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RCC_OscInitStruct.PLL.PLLM = 6;
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RCC_OscInitStruct.PLL.PLLN = 30;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV5;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
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HAL_CHECK(HAL_RCC_OscConfig(&RCC_OscInitStruct));
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/* Enable MSI Auto-calibration through LSE */
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HAL_RCCEx_EnableMSIPLLMode();
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/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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clocks dividers */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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// Avoid overshoot and start with HCLK 60 MHz
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3));
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/* AHB prescaler divider at 1 as second step */
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5));
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/* Select MSI output as USB clock source */
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_ADC;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI;
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PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
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PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_SYSCLK;
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HAL_CHECK(HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct));
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}
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