69661f3343
This is run with uncrustify 0.70.1, and black 19.10b0.
507 lines
17 KiB
C
507 lines
17 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013-2019 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "timer.h"
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#include "dac.h"
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#include "dma.h"
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#include "pin.h"
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/// \moduleref pyb
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/// \class DAC - digital to analog conversion
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///
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/// The DAC is used to output analog values (a specific voltage) on pin X5 or pin X6.
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/// The voltage will be between 0 and 3.3V.
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///
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/// *This module will undergo changes to the API.*
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///
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/// Example usage:
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///
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/// from pyb import DAC
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///
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/// dac = DAC(1) # create DAC 1 on pin X5
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/// dac.write(128) # write a value to the DAC (makes X5 1.65V)
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///
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/// To output a continuous sine-wave:
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///
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/// import math
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/// from pyb import DAC
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///
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/// # create a buffer containing a sine-wave
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/// buf = bytearray(100)
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/// for i in range(len(buf)):
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/// buf[i] = 128 + int(127 * math.sin(2 * math.pi * i / len(buf)))
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///
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/// # output the sine-wave at 400Hz
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/// dac = DAC(1)
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/// dac.write_timed(buf, 400 * len(buf), mode=DAC.CIRCULAR)
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#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC
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#if defined(STM32H7)
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#define DAC DAC1
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#endif
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#if defined(TIM6)
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STATIC void TIM6_Config(uint freq) {
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// Init TIM6 at the required frequency (in Hz)
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TIM_HandleTypeDef *tim = timer_tim6_init(freq);
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// TIM6 TRGO selection
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TIM_MasterConfigTypeDef config;
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config.MasterOutputTrigger = TIM_TRGO_UPDATE;
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config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
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HAL_TIMEx_MasterConfigSynchronization(tim, &config);
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// TIM6 start counter
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HAL_TIM_Base_Start(tim);
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}
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#endif
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STATIC uint32_t TIMx_Config(mp_obj_t timer) {
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// TRGO selection to trigger DAC
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TIM_HandleTypeDef *tim = pyb_timer_get_handle(timer);
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TIM_MasterConfigTypeDef config;
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config.MasterOutputTrigger = TIM_TRGO_UPDATE;
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config.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
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HAL_TIMEx_MasterConfigSynchronization(tim, &config);
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// work out the trigger channel (only certain ones are supported)
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if (tim->Instance == TIM2) {
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return DAC_TRIGGER_T2_TRGO;
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#if defined(TIM4)
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} else if (tim->Instance == TIM4) {
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return DAC_TRIGGER_T4_TRGO;
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#endif
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#if defined(TIM5)
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} else if (tim->Instance == TIM5) {
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return DAC_TRIGGER_T5_TRGO;
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#endif
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#if defined(TIM6)
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} else if (tim->Instance == TIM6) {
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return DAC_TRIGGER_T6_TRGO;
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#endif
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#if defined(TIM7)
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} else if (tim->Instance == TIM7) {
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return DAC_TRIGGER_T7_TRGO;
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#endif
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#if defined(TIM8)
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} else if (tim->Instance == TIM8) {
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return DAC_TRIGGER_T8_TRGO;
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#endif
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} else {
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mp_raise_ValueError("Timer does not support DAC triggering");
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}
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}
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STATIC void dac_deinit(uint32_t dac_channel) {
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DAC->CR &= ~(DAC_CR_EN1 << dac_channel);
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#if defined(STM32H7) || defined(STM32L4)
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DAC->MCR = (DAC->MCR & ~(DAC_MCR_MODE1_Msk << dac_channel)) | (DAC_OUTPUTBUFFER_DISABLE << dac_channel);
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#else
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DAC->CR |= DAC_CR_BOFF1 << dac_channel;
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#endif
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}
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STATIC void dac_config_channel(uint32_t dac_channel, uint32_t trig, uint32_t outbuf) {
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DAC->CR &= ~(DAC_CR_EN1 << dac_channel);
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uint32_t cr_off = DAC_CR_DMAEN1 | DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1;
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uint32_t cr_on = trig;
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#if defined(STM32H7) || defined(STM32L4)
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DAC->MCR = (DAC->MCR & ~(DAC_MCR_MODE1_Msk << dac_channel)) | (outbuf << dac_channel);
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#else
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cr_off |= DAC_CR_BOFF1;
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cr_on |= outbuf;
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#endif
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DAC->CR = (DAC->CR & ~(cr_off << dac_channel)) | (cr_on << dac_channel);
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}
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STATIC void dac_set_value(uint32_t dac_channel, uint32_t align, uint32_t value) {
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uint32_t base;
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if (dac_channel == DAC_CHANNEL_1) {
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base = (uint32_t)&DAC->DHR12R1;
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#if !defined(STM32L452xx)
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} else {
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base = (uint32_t)&DAC->DHR12R2;
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#endif
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}
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*(volatile uint32_t *)(base + align) = value;
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}
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STATIC void dac_start(uint32_t dac_channel) {
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DAC->CR |= DAC_CR_EN1 << dac_channel;
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}
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STATIC void dac_start_dma(uint32_t dac_channel, const dma_descr_t *dma_descr, uint32_t dma_mode, uint32_t bit_size, uint32_t dac_align, size_t len, void *buf) {
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uint32_t dma_align;
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if (bit_size == 8) {
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dma_align = DMA_MDATAALIGN_BYTE | DMA_PDATAALIGN_BYTE;
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} else {
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dma_align = DMA_MDATAALIGN_HALFWORD | DMA_PDATAALIGN_HALFWORD;
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}
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uint32_t base;
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if (dac_channel == DAC_CHANNEL_1) {
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base = (uint32_t)&DAC->DHR12R1;
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#if !defined(STM32L452xx)
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} else {
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base = (uint32_t)&DAC->DHR12R2;
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#endif
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}
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dma_nohal_deinit(dma_descr);
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dma_nohal_init(dma_descr, DMA_MEMORY_TO_PERIPH | dma_mode | dma_align);
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dma_nohal_start(dma_descr, (uint32_t)buf, base + dac_align, len);
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DAC->CR |= DAC_CR_EN1 << dac_channel;
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}
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/******************************************************************************/
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// MicroPython bindings
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typedef struct _pyb_dac_obj_t {
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mp_obj_base_t base;
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uint8_t dac_channel; // DAC_CHANNEL_1 or DAC_CHANNEL_2. STM32L452 only has CHANNEL_1.
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uint8_t bits; // 8 or 12
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uint8_t outbuf_single;
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uint8_t outbuf_waveform;
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} pyb_dac_obj_t;
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STATIC pyb_dac_obj_t pyb_dac_obj[2];
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STATIC void pyb_dac_reconfigure(pyb_dac_obj_t *self, uint32_t cr, uint32_t outbuf, uint32_t value) {
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bool restart = false;
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const uint32_t cr_mask = DAC_CR_DMAEN1 | DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_EN1;
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if (((DAC->CR >> self->dac_channel) & cr_mask) != (cr | DAC_CR_EN1)) {
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const dma_descr_t *tx_dma_descr;
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if (self->dac_channel == DAC_CHANNEL_1) {
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tx_dma_descr = &dma_DAC_1_TX;
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#if !defined(STM32L452xx)
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} else {
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tx_dma_descr = &dma_DAC_2_TX;
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#endif
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}
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dma_nohal_deinit(tx_dma_descr);
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dac_config_channel(self->dac_channel, cr, outbuf);
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restart = true;
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}
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dac_set_value(self->dac_channel, DAC_ALIGN_12B_R, value);
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if (restart) {
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dac_start(self->dac_channel);
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}
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}
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STATIC void pyb_dac_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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pyb_dac_obj_t *self = MP_OBJ_TO_PTR(self_in);
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mp_printf(print, "DAC(%u, bits=%u)",
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self->dac_channel == DAC_CHANNEL_1 ? 1 : 2,
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self->bits);
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}
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STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
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{ MP_QSTR_buffering, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
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};
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// parse args
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// GPIO configuration
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mp_hal_pin_obj_t pin;
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if (self->dac_channel == DAC_CHANNEL_1) {
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pin = pin_A4;
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#if !defined(STM32L452xx)
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} else {
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pin = pin_A5;
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#endif
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}
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mp_hal_pin_config(pin, MP_HAL_PIN_MODE_ANALOG, MP_HAL_PIN_PULL_NONE, 0);
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// DAC peripheral clock
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#if defined(STM32F4) || defined(STM32F7)
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__DAC_CLK_ENABLE();
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#elif defined(STM32H7)
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__HAL_RCC_DAC12_CLK_ENABLE();
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#elif defined(STM32F0) || defined(STM32L4)
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__HAL_RCC_DAC1_CLK_ENABLE();
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#else
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#error Unsupported Processor
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#endif
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// Stop the DAC in case it was already running
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DAC->CR &= ~(DAC_CR_EN1 << self->dac_channel);
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// set bit resolution
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if (args[0].u_int == 8 || args[0].u_int == 12) {
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self->bits = args[0].u_int;
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} else {
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mp_raise_ValueError("unsupported bits");
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}
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// set output buffer config
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if (args[1].u_obj == mp_const_none) {
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// due to legacy, default values differ for single and waveform outputs
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self->outbuf_single = DAC_OUTPUTBUFFER_DISABLE;
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self->outbuf_waveform = DAC_OUTPUTBUFFER_ENABLE;
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} else if (mp_obj_is_true(args[1].u_obj)) {
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self->outbuf_single = DAC_OUTPUTBUFFER_ENABLE;
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self->outbuf_waveform = DAC_OUTPUTBUFFER_ENABLE;
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} else {
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self->outbuf_single = DAC_OUTPUTBUFFER_DISABLE;
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self->outbuf_waveform = DAC_OUTPUTBUFFER_DISABLE;
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}
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return mp_const_none;
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}
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// create the dac object
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// currently support either DAC1 on X5 (id = 1) or DAC2 on X6 (id = 2)
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/// \classmethod \constructor(port)
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/// Construct a new DAC object.
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///
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/// `port` can be a pin object, or an integer (1 or 2).
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/// DAC(1) is on pin X5 and DAC(2) is on pin X6.
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STATIC mp_obj_t pyb_dac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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// check arguments
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mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
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// get pin/channel to output on
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mp_int_t dac_id;
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if (mp_obj_is_int(args[0])) {
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dac_id = mp_obj_get_int(args[0]);
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} else {
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const pin_obj_t *pin = pin_find(args[0]);
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if (pin == pin_A4) {
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dac_id = 1;
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} else if (pin == pin_A5) {
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dac_id = 2;
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} else {
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mp_raise_msg_varg(&mp_type_ValueError, "Pin(%q) doesn't have DAC capabilities", pin->name);
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}
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}
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uint32_t dac_channel;
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if (dac_id == 1) {
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dac_channel = DAC_CHANNEL_1;
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#if !defined(STM32L452xx)
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} else if (dac_id == 2) {
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dac_channel = DAC_CHANNEL_2;
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#endif
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} else {
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mp_raise_msg_varg(&mp_type_ValueError, "DAC(%d) doesn't exist", dac_id);
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}
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pyb_dac_obj_t *dac = &pyb_dac_obj[dac_id - 1];
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dac->base.type = &pyb_dac_type;
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dac->dac_channel = dac_channel;
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if (dac->bits == 0 || n_args > 1 || n_kw > 0) {
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// configure the peripheral
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mp_map_t kw_args;
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mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
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pyb_dac_init_helper(dac, n_args - 1, args + 1, &kw_args);
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}
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// return object
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return MP_OBJ_FROM_PTR(dac);
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}
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STATIC mp_obj_t pyb_dac_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
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return pyb_dac_init_helper(MP_OBJ_TO_PTR(args[0]), n_args - 1, args + 1, kw_args);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_dac_init_obj, 1, pyb_dac_init);
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/// \method deinit()
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/// Turn off the DAC, enable other use of pin.
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STATIC mp_obj_t pyb_dac_deinit(mp_obj_t self_in) {
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pyb_dac_obj_t *self = MP_OBJ_TO_PTR(self_in);
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dac_deinit(self->dac_channel);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_dac_deinit_obj, pyb_dac_deinit);
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#if defined(TIM6)
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/// \method noise(freq)
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/// Generate a pseudo-random noise signal. A new random sample is written
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/// to the DAC output at the given frequency.
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STATIC mp_obj_t pyb_dac_noise(mp_obj_t self_in, mp_obj_t freq) {
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pyb_dac_obj_t *self = MP_OBJ_TO_PTR(self_in);
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// set TIM6 to trigger the DAC at the given frequency
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TIM6_Config(mp_obj_get_int(freq));
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// Configure DAC in noise mode with trigger via TIM6
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uint32_t cr = DAC_LFSRUNMASK_BITS11_0 | DAC_CR_WAVE1_0 | DAC_TRIGGER_T6_TRGO;
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pyb_dac_reconfigure(self, cr, self->outbuf_waveform, 0);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_noise_obj, pyb_dac_noise);
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#endif
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#if defined(TIM6)
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/// \method triangle(freq)
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/// Generate a triangle wave. The value on the DAC output changes at
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/// the given frequency, and the frequency of the repeating triangle wave
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/// itself is 8192 times smaller.
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STATIC mp_obj_t pyb_dac_triangle(mp_obj_t self_in, mp_obj_t freq) {
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pyb_dac_obj_t *self = MP_OBJ_TO_PTR(self_in);
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// set TIM6 to trigger the DAC at the given frequency
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TIM6_Config(mp_obj_get_int(freq));
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// Configure DAC in full-scale triangle mode with trigger via TIM6
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uint32_t cr = DAC_TRIANGLEAMPLITUDE_4095 | DAC_CR_WAVE1_1 | DAC_TRIGGER_T6_TRGO;
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pyb_dac_reconfigure(self, cr, self->outbuf_waveform, 0);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_triangle_obj, pyb_dac_triangle);
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#endif
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/// \method write(value)
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/// Direct access to the DAC output (8 bit only at the moment).
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STATIC mp_obj_t pyb_dac_write(mp_obj_t self_in, mp_obj_t val) {
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pyb_dac_obj_t *self = MP_OBJ_TO_PTR(self_in);
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// DAC output is always 12-bit at the hardware level, and we provide support
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// for multiple bit "resolutions" simply by shifting the input value.
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uint32_t cr = DAC_TRIGGER_NONE;
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uint32_t value = mp_obj_get_int(val) << (12 - self->bits);
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pyb_dac_reconfigure(self, cr, self->outbuf_single, value);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_dac_write_obj, pyb_dac_write);
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#if defined(TIM6)
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/// \method write_timed(data, freq, *, mode=DAC.NORMAL)
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/// Initiates a burst of RAM to DAC using a DMA transfer.
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/// The input data is treated as an array of bytes (8 bit data).
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///
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/// `freq` can be an integer specifying the frequency to write the DAC
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/// samples at, using Timer(6). Or it can be an already-initialised
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/// Timer object which is used to trigger the DAC sample. Valid timers
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/// are 2, 4, 5, 6, 7 and 8.
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///
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/// `mode` can be `DAC.NORMAL` or `DAC.CIRCULAR`.
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///
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// TODO add callback argument, to call when transfer is finished
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// TODO add double buffer argument
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//
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// TODO reconsider API, eg: write_trig(data, *, trig=None, loop=False)
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// Then trigger can be timer (preinitialised with desired freq) or pin (extint9),
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// and we can reuse the same timer for both DACs (and maybe also ADC) without
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// setting the freq twice.
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// Can still do 1-liner: dac.write_trig(buf, trig=Timer(6, freq=100), loop=True)
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mp_obj_t pyb_dac_write_timed(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_freq, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = DMA_NORMAL} },
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};
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// parse args
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pyb_dac_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// get the data to write
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mp_buffer_info_t bufinfo;
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mp_get_buffer_raise(args[0].u_obj, &bufinfo, MP_BUFFER_READ);
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uint32_t dac_trigger;
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if (mp_obj_is_integer(args[1].u_obj)) {
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// set TIM6 to trigger the DAC at the given frequency
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TIM6_Config(mp_obj_get_int(args[1].u_obj));
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dac_trigger = DAC_TRIGGER_T6_TRGO;
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} else {
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// set the supplied timer to trigger the DAC (timer should be initialised)
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dac_trigger = TIMx_Config(args[1].u_obj);
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}
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dac_config_channel(self->dac_channel, DAC_CR_DMAEN1 | dac_trigger, self->outbuf_waveform);
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|
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const dma_descr_t *tx_dma_descr;
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if (self->dac_channel == DAC_CHANNEL_1) {
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tx_dma_descr = &dma_DAC_1_TX;
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#if !defined(STM32L452xx)
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} else {
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tx_dma_descr = &dma_DAC_2_TX;
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#endif
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}
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|
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uint32_t align;
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if (self->bits == 8) {
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align = DAC_ALIGN_8B_R;
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} else {
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align = DAC_ALIGN_12B_R;
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bufinfo.len /= 2;
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}
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|
|
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dac_start_dma(self->dac_channel, tx_dma_descr, args[2].u_int, self->bits, align, bufinfo.len, bufinfo.buf);
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|
|
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return mp_const_none;
|
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}
|
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_dac_write_timed_obj, 1, pyb_dac_write_timed);
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#endif
|
|
|
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STATIC const mp_rom_map_elem_t pyb_dac_locals_dict_table[] = {
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|
// instance methods
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|
{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_dac_init_obj) },
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{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_dac_deinit_obj) },
|
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{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&pyb_dac_write_obj) },
|
|
#if defined(TIM6)
|
|
{ MP_ROM_QSTR(MP_QSTR_noise), MP_ROM_PTR(&pyb_dac_noise_obj) },
|
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{ MP_ROM_QSTR(MP_QSTR_triangle), MP_ROM_PTR(&pyb_dac_triangle_obj) },
|
|
{ MP_ROM_QSTR(MP_QSTR_write_timed), MP_ROM_PTR(&pyb_dac_write_timed_obj) },
|
|
#endif
|
|
|
|
// class constants
|
|
{ MP_ROM_QSTR(MP_QSTR_NORMAL), MP_ROM_INT(DMA_NORMAL) },
|
|
{ MP_ROM_QSTR(MP_QSTR_CIRCULAR), MP_ROM_INT(DMA_CIRCULAR) },
|
|
};
|
|
|
|
STATIC MP_DEFINE_CONST_DICT(pyb_dac_locals_dict, pyb_dac_locals_dict_table);
|
|
|
|
const mp_obj_type_t pyb_dac_type = {
|
|
{ &mp_type_type },
|
|
.name = MP_QSTR_DAC,
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|
.print = pyb_dac_print,
|
|
.make_new = pyb_dac_make_new,
|
|
.locals_dict = (mp_obj_dict_t *)&pyb_dac_locals_dict,
|
|
};
|
|
|
|
#endif // MICROPY_HW_ENABLE_DAC
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