316 lines
10 KiB
C
316 lines
10 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Dan Halbert for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include "nrf.h"
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#include "py/runtime.h"
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#include "common-hal/pwmio/PWMOut.h"
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#include "shared-bindings/pwmio/PWMOut.h"
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#include "supervisor/shared/translate.h"
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#include "nrf_gpio.h"
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#define PWM_MAX_FREQ (16000000)
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STATIC NRF_PWM_Type *pwms[] = {
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#if NRFX_CHECK(NRFX_PWM0_ENABLED)
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NRF_PWM0,
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#endif
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#if NRFX_CHECK(NRFX_PWM1_ENABLED)
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NRF_PWM1,
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#endif
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#if NRFX_CHECK(NRFX_PWM2_ENABLED)
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NRF_PWM2,
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#endif
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#if NRFX_CHECK(NRFX_PWM3_ENABLED)
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NRF_PWM3,
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#endif
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};
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#define CHANNELS_PER_PWM 4
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STATIC uint16_t pwm_seq[MP_ARRAY_SIZE(pwms)][CHANNELS_PER_PWM];
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static uint8_t never_reset_pwm[MP_ARRAY_SIZE(pwms)];
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STATIC int pwm_idx(NRF_PWM_Type *pwm) {
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for (size_t i = 0; i < MP_ARRAY_SIZE(pwms); i++) {
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if (pwms[i] == pwm) {
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return i;
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}
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}
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return -1;
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}
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void common_hal_pwmio_pwmout_never_reset(pwmio_pwmout_obj_t *self) {
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for (size_t i = 0; i < MP_ARRAY_SIZE(pwms); i++) {
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NRF_PWM_Type *pwm = pwms[i];
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if (pwm == self->pwm) {
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never_reset_pwm[i] += 1;
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}
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}
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never_reset_pin_number(self->pin_number);
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}
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void common_hal_pwmio_pwmout_reset_ok(pwmio_pwmout_obj_t *self) {
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for (size_t i = 0; i < MP_ARRAY_SIZE(pwms); i++) {
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NRF_PWM_Type *pwm = pwms[i];
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if (pwm == self->pwm) {
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never_reset_pwm[i] -= 1;
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}
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}
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}
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void reset_single_pwmout(uint8_t i) {
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NRF_PWM_Type *pwm = pwms[i];
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pwm->ENABLE = 0;
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pwm->MODE = PWM_MODE_UPDOWN_Up;
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pwm->DECODER = PWM_DECODER_LOAD_Individual;
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pwm->LOOP = 0;
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pwm->PRESCALER = PWM_PRESCALER_PRESCALER_DIV_1; // default is 500 hz
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pwm->COUNTERTOP = (PWM_MAX_FREQ / 500); // default is 500 hz
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pwm->SEQ[0].PTR = (uint32_t)pwm_seq[i];
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pwm->SEQ[0].CNT = CHANNELS_PER_PWM; // default mode is Individual --> count must be 4
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pwm->SEQ[0].REFRESH = 0;
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pwm->SEQ[0].ENDDELAY = 0;
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pwm->SEQ[1].PTR = 0;
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pwm->SEQ[1].CNT = 0;
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pwm->SEQ[1].REFRESH = 0;
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pwm->SEQ[1].ENDDELAY = 0;
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for (int ch = 0; ch < CHANNELS_PER_PWM; ch++) {
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pwm_seq[i][ch] = (1 << 15); // polarity = 0
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}
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}
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void pwmout_reset(void) {
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for (size_t i = 0; i < MP_ARRAY_SIZE(pwms); i++) {
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if (never_reset_pwm[i] > 0) {
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continue;
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}
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reset_single_pwmout(i);
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}
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}
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// Find the smallest prescaler value that will allow the divisor to be in range.
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// This allows the most accuracy.
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bool convert_frequency(uint32_t frequency, uint16_t *countertop, nrf_pwm_clk_t *base_clock) {
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uint32_t divisor = 1;
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// Use a 32-bit number so we don't overflow the uint16_t;
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uint32_t tentative_countertop;
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for (*base_clock = PWM_PRESCALER_PRESCALER_DIV_1;
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*base_clock <= PWM_PRESCALER_PRESCALER_DIV_128;
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(*base_clock)++) {
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tentative_countertop = PWM_MAX_FREQ / divisor / frequency;
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// COUNTERTOP must be 3..32767, according to datasheet, but 3 doesn't work. 4 does.
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if (tentative_countertop <= 32767 && tentative_countertop >= 4) {
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// In range, OK to return.
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*countertop = tentative_countertop;
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return true;
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}
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divisor *= 2;
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}
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return false;
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}
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// We store these in an array because we cannot compute them.
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static IRQn_Type pwm_irqs[4] = {PWM0_IRQn, PWM1_IRQn, PWM2_IRQn, PWM3_IRQn};
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NRF_PWM_Type *pwmout_allocate(uint16_t countertop, nrf_pwm_clk_t base_clock,
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bool variable_frequency, int8_t *channel_out, bool *pwm_already_in_use_out,
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IRQn_Type *irq) {
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for (size_t pwm_index = 0; pwm_index < MP_ARRAY_SIZE(pwms); pwm_index++) {
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NRF_PWM_Type *pwm = pwms[pwm_index];
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bool pwm_already_in_use = pwm->ENABLE & PWM_ENABLE_ENABLE_Msk;
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if (pwm_already_in_use) {
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if (variable_frequency) {
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// Variable frequency requires exclusive use of a PWM, so try the next one.
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continue;
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}
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// PWM is in use, but see if it's set to the same frequency we need. If so,
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// look for a free channel.
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if (pwm->COUNTERTOP == countertop && pwm->PRESCALER == base_clock) {
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for (size_t chan = 0; chan < CHANNELS_PER_PWM; chan++) {
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if (pwm->PSEL.OUT[chan] == 0xFFFFFFFF) {
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// Channel is free.
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if (channel_out) {
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*channel_out = chan;
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}
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if (pwm_already_in_use_out) {
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*pwm_already_in_use_out = pwm_already_in_use;
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}
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if (irq) {
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*irq = pwm_irqs[pwm_index];
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}
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return pwm;
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}
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}
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}
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} else {
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// PWM not yet in use, so we can start to use it. Use channel 0.
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if (channel_out) {
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*channel_out = 0;
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}
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if (pwm_already_in_use_out) {
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*pwm_already_in_use_out = pwm_already_in_use;
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}
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if (irq) {
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*irq = pwm_irqs[pwm_index];
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}
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return pwm;
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}
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}
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return NULL;
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}
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void pwmout_free_channel(NRF_PWM_Type *pwm, int8_t channel) {
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// Disconnect pin from channel.
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pwm->PSEL.OUT[channel] = 0xFFFFFFFF;
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for (int i = 0; i < CHANNELS_PER_PWM; i++) {
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if (pwm->PSEL.OUT[i] != 0xFFFFFFFF) {
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// Some channel is still being used, so don't disable.
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return;
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}
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}
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nrf_pwm_disable(pwm);
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}
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pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t *self,
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const mcu_pin_obj_t *pin,
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uint16_t duty,
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uint32_t frequency,
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bool variable_frequency) {
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// We don't use the nrfx driver here because we want to dynamically allocate channels
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// as needed in an already-enabled PWM.
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uint16_t countertop;
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nrf_pwm_clk_t base_clock;
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if (frequency == 0 || !convert_frequency(frequency, &countertop, &base_clock)) {
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return PWMOUT_INVALID_FREQUENCY;
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}
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int8_t channel;
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bool pwm_already_in_use;
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self->pwm = pwmout_allocate(countertop, base_clock, variable_frequency,
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&channel, &pwm_already_in_use, NULL);
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if (self->pwm == NULL) {
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return PWMOUT_ALL_TIMERS_IN_USE;
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}
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self->channel = channel;
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self->pin_number = pin->number;
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claim_pin(pin);
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self->frequency = frequency;
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self->variable_frequency = variable_frequency;
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// Note this is standard, not strong drive.
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nrf_gpio_cfg_output(self->pin_number);
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// disable before mapping pin channel
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nrf_pwm_disable(self->pwm);
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if (!pwm_already_in_use) {
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reset_single_pwmout(pwm_idx(self->pwm));
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nrf_pwm_configure(self->pwm, base_clock, NRF_PWM_MODE_UP, countertop);
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}
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// Connect channel to pin, without disturbing other channels.
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self->pwm->PSEL.OUT[self->channel] = pin->number;
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nrf_pwm_enable(self->pwm);
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common_hal_pwmio_pwmout_set_duty_cycle(self, duty);
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return PWMOUT_OK;
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}
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bool common_hal_pwmio_pwmout_deinited(pwmio_pwmout_obj_t *self) {
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return self->pwm == NULL;
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}
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void common_hal_pwmio_pwmout_deinit(pwmio_pwmout_obj_t *self) {
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if (common_hal_pwmio_pwmout_deinited(self)) {
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return;
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}
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nrf_gpio_cfg_default(self->pin_number);
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NRF_PWM_Type *pwm = self->pwm;
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self->pwm = NULL;
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pwmout_free_channel(pwm, self->channel);
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reset_pin_number(self->pin_number);
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self->pin_number = NO_PIN;
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}
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void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t *self, uint16_t duty_cycle) {
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self->duty_cycle = duty_cycle;
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uint16_t *p_value = ((uint16_t *)self->pwm->SEQ[0].PTR) + self->channel;
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*p_value = ((duty_cycle * self->pwm->COUNTERTOP) / 0xFFFF) | (1 << 15);
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self->pwm->TASKS_SEQSTART[0] = 1;
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}
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uint16_t common_hal_pwmio_pwmout_get_duty_cycle(pwmio_pwmout_obj_t *self) {
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return self->duty_cycle;
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}
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void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t *self, uint32_t frequency) {
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// COUNTERTOP is 3..32767, so highest available frequency is PWM_MAX_FREQ / 3.
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uint16_t countertop;
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nrf_pwm_clk_t base_clock;
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if (frequency == 0 || !convert_frequency(frequency, &countertop, &base_clock)) {
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mp_raise_ValueError(translate("Invalid PWM frequency"));
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}
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self->frequency = frequency;
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nrf_pwm_configure(self->pwm, base_clock, NRF_PWM_MODE_UP, countertop);
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// Set the duty cycle again, because it depends on COUNTERTOP, which probably changed.
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// Setting the duty cycle will also do a SEQSTART.
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common_hal_pwmio_pwmout_set_duty_cycle(self, self->duty_cycle);
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}
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uint32_t common_hal_pwmio_pwmout_get_frequency(pwmio_pwmout_obj_t *self) {
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return self->frequency;
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}
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bool common_hal_pwmio_pwmout_get_variable_frequency(pwmio_pwmout_obj_t *self) {
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return self->variable_frequency;
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}
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