733094aead
The RP2040 is new microcontroller from Raspberry Pi that features two Cortex M0s and eight PIO state machines that are good for crunching lots of data. It has 264k RAM and a built in UF2 bootloader too. Datasheet: https://pico.raspberrypi.org/files/rp2040_datasheet.pdf
295 lines
9.8 KiB
C
295 lines
9.8 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "shared-bindings/busio/SPI.h"
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#include "lib/utils/interrupt_char.h"
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#include "py/mperrno.h"
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#include "py/runtime.h"
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#include "supervisor/board.h"
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#include "common-hal/microcontroller/Pin.h"
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#include "supervisor/shared/rgb_led_status.h"
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#include "shared-bindings/microcontroller/Pin.h"
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#include "src/rp2_common/hardware_dma/include/hardware/dma.h"
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#include "src/rp2_common/hardware_gpio/include/hardware/gpio.h"
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#define NO_INSTANCE 0xff
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STATIC bool never_reset_spi[2];
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STATIC spi_inst_t* spi[2] = {spi0, spi1};
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void reset_spi(void) {
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for (size_t i = 0; i < 2; i++) {
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if (never_reset_spi[i]) {
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continue;
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}
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spi_deinit(spi[i]);
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}
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}
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void common_hal_busio_spi_construct(busio_spi_obj_t *self,
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const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi,
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const mcu_pin_obj_t * miso) {
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size_t instance_index = NO_INSTANCE;
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if (clock->number % 4 == 2) {
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instance_index = (clock->number / 8) % 2;
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}
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if (mosi != NULL) {
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// Make sure the set MOSI matches the clock settings.
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if (mosi->number % 4 != 3 ||
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(mosi->number / 8) % 2 != instance_index) {
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instance_index = NO_INSTANCE;
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}
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}
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if (miso != NULL) {
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// Make sure the set MOSI matches the clock settings.
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if (miso->number % 4 != 0 ||
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(miso->number / 8) % 2 != instance_index) {
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instance_index = NO_INSTANCE;
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}
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}
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// TODO: Check to see if we're sharing the SPI with a native APA102.
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if (instance_index > 1) {
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mp_raise_ValueError(translate("Invalid pins"));
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}
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if (instance_index == 0) {
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self->peripheral = spi0;
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} else if (instance_index == 1) {
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self->peripheral = spi1;
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}
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if ((spi_get_hw(self->peripheral)->cr1 & SPI_SSPCR1_SSE_BITS) != 0) {
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mp_raise_ValueError(translate("SPI peripheral in use"));
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}
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spi_init(self->peripheral, 250000);
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gpio_set_function(clock->number, GPIO_FUNC_SPI);
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claim_pin(clock);
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self->clock = clock;
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self->MOSI = mosi;
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if (mosi != NULL) {
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gpio_set_function(mosi->number, GPIO_FUNC_SPI);
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claim_pin(mosi);
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}
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self->MISO = miso;
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if (miso != NULL) {
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gpio_set_function(miso->number, GPIO_FUNC_SPI);
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claim_pin(miso);
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}
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}
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void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) {
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never_reset_spi[spi_get_index(self->peripheral)] = true;
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common_hal_never_reset_pin(self->clock);
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common_hal_never_reset_pin(self->MOSI);
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common_hal_never_reset_pin(self->MISO);
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}
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bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) {
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return self->clock == NULL;
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}
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void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
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if (common_hal_busio_spi_deinited(self)) {
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return;
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}
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never_reset_spi[spi_get_index(self->peripheral)] = false;
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spi_deinit(self->peripheral);
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common_hal_reset_pin(self->clock);
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common_hal_reset_pin(self->MOSI);
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common_hal_reset_pin(self->MISO);
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self->clock = NULL;
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}
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bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
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uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
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if (baudrate == self->target_frequency &&
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polarity == self->polarity &&
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phase == self->phase &&
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bits == self->bits) {
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return true;
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}
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spi_set_format(self->peripheral, bits, polarity, phase, SPI_MSB_FIRST);
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self->polarity = polarity;
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self->phase = phase;
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self->bits = bits;
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self->target_frequency = baudrate;
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self->real_frequency = spi_set_baudrate(self->peripheral, baudrate);
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return true;
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}
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bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
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bool grabbed_lock = false;
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if (!self->has_lock) {
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grabbed_lock = true;
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self->has_lock = true;
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}
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return grabbed_lock;
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}
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bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) {
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return self->has_lock;
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}
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void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
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self->has_lock = false;
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}
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static bool _transfer(busio_spi_obj_t *self,
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const uint8_t *data_out, size_t out_len,
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uint8_t *data_in, size_t in_len) {
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// Use DMA for large transfers if channels are available
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const size_t dma_min_size_threshold = 32;
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int chan_tx = -1;
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int chan_rx = -1;
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size_t len = MAX(out_len, in_len);
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if (len >= dma_min_size_threshold) {
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// Use two DMA channels to service the two FIFOs
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chan_tx = dma_claim_unused_channel(false);
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chan_rx = dma_claim_unused_channel(false);
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}
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bool use_dma = chan_rx >= 0 && chan_tx >= 0;
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if (use_dma) {
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dma_channel_config c = dma_channel_get_default_config(chan_tx);
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channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
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channel_config_set_dreq(&c, spi_get_index(self->peripheral) ? DREQ_SPI1_TX : DREQ_SPI0_TX);
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channel_config_set_read_increment(&c, out_len == len);
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channel_config_set_write_increment(&c, false);
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dma_channel_configure(chan_tx, &c,
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&spi_get_hw(self->peripheral)->dr,
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data_out,
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len,
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false);
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c = dma_channel_get_default_config(chan_rx);
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channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
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channel_config_set_dreq(&c, spi_get_index(self->peripheral) ? DREQ_SPI1_RX : DREQ_SPI0_RX);
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channel_config_set_read_increment(&c, false);
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channel_config_set_write_increment(&c, in_len == len);
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dma_channel_configure(chan_rx, &c,
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data_in,
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&spi_get_hw(self->peripheral)->dr,
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len,
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false);
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dma_start_channel_mask((1u << chan_rx) | (1u << chan_tx));
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while (dma_channel_is_busy(chan_rx) || dma_channel_is_busy(chan_tx)) {
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// TODO: We should idle here until we get a DMA interrupt or something else.
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RUN_BACKGROUND_TASKS;
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if (mp_hal_is_interrupted()) {
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if (dma_channel_is_busy(chan_rx)) {
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dma_channel_abort(chan_rx);
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}
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if (dma_channel_is_busy(chan_tx)) {
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dma_channel_abort(chan_tx);
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}
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break;
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}
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}
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}
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// If we have claimed only one channel successfully, we should release immediately. This also
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// releases the DMA after use_dma has been done.
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if (chan_rx >= 0) {
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dma_channel_unclaim(chan_rx);
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}
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if (chan_tx >= 0) {
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dma_channel_unclaim(chan_tx);
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}
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if (!use_dma && !mp_hal_is_interrupted()) {
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// Use software for small transfers, or if couldn't claim two DMA channels
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// Never have more transfers in flight than will fit into the RX FIFO,
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// else FIFO will overflow if this code is heavily interrupted.
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const size_t fifo_depth = 8;
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size_t rx_remaining = len;
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size_t tx_remaining = len;
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while (!mp_hal_is_interrupted() && (rx_remaining || tx_remaining)) {
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if (tx_remaining && spi_is_writable(self->peripheral) && rx_remaining - tx_remaining < fifo_depth) {
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spi_get_hw(self->peripheral)->dr = (uint32_t) *data_out;
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// Increment only if the buffer is the transfer length. It's 1 otherwise.
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if (out_len == len) {
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data_out++;
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}
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--tx_remaining;
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}
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if (rx_remaining && spi_is_readable(self->peripheral)) {
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*data_in = (uint8_t) spi_get_hw(self->peripheral)->dr;
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// Increment only if the buffer is the transfer length. It's 1 otherwise.
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if (in_len == len) {
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data_in++;
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}
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--rx_remaining;
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}
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RUN_BACKGROUND_TASKS;
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}
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}
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return true;
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}
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bool common_hal_busio_spi_write(busio_spi_obj_t *self,
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const uint8_t *data, size_t len) {
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uint32_t data_in;
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return _transfer(self, data, len, (uint8_t*) &data_in, MIN(len, 4));
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}
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bool common_hal_busio_spi_read(busio_spi_obj_t *self,
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uint8_t *data, size_t len, uint8_t write_value) {
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uint32_t data_out = write_value << 24 | write_value << 16 | write_value << 8 | write_value;
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return _transfer(self, (const uint8_t*) &data_out, MIN(4, len), data, len);
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}
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bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) {
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return _transfer(self, data_out, len, data_in, len);
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}
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uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) {
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return self->real_frequency;
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}
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uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) {
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return self->phase;
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}
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uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) {
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return self->polarity;
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}
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