a90124a9e2
This patch adds support for building the firmware with external SPI RAM
enabled. It is disabled by default because it adds overhead (due to
silicon workarounds) and reduces performance (because it's slower to have
bytecode and objects stored in external RAM).
To enable it, either use "make CONFIG_SPIRAM_SUPPORT=1", or add this line
to you custom makefile/GNUmakefile (before "include Makefile"):
CONFIG_SPIRAM_SUPPORT = 1
When this option is enabled the MicroPython heap is automatically allocated
in external SPI RAM.
Thanks to Angus Gratton for help with the compiler and linker settings.
192 lines
7.0 KiB
C
192 lines
7.0 KiB
C
/* Start bootloader config */
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#define CONFIG_FLASHMODE_DIO 1
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#define CONFIG_ESPTOOLPY_FLASHFREQ_40M 1
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/* End bootloader config */
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#define CONFIG_TRACEMEM_RESERVE_DRAM 0x0
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#define CONFIG_BT_RESERVE_DRAM 0x0
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#define CONFIG_ULP_COPROC_RESERVE_MEM 2040
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#define CONFIG_PHY_DATA_OFFSET 0xf000
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#define CONFIG_APP_OFFSET 0x10000
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#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
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#define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS 1
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#define CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS 4
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#define CONFIG_BROWNOUT_DET 1
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#define CONFIG_BROWNOUT_DET_LVL 0
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#define CONFIG_BROWNOUT_DET_LVL_SEL_0 1
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#define CONFIG_TCPIP_TASK_STACK_SIZE 2560
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#define CONFIG_TCPIP_RECVMBOX_SIZE 32
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#define CONFIG_ESP32_APPTRACE_DEST_NONE 1
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#define CONFIG_ESP32_PHY_MAX_TX_POWER 20
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#define CONFIG_ESP32_PANIC_PRINT_REBOOT 1
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#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1
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#define CONFIG_ESP32_RTC_XTAL_BOOTSTRAP_CYCLES 100
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#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 1
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#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 240
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#define CONFIG_ESP32_DEFAULT_CPU_FREQ_240 1
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#define CONFIG_ESP32_DEBUG_OCDAWARE 1
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#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY 2000
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#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE 1
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#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE 1
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#define CONFIG_ESP32_WIFI_AMPDU_ENABLED 1
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#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
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#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 10
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#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 0
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#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1
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#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER 1
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#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM 32
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#define CONFIG_ESP32_WIFI_RX_BA_WIN 6
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#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
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#define CONFIG_ESP32_XTAL_FREQ_AUTO 1
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#define CONFIG_ESP32_XTAL_FREQ 0
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#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES 1024
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#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT 5
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#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT 2048
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#if CONFIG_SPIRAM_SUPPORT
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#define CONFIG_SPIRAM_TYPE_ESPPSRAM32 1
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#define CONFIG_SPIRAM_SIZE 4194304
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#define CONFIG_SPIRAM_SPEED_40M 1
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#define CONFIG_SPIRAM_CACHE_WORKAROUND 1
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#define CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL 16384
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#define CONFIG_SPIRAM_BOOT_INIT 1
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#define CONFIG_SPIRAM_MEMTEST 1
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#define CONFIG_SPIRAM_USE_MALLOC 1
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#define CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL 32768
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#define CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY 1
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#endif
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#define CONFIG_FOUR_MAC_ADDRESS_FROM_EFUSE 1
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#define CONFIG_DMA_RX_BUF_NUM 10
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#define CONFIG_DMA_TX_BUF_NUM 10
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#define CONFIG_EMAC_TASK_PRIORITY 20
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#define CONFIG_INT_WDT 1
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#define CONFIG_INT_WDT_TIMEOUT_MS 300
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#define CONFIG_INT_WDT_CHECK_CPU1 0
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#define CONFIG_TASK_WDT 1
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#define CONFIG_TASK_WDT_PANIC 1
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#define CONFIG_TASK_WDT_TIMEOUT_S 5
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#define CONFIG_TASK_WDT_CHECK_IDLE_TASK 0
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#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 0
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#define CONFIG_FREERTOS_UNICORE 1
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#define CONFIG_FREERTOS_CORETIMER_0 1
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#define CONFIG_FREERTOS_HZ 100
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#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
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#define CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION 1
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#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE 1
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#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 2
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#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1024
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#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
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#define CONFIG_FREERTOS_BREAK_ON_SCHEDULER_START_JTAG 1
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#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
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#define CONFIG_SUPPORT_STATIC_ALLOCATION 1
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#define CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK 1
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#define CONFIG_MAIN_TASK_STACK_SIZE 4096
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#define CONFIG_IPC_TASK_STACK_SIZE 1024
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#define CONFIG_BTC_TASK_STACK_SIZE 3072
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#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 4096
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#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32
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#define CONFIG_TIMER_TASK_STACK_SIZE 4096
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#define CONFIG_TIMER_TASK_PRIORITY 1
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#define CONFIG_TIMER_TASK_STACK_DEPTH 2048
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#define CONFIG_TIMER_QUEUE_LENGTH 10
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#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
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#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
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#define CONFIG_PHY_ENABLED 1
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#define CONFIG_WIFI_ENABLED 1
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#define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1
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#define CONFIG_MEMMAP_SMP 1
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#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
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#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
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#define CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET 0x10000
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#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
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#define CONFIG_CONSOLE_UART_BAUDRATE 115200
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#define CONFIG_CONSOLE_UART_NUM 0
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#define CONFIG_CONSOLE_UART_DEFAULT 1
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#define CONFIG_LOG_DEFAULT_LEVEL_INFO 1
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#define CONFIG_LOG_BOOTLOADER_LEVEL_WARN 1
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#define CONFIG_LOG_DEFAULT_LEVEL 3
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#define CONFIG_LOG_COLORS 1
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#define CONFIG_LOG_BOOTLOADER_LEVEL 2
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#define CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX 0
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#define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1
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#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
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#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
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#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
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#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
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#define CONFIG_LWIP_MAX_SOCKETS 8
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#define CONFIG_LWIP_SO_REUSE 1
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#define CONFIG_LWIP_ETHARP_TRUST_IP_MAC 1
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#define CONFIG_IP_LOST_TIMER_INTERVAL 120
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#define CONFIG_UDP_RECVMBOX_SIZE 6
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#define CONFIG_TCP_MAXRTX 12
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#define CONFIG_TCP_SYNMAXRTX 6
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#define CONFIG_TCP_MSL 60000
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#define CONFIG_TCP_MSS 1436
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#define CONFIG_TCP_SND_BUF_DEFAULT 5744
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#define CONFIG_TCP_WND_DEFAULT 5744
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#define CONFIG_TCP_QUEUE_OOSEQ 1
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#define CONFIG_TCP_OVERSIZE_MSS 1
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#define CONFIG_TCP_RECVMBOX_SIZE 6
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#define CONFIG_MBEDTLS_AES_C 1
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#define CONFIG_MBEDTLS_CCM_C 1
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#define CONFIG_MBEDTLS_ECDH_C 1
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#define CONFIG_MBEDTLS_ECDSA_C 1
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#define CONFIG_MBEDTLS_ECP_C 1
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#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
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#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
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#define CONFIG_MBEDTLS_GCM_C 1
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#define CONFIG_MBEDTLS_HARDWARE_AES 1
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#define CONFIG_MBEDTLS_HAVE_TIME 1
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#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1
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#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
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#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
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#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
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#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
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#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
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#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
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#define CONFIG_MBEDTLS_PEM_PARSE_C 1
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#define CONFIG_MBEDTLS_PEM_WRITE_C 1
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#define CONFIG_MBEDTLS_RC4_DISABLED 1
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#define CONFIG_MBEDTLS_SSL_ALPN 1
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#define CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN 16384
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#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1
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#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
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#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
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#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
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#define CONFIG_MBEDTLS_SSL_SESSION_TICKETS 1
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#define CONFIG_MBEDTLS_TLS_CLIENT 1
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#define CONFIG_MBEDTLS_TLS_ENABLED 1
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#define CONFIG_MBEDTLS_TLS_SERVER 1
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#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
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#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
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#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
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#define CONFIG_MAKE_WARN_UNDEFINED_VARIABLES 1
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#define CONFIG_TOOLPREFIX "xtensa-esp32-elf-"
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#define CONFIG_PYTHON "python2"
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